1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef __DPU_RM_H__ 7 #define __DPU_RM_H__ 8 9 #include <linux/list.h> 10 11 #include "msm_kms.h" 12 #include "dpu_hw_top.h" 13 14 struct dpu_global_state; 15 16 /** 17 * struct dpu_rm - DPU dynamic hardware resource manager 18 * @pingpong_blks: array of pingpong hardware resources 19 * @mixer_blks: array of layer mixer hardware resources 20 * @ctl_blks: array of ctl hardware resources 21 * @intf_blks: array of intf hardware resources 22 * @lm_max_width: cached layer mixer maximum width 23 * @rm_lock: resource manager mutex 24 */ 25 struct dpu_rm { 26 struct dpu_hw_blk *pingpong_blks[PINGPONG_MAX - PINGPONG_0]; 27 struct dpu_hw_blk *mixer_blks[LM_MAX - LM_0]; 28 struct dpu_hw_blk *ctl_blks[CTL_MAX - CTL_0]; 29 struct dpu_hw_blk *intf_blks[INTF_MAX - INTF_0]; 30 31 uint32_t lm_max_width; 32 }; 33 34 /** 35 * dpu_rm_init - Read hardware catalog and create reservation tracking objects 36 * for all HW blocks. 37 * @rm: DPU Resource Manager handle 38 * @cat: Pointer to hardware catalog 39 * @mmio: mapped register io address of MDP 40 * @Return: 0 on Success otherwise -ERROR 41 */ 42 int dpu_rm_init(struct dpu_rm *rm, 43 struct dpu_mdss_cfg *cat, 44 void __iomem *mmio); 45 46 /** 47 * dpu_rm_destroy - Free all memory allocated by dpu_rm_init 48 * @rm: DPU Resource Manager handle 49 * @Return: 0 on Success otherwise -ERROR 50 */ 51 int dpu_rm_destroy(struct dpu_rm *rm); 52 53 /** 54 * dpu_rm_reserve - Given a CRTC->Encoder->Connector display chain, analyze 55 * the use connections and user requirements, specified through related 56 * topology control properties, and reserve hardware blocks to that 57 * display chain. 58 * HW blocks can then be accessed through dpu_rm_get_* functions. 59 * HW Reservations should be released via dpu_rm_release_hw. 60 * @rm: DPU Resource Manager handle 61 * @drm_enc: DRM Encoder handle 62 * @crtc_state: Proposed Atomic DRM CRTC State handle 63 * @topology: Pointer to topology info for the display 64 * @Return: 0 on Success otherwise -ERROR 65 */ 66 int dpu_rm_reserve(struct dpu_rm *rm, 67 struct dpu_global_state *global_state, 68 struct drm_encoder *drm_enc, 69 struct drm_crtc_state *crtc_state, 70 struct msm_display_topology topology); 71 72 /** 73 * dpu_rm_reserve - Given the encoder for the display chain, release any 74 * HW blocks previously reserved for that use case. 75 * @rm: DPU Resource Manager handle 76 * @enc: DRM Encoder handle 77 * @Return: 0 on Success otherwise -ERROR 78 */ 79 void dpu_rm_release(struct dpu_global_state *global_state, 80 struct drm_encoder *enc); 81 82 /** 83 * Get hw resources of the given type that are assigned to this encoder. 84 */ 85 int dpu_rm_get_assigned_resources(struct dpu_rm *rm, 86 struct dpu_global_state *global_state, uint32_t enc_id, 87 enum dpu_hw_blk_type type, struct dpu_hw_blk **blks, int blks_size); 88 #endif /* __DPU_RM_H__ */ 89 90