1caab277bSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
225fdd593SJeykumar Sankaran /*
325fdd593SJeykumar Sankaran  * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
425fdd593SJeykumar Sankaran  * Copyright (C) 2013 Red Hat
525fdd593SJeykumar Sankaran  * Author: Rob Clark <robdclark@gmail.com>
625fdd593SJeykumar Sankaran  */
725fdd593SJeykumar Sankaran 
825fdd593SJeykumar Sankaran #ifndef _DPU_PLANE_H_
925fdd593SJeykumar Sankaran #define _DPU_PLANE_H_
1025fdd593SJeykumar Sankaran 
1125fdd593SJeykumar Sankaran #include <drm/drm_crtc.h>
1225fdd593SJeykumar Sankaran 
1325fdd593SJeykumar Sankaran #include "dpu_kms.h"
1425fdd593SJeykumar Sankaran #include "dpu_hw_mdss.h"
1525fdd593SJeykumar Sankaran #include "dpu_hw_sspp.h"
1625fdd593SJeykumar Sankaran 
1725fdd593SJeykumar Sankaran /**
1825fdd593SJeykumar Sankaran  * struct dpu_plane_state: Define dpu extension of drm plane state object
1925fdd593SJeykumar Sankaran  * @base:	base drm plane state object
2025fdd593SJeykumar Sankaran  * @aspace:	pointer to address space for input/output buffers
2125fdd593SJeykumar Sankaran  * @stage:	assigned by crtc blender
22854f6f1cSAbhinav Kumar  * @needs_qos_remap: qos remap settings need to be updated
2325fdd593SJeykumar Sankaran  * @multirect_index: index of the rectangle of SSPP
2425fdd593SJeykumar Sankaran  * @multirect_mode: parallel or time multiplex multirect mode
2525fdd593SJeykumar Sankaran  * @pending:	whether the current update is still pending
26c33b7c03SKalyan Thota  * @plane_fetch_bw: calculated BW per plane
27c33b7c03SKalyan Thota  * @plane_clk: calculated clk per plane
28*9e4dde28SRob Clark  * @needs_dirtyfb: whether attached CRTC needs pixel data explicitly flushed
2925fdd593SJeykumar Sankaran  */
3025fdd593SJeykumar Sankaran struct dpu_plane_state {
3125fdd593SJeykumar Sankaran 	struct drm_plane_state base;
3225fdd593SJeykumar Sankaran 	struct msm_gem_address_space *aspace;
3325fdd593SJeykumar Sankaran 	enum dpu_stage stage;
34854f6f1cSAbhinav Kumar 	bool needs_qos_remap;
3525fdd593SJeykumar Sankaran 	uint32_t multirect_index;
3625fdd593SJeykumar Sankaran 	uint32_t multirect_mode;
3725fdd593SJeykumar Sankaran 	bool pending;
3825fdd593SJeykumar Sankaran 
39c33b7c03SKalyan Thota 	u64 plane_fetch_bw;
40c33b7c03SKalyan Thota 	u64 plane_clk;
41*9e4dde28SRob Clark 
42*9e4dde28SRob Clark 	bool needs_dirtyfb;
4325fdd593SJeykumar Sankaran };
4425fdd593SJeykumar Sankaran 
4525fdd593SJeykumar Sankaran /**
4625fdd593SJeykumar Sankaran  * struct dpu_multirect_plane_states: Defines multirect pair of drm plane states
4725fdd593SJeykumar Sankaran  * @r0: drm plane configured on rect 0
4825fdd593SJeykumar Sankaran  * @r1: drm plane configured on rect 1
4925fdd593SJeykumar Sankaran  */
5025fdd593SJeykumar Sankaran struct dpu_multirect_plane_states {
5125fdd593SJeykumar Sankaran 	const struct drm_plane_state *r0;
5225fdd593SJeykumar Sankaran 	const struct drm_plane_state *r1;
5325fdd593SJeykumar Sankaran };
5425fdd593SJeykumar Sankaran 
5525fdd593SJeykumar Sankaran #define to_dpu_plane_state(x) \
5625fdd593SJeykumar Sankaran 	container_of(x, struct dpu_plane_state, base)
5725fdd593SJeykumar Sankaran 
5825fdd593SJeykumar Sankaran /**
5925fdd593SJeykumar Sankaran  * dpu_plane_pipe - return sspp identifier for the given plane
6025fdd593SJeykumar Sankaran  * @plane:   Pointer to DRM plane object
6125fdd593SJeykumar Sankaran  * Returns: sspp identifier of the given plane
6225fdd593SJeykumar Sankaran  */
6325fdd593SJeykumar Sankaran enum dpu_sspp dpu_plane_pipe(struct drm_plane *plane);
6425fdd593SJeykumar Sankaran 
6525fdd593SJeykumar Sankaran /**
6625fdd593SJeykumar Sankaran  * is_dpu_plane_virtual - check for virtual plane
6725fdd593SJeykumar Sankaran  * @plane: Pointer to DRM plane object
6825fdd593SJeykumar Sankaran  * returns: true - if the plane is virtual
6925fdd593SJeykumar Sankaran  *          false - if the plane is primary
7025fdd593SJeykumar Sankaran  */
7125fdd593SJeykumar Sankaran bool is_dpu_plane_virtual(struct drm_plane *plane);
7225fdd593SJeykumar Sankaran 
7325fdd593SJeykumar Sankaran /**
7425fdd593SJeykumar Sankaran  * dpu_plane_get_ctl_flush - get control flush mask
7525fdd593SJeykumar Sankaran  * @plane:   Pointer to DRM plane object
7625fdd593SJeykumar Sankaran  * @ctl: Pointer to control hardware
7725fdd593SJeykumar Sankaran  * @flush_sspp: Pointer to sspp flush control word
7825fdd593SJeykumar Sankaran  */
7925fdd593SJeykumar Sankaran void dpu_plane_get_ctl_flush(struct drm_plane *plane, struct dpu_hw_ctl *ctl,
8025fdd593SJeykumar Sankaran 		u32 *flush_sspp);
8125fdd593SJeykumar Sankaran 
8225fdd593SJeykumar Sankaran /**
8325fdd593SJeykumar Sankaran  * dpu_plane_flush - final plane operations before commit flush
8425fdd593SJeykumar Sankaran  * @plane: Pointer to drm plane structure
8525fdd593SJeykumar Sankaran  */
8625fdd593SJeykumar Sankaran void dpu_plane_flush(struct drm_plane *plane);
8725fdd593SJeykumar Sankaran 
8825fdd593SJeykumar Sankaran /**
8925fdd593SJeykumar Sankaran  * dpu_plane_set_error: enable/disable error condition
9025fdd593SJeykumar Sankaran  * @plane: pointer to drm_plane structure
9125fdd593SJeykumar Sankaran  */
9225fdd593SJeykumar Sankaran void dpu_plane_set_error(struct drm_plane *plane, bool error);
9325fdd593SJeykumar Sankaran 
9425fdd593SJeykumar Sankaran /**
9525fdd593SJeykumar Sankaran  * dpu_plane_init - create new dpu plane for the given pipe
9625fdd593SJeykumar Sankaran  * @dev:   Pointer to DRM device
9725fdd593SJeykumar Sankaran  * @pipe:  dpu hardware pipe identifier
9807ca1fc0SSravanthi Kollukuduru  * @type:  Plane type - PRIMARY/OVERLAY/CURSOR
9925fdd593SJeykumar Sankaran  * @possible_crtcs: bitmask of crtc that can be attached to the given pipe
10025fdd593SJeykumar Sankaran  * @master_plane_id: primary plane id of a multirect pipe. 0 value passed for
10125fdd593SJeykumar Sankaran  *                   a regular plane initialization. A non-zero primary plane
10225fdd593SJeykumar Sankaran  *                   id will be passed for a virtual pipe initialization.
10325fdd593SJeykumar Sankaran  *
10425fdd593SJeykumar Sankaran  */
10525fdd593SJeykumar Sankaran struct drm_plane *dpu_plane_init(struct drm_device *dev,
10607ca1fc0SSravanthi Kollukuduru 		uint32_t pipe, enum drm_plane_type type,
10725fdd593SJeykumar Sankaran 		unsigned long possible_crtcs, u32 master_plane_id);
10825fdd593SJeykumar Sankaran 
10925fdd593SJeykumar Sankaran /**
11025fdd593SJeykumar Sankaran  * dpu_plane_validate_multirecti_v2 - validate the multirect planes
11125fdd593SJeykumar Sankaran  *				      against hw limitations
11225fdd593SJeykumar Sankaran  * @plane: drm plate states of the multirect pair
11325fdd593SJeykumar Sankaran  */
11425fdd593SJeykumar Sankaran int dpu_plane_validate_multirect_v2(struct dpu_multirect_plane_states *plane);
11525fdd593SJeykumar Sankaran 
11625fdd593SJeykumar Sankaran /**
11725fdd593SJeykumar Sankaran  * dpu_plane_clear_multirect - clear multirect bits for the given pipe
11825fdd593SJeykumar Sankaran  * @drm_state: Pointer to DRM plane state
11925fdd593SJeykumar Sankaran  */
12025fdd593SJeykumar Sankaran void dpu_plane_clear_multirect(const struct drm_plane_state *drm_state);
12125fdd593SJeykumar Sankaran 
12225fdd593SJeykumar Sankaran /**
12325fdd593SJeykumar Sankaran  * dpu_plane_color_fill - enables color fill on plane
12425fdd593SJeykumar Sankaran  * @plane:  Pointer to DRM plane object
12525fdd593SJeykumar Sankaran  * @color:  RGB fill color value, [23..16] Blue, [15..8] Green, [7..0] Red
12625fdd593SJeykumar Sankaran  * @alpha:  8-bit fill alpha value, 255 selects 100% alpha
12725fdd593SJeykumar Sankaran  * Returns: 0 on success
12825fdd593SJeykumar Sankaran  */
12925fdd593SJeykumar Sankaran int dpu_plane_color_fill(struct drm_plane *plane,
13025fdd593SJeykumar Sankaran 		uint32_t color, uint32_t alpha);
13125fdd593SJeykumar Sankaran 
13296536242SDmitry Baryshkov #ifdef CONFIG_DEBUG_FS
13396536242SDmitry Baryshkov void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable);
13496536242SDmitry Baryshkov #else
13596536242SDmitry Baryshkov static inline void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable) {}
13696536242SDmitry Baryshkov #endif
13796536242SDmitry Baryshkov 
13825fdd593SJeykumar Sankaran #endif /* _DPU_PLANE_H_ */
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