1 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 2 * 3 * This program is free software; you can redistribute it and/or modify 4 * it under the terms of the GNU General Public License version 2 and 5 * only version 2 as published by the Free Software Foundation. 6 * 7 * This program is distributed in the hope that it will be useful, 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * GNU General Public License for more details. 11 */ 12 13 #ifndef _DPU_HW_TOP_H 14 #define _DPU_HW_TOP_H 15 16 #include "dpu_hw_catalog.h" 17 #include "dpu_hw_mdss.h" 18 #include "dpu_hw_util.h" 19 #include "dpu_hw_blk.h" 20 21 struct dpu_hw_mdp; 22 23 /** 24 * struct traffic_shaper_cfg: traffic shaper configuration 25 * @en : enable/disable traffic shaper 26 * @rd_client : true if read client; false if write client 27 * @client_id : client identifier 28 * @bpc_denom : denominator of byte per clk 29 * @bpc_numer : numerator of byte per clk 30 */ 31 struct traffic_shaper_cfg { 32 bool en; 33 bool rd_client; 34 u32 client_id; 35 u32 bpc_denom; 36 u64 bpc_numer; 37 }; 38 39 /** 40 * struct split_pipe_cfg - pipe configuration for dual display panels 41 * @en : Enable/disable dual pipe confguration 42 * @mode : Panel interface mode 43 * @intf : Interface id for main control path 44 * @split_flush_en: Allows both the paths to be flushed when master path is 45 * flushed 46 */ 47 struct split_pipe_cfg { 48 bool en; 49 enum dpu_intf_mode mode; 50 enum dpu_intf intf; 51 bool split_flush_en; 52 }; 53 54 /** 55 * struct dpu_danger_safe_status: danger and safe status signals 56 * @mdp: top level status 57 * @sspp: source pipe status 58 */ 59 struct dpu_danger_safe_status { 60 u8 mdp; 61 u8 sspp[SSPP_MAX]; 62 }; 63 64 /** 65 * struct dpu_vsync_source_cfg - configure vsync source and configure the 66 * watchdog timers if required. 67 * @pp_count: number of ping pongs active 68 * @frame_rate: Display frame rate 69 * @ppnumber: ping pong index array 70 * @vsync_source: vsync source selection 71 */ 72 struct dpu_vsync_source_cfg { 73 u32 pp_count; 74 u32 frame_rate; 75 u32 ppnumber[PINGPONG_MAX]; 76 u32 vsync_source; 77 }; 78 79 /** 80 * struct dpu_hw_mdp_ops - interface to the MDP TOP Hw driver functions 81 * Assumption is these functions will be called after clocks are enabled. 82 * @setup_split_pipe : Programs the pipe control registers 83 * @setup_pp_split : Programs the pp split control registers 84 * @setup_traffic_shaper : programs traffic shaper control 85 */ 86 struct dpu_hw_mdp_ops { 87 /** setup_split_pipe() : Regsiters are not double buffered, thisk 88 * function should be called before timing control enable 89 * @mdp : mdp top context driver 90 * @cfg : upper and lower part of pipe configuration 91 */ 92 void (*setup_split_pipe)(struct dpu_hw_mdp *mdp, 93 struct split_pipe_cfg *p); 94 95 /** 96 * setup_traffic_shaper() : Setup traffic shaper control 97 * @mdp : mdp top context driver 98 * @cfg : traffic shaper configuration 99 */ 100 void (*setup_traffic_shaper)(struct dpu_hw_mdp *mdp, 101 struct traffic_shaper_cfg *cfg); 102 103 /** 104 * setup_clk_force_ctrl - set clock force control 105 * @mdp: mdp top context driver 106 * @clk_ctrl: clock to be controlled 107 * @enable: force on enable 108 * @return: if the clock is forced-on by this function 109 */ 110 bool (*setup_clk_force_ctrl)(struct dpu_hw_mdp *mdp, 111 enum dpu_clk_ctrl_type clk_ctrl, bool enable); 112 113 /** 114 * get_danger_status - get danger status 115 * @mdp: mdp top context driver 116 * @status: Pointer to danger safe status 117 */ 118 void (*get_danger_status)(struct dpu_hw_mdp *mdp, 119 struct dpu_danger_safe_status *status); 120 121 /** 122 * setup_vsync_source - setup vsync source configuration details 123 * @mdp: mdp top context driver 124 * @cfg: vsync source selection configuration 125 */ 126 void (*setup_vsync_source)(struct dpu_hw_mdp *mdp, 127 struct dpu_vsync_source_cfg *cfg); 128 129 /** 130 * get_safe_status - get safe status 131 * @mdp: mdp top context driver 132 * @status: Pointer to danger safe status 133 */ 134 void (*get_safe_status)(struct dpu_hw_mdp *mdp, 135 struct dpu_danger_safe_status *status); 136 137 /** 138 * reset_ubwc - reset top level UBWC configuration 139 * @mdp: mdp top context driver 140 * @m: pointer to mdss catalog data 141 */ 142 void (*reset_ubwc)(struct dpu_hw_mdp *mdp, struct dpu_mdss_cfg *m); 143 144 /** 145 * intf_audio_select - select the external interface for audio 146 * @mdp: mdp top context driver 147 */ 148 void (*intf_audio_select)(struct dpu_hw_mdp *mdp); 149 }; 150 151 struct dpu_hw_mdp { 152 struct dpu_hw_blk base; 153 struct dpu_hw_blk_reg_map hw; 154 155 /* top */ 156 enum dpu_mdp idx; 157 const struct dpu_mdp_cfg *caps; 158 159 /* ops */ 160 struct dpu_hw_mdp_ops ops; 161 }; 162 163 /** 164 * dpu_hw_mdptop_init - initializes the top driver for the passed idx 165 * @idx: Interface index for which driver object is required 166 * @addr: Mapped register io address of MDP 167 * @m: Pointer to mdss catalog data 168 */ 169 struct dpu_hw_mdp *dpu_hw_mdptop_init(enum dpu_mdp idx, 170 void __iomem *addr, 171 const struct dpu_mdss_cfg *m); 172 173 void dpu_hw_mdp_destroy(struct dpu_hw_mdp *mdp); 174 175 #endif /*_DPU_HW_TOP_H */ 176