1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 3 */ 4 5 #ifndef _DPU_HW_SSPP_H 6 #define _DPU_HW_SSPP_H 7 8 #include "dpu_hw_catalog.h" 9 #include "dpu_hw_mdss.h" 10 #include "dpu_hw_util.h" 11 #include "dpu_formats.h" 12 13 struct dpu_hw_sspp; 14 15 /** 16 * Flags 17 */ 18 #define DPU_SSPP_FLIP_LR BIT(0) 19 #define DPU_SSPP_FLIP_UD BIT(1) 20 #define DPU_SSPP_SOURCE_ROTATED_90 BIT(2) 21 #define DPU_SSPP_ROT_90 BIT(3) 22 #define DPU_SSPP_SOLID_FILL BIT(4) 23 24 /** 25 * Define all scaler feature bits in catalog 26 */ 27 #define DPU_SSPP_SCALER (BIT(DPU_SSPP_SCALER_RGB) | \ 28 BIT(DPU_SSPP_SCALER_QSEED2) | \ 29 BIT(DPU_SSPP_SCALER_QSEED3) | \ 30 BIT(DPU_SSPP_SCALER_QSEED3LITE) | \ 31 BIT(DPU_SSPP_SCALER_QSEED4)) 32 33 /* 34 * Define all CSC feature bits in catalog 35 */ 36 #define DPU_SSPP_CSC_ANY (BIT(DPU_SSPP_CSC) | \ 37 BIT(DPU_SSPP_CSC_10BIT)) 38 39 /** 40 * Component indices 41 */ 42 enum { 43 DPU_SSPP_COMP_0, 44 DPU_SSPP_COMP_1_2, 45 DPU_SSPP_COMP_2, 46 DPU_SSPP_COMP_3, 47 48 DPU_SSPP_COMP_MAX 49 }; 50 51 /** 52 * DPU_SSPP_RECT_SOLO - multirect disabled 53 * DPU_SSPP_RECT_0 - rect0 of a multirect pipe 54 * DPU_SSPP_RECT_1 - rect1 of a multirect pipe 55 * 56 * Note: HW supports multirect with either RECT0 or 57 * RECT1. Considering no benefit of such configs over 58 * SOLO mode and to keep the plane management simple, 59 * we dont support single rect multirect configs. 60 */ 61 enum dpu_sspp_multirect_index { 62 DPU_SSPP_RECT_SOLO = 0, 63 DPU_SSPP_RECT_0, 64 DPU_SSPP_RECT_1, 65 }; 66 67 enum dpu_sspp_multirect_mode { 68 DPU_SSPP_MULTIRECT_NONE = 0, 69 DPU_SSPP_MULTIRECT_PARALLEL, 70 DPU_SSPP_MULTIRECT_TIME_MX, 71 }; 72 73 enum { 74 DPU_FRAME_LINEAR, 75 DPU_FRAME_TILE_A4X, 76 DPU_FRAME_TILE_A5X, 77 }; 78 79 enum dpu_hw_filter { 80 DPU_SCALE_FILTER_NEAREST = 0, 81 DPU_SCALE_FILTER_BIL, 82 DPU_SCALE_FILTER_PCMN, 83 DPU_SCALE_FILTER_CA, 84 DPU_SCALE_FILTER_MAX 85 }; 86 87 enum dpu_hw_filter_alpa { 88 DPU_SCALE_ALPHA_PIXEL_REP, 89 DPU_SCALE_ALPHA_BIL 90 }; 91 92 enum dpu_hw_filter_yuv { 93 DPU_SCALE_2D_4X4, 94 DPU_SCALE_2D_CIR, 95 DPU_SCALE_1D_SEP, 96 DPU_SCALE_BIL 97 }; 98 99 struct dpu_hw_sharp_cfg { 100 u32 strength; 101 u32 edge_thr; 102 u32 smooth_thr; 103 u32 noise_thr; 104 }; 105 106 struct dpu_hw_pixel_ext { 107 /* scaling factors are enabled for this input layer */ 108 uint8_t enable_pxl_ext; 109 110 int init_phase_x[DPU_MAX_PLANES]; 111 int phase_step_x[DPU_MAX_PLANES]; 112 int init_phase_y[DPU_MAX_PLANES]; 113 int phase_step_y[DPU_MAX_PLANES]; 114 115 /* 116 * Number of pixels extension in left, right, top and bottom direction 117 * for all color components. This pixel value for each color component 118 * should be sum of fetch + repeat pixels. 119 */ 120 int num_ext_pxls_left[DPU_MAX_PLANES]; 121 int num_ext_pxls_right[DPU_MAX_PLANES]; 122 int num_ext_pxls_top[DPU_MAX_PLANES]; 123 int num_ext_pxls_btm[DPU_MAX_PLANES]; 124 125 /* 126 * Number of pixels needs to be overfetched in left, right, top and 127 * bottom directions from source image for scaling. 128 */ 129 int left_ftch[DPU_MAX_PLANES]; 130 int right_ftch[DPU_MAX_PLANES]; 131 int top_ftch[DPU_MAX_PLANES]; 132 int btm_ftch[DPU_MAX_PLANES]; 133 134 /* 135 * Number of pixels needs to be repeated in left, right, top and 136 * bottom directions for scaling. 137 */ 138 int left_rpt[DPU_MAX_PLANES]; 139 int right_rpt[DPU_MAX_PLANES]; 140 int top_rpt[DPU_MAX_PLANES]; 141 int btm_rpt[DPU_MAX_PLANES]; 142 143 uint32_t roi_w[DPU_MAX_PLANES]; 144 uint32_t roi_h[DPU_MAX_PLANES]; 145 146 /* 147 * Filter type to be used for scaling in horizontal and vertical 148 * directions 149 */ 150 enum dpu_hw_filter horz_filter[DPU_MAX_PLANES]; 151 enum dpu_hw_filter vert_filter[DPU_MAX_PLANES]; 152 153 }; 154 155 /** 156 * struct dpu_sw_pipe_cfg : software pipe configuration 157 * @src_rect: src ROI, caller takes into account the different operations 158 * such as decimation, flip etc to program this field 159 * @dest_rect: destination ROI. 160 */ 161 struct dpu_sw_pipe_cfg { 162 struct drm_rect src_rect; 163 struct drm_rect dst_rect; 164 }; 165 166 /** 167 * struct dpu_hw_pipe_qos_cfg : Source pipe QoS configuration 168 * @creq_vblank: creq value generated to vbif during vertical blanking 169 * @danger_vblank: danger value generated during vertical blanking 170 * @vblank_en: enable creq_vblank and danger_vblank during vblank 171 * @danger_safe_en: enable danger safe generation 172 */ 173 struct dpu_hw_pipe_qos_cfg { 174 u32 creq_vblank; 175 u32 danger_vblank; 176 bool vblank_en; 177 bool danger_safe_en; 178 }; 179 180 /** 181 * enum CDP preload ahead address size 182 */ 183 enum { 184 DPU_SSPP_CDP_PRELOAD_AHEAD_32, 185 DPU_SSPP_CDP_PRELOAD_AHEAD_64 186 }; 187 188 /** 189 * struct dpu_hw_pipe_ts_cfg - traffic shaper configuration 190 * @size: size to prefill in bytes, or zero to disable 191 * @time: time to prefill in usec, or zero to disable 192 */ 193 struct dpu_hw_pipe_ts_cfg { 194 u64 size; 195 u64 time; 196 }; 197 198 /** 199 * struct dpu_sw_pipe - software pipe description 200 * @sspp: backing SSPP pipe 201 * @index: index of the rectangle of SSPP 202 * @mode: parallel or time multiplex multirect mode 203 */ 204 struct dpu_sw_pipe { 205 struct dpu_hw_sspp *sspp; 206 enum dpu_sspp_multirect_index multirect_index; 207 enum dpu_sspp_multirect_mode multirect_mode; 208 }; 209 210 /** 211 * struct dpu_hw_sspp_ops - interface to the SSPP Hw driver functions 212 * Caller must call the init function to get the pipe context for each pipe 213 * Assumption is these functions will be called after clocks are enabled 214 */ 215 struct dpu_hw_sspp_ops { 216 /** 217 * setup_format - setup pixel format cropping rectangle, flip 218 * @pipe: Pointer to software pipe context 219 * @cfg: Pointer to pipe config structure 220 * @flags: Extra flags for format config 221 */ 222 void (*setup_format)(struct dpu_sw_pipe *pipe, 223 const struct dpu_format *fmt, u32 flags); 224 225 /** 226 * setup_rects - setup pipe ROI rectangles 227 * @pipe: Pointer to software pipe context 228 * @cfg: Pointer to pipe config structure 229 */ 230 void (*setup_rects)(struct dpu_sw_pipe *pipe, 231 struct dpu_sw_pipe_cfg *cfg); 232 233 /** 234 * setup_pe - setup pipe pixel extension 235 * @ctx: Pointer to pipe context 236 * @pe_ext: Pointer to pixel ext settings 237 */ 238 void (*setup_pe)(struct dpu_hw_sspp *ctx, 239 struct dpu_hw_pixel_ext *pe_ext); 240 241 /** 242 * setup_sourceaddress - setup pipe source addresses 243 * @pipe: Pointer to software pipe context 244 * @layout: format layout information for programming buffer to hardware 245 */ 246 void (*setup_sourceaddress)(struct dpu_sw_pipe *ctx, 247 struct dpu_hw_fmt_layout *layout); 248 249 /** 250 * setup_csc - setup color space coversion 251 * @ctx: Pointer to pipe context 252 * @data: Pointer to config structure 253 */ 254 void (*setup_csc)(struct dpu_hw_sspp *ctx, const struct dpu_csc_cfg *data); 255 256 /** 257 * setup_solidfill - enable/disable colorfill 258 * @pipe: Pointer to software pipe context 259 * @const_color: Fill color value 260 * @flags: Pipe flags 261 */ 262 void (*setup_solidfill)(struct dpu_sw_pipe *pipe, u32 color); 263 264 /** 265 * setup_multirect - setup multirect configuration 266 * @pipe: Pointer to software pipe context 267 */ 268 269 void (*setup_multirect)(struct dpu_sw_pipe *pipe); 270 271 /** 272 * setup_sharpening - setup sharpening 273 * @ctx: Pointer to pipe context 274 * @cfg: Pointer to config structure 275 */ 276 void (*setup_sharpening)(struct dpu_hw_sspp *ctx, 277 struct dpu_hw_sharp_cfg *cfg); 278 279 /** 280 * setup_danger_safe_lut - setup danger safe LUTs 281 * @ctx: Pointer to pipe context 282 * @danger_lut: LUT for generate danger level based on fill level 283 * @safe_lut: LUT for generate safe level based on fill level 284 * 285 */ 286 void (*setup_danger_safe_lut)(struct dpu_hw_sspp *ctx, 287 u32 danger_lut, 288 u32 safe_lut); 289 290 /** 291 * setup_creq_lut - setup CREQ LUT 292 * @ctx: Pointer to pipe context 293 * @creq_lut: LUT for generate creq level based on fill level 294 * 295 */ 296 void (*setup_creq_lut)(struct dpu_hw_sspp *ctx, 297 u64 creq_lut); 298 299 /** 300 * setup_qos_ctrl - setup QoS control 301 * @ctx: Pointer to pipe context 302 * @cfg: Pointer to pipe QoS configuration 303 * 304 */ 305 void (*setup_qos_ctrl)(struct dpu_hw_sspp *ctx, 306 struct dpu_hw_pipe_qos_cfg *cfg); 307 308 /** 309 * setup_histogram - setup histograms 310 * @ctx: Pointer to pipe context 311 * @cfg: Pointer to histogram configuration 312 */ 313 void (*setup_histogram)(struct dpu_hw_sspp *ctx, 314 void *cfg); 315 316 /** 317 * setup_scaler - setup scaler 318 * @scaler3_cfg: Pointer to scaler configuration 319 * @format: pixel format parameters 320 */ 321 void (*setup_scaler)(struct dpu_hw_sspp *ctx, 322 struct dpu_hw_scaler3_cfg *scaler3_cfg, 323 const struct dpu_format *format); 324 325 /** 326 * get_scaler_ver - get scaler h/w version 327 * @ctx: Pointer to pipe context 328 */ 329 u32 (*get_scaler_ver)(struct dpu_hw_sspp *ctx); 330 331 /** 332 * setup_cdp - setup client driven prefetch 333 * @pipe: Pointer to software pipe context 334 * @cfg: Pointer to cdp configuration 335 */ 336 void (*setup_cdp)(struct dpu_sw_pipe *pipe, 337 struct dpu_hw_cdp_cfg *cfg); 338 }; 339 340 /** 341 * struct dpu_hw_sspp - pipe description 342 * @base: hardware block base structure 343 * @hw: block hardware details 344 * @catalog: back pointer to catalog 345 * @ubwc: ubwc configuration data 346 * @idx: pipe index 347 * @cap: pointer to layer_cfg 348 * @ops: pointer to operations possible for this pipe 349 */ 350 struct dpu_hw_sspp { 351 struct dpu_hw_blk base; 352 struct dpu_hw_blk_reg_map hw; 353 const struct dpu_mdss_cfg *catalog; 354 const struct dpu_ubwc_cfg *ubwc; 355 356 /* Pipe */ 357 enum dpu_sspp idx; 358 const struct dpu_sspp_cfg *cap; 359 360 /* Ops */ 361 struct dpu_hw_sspp_ops ops; 362 }; 363 364 struct dpu_kms; 365 /** 366 * dpu_hw_sspp_init - initializes the sspp hw driver object. 367 * Should be called once before accessing every pipe. 368 * @idx: Pipe index for which driver object is required 369 * @addr: Mapped register io address of MDP 370 * @catalog : Pointer to mdss catalog data 371 */ 372 struct dpu_hw_sspp *dpu_hw_sspp_init(enum dpu_sspp idx, 373 void __iomem *addr, const struct dpu_mdss_cfg *catalog); 374 375 /** 376 * dpu_hw_sspp_destroy(): Destroys SSPP driver context 377 * should be called during Hw pipe cleanup. 378 * @ctx: Pointer to SSPP driver context returned by dpu_hw_sspp_init 379 */ 380 void dpu_hw_sspp_destroy(struct dpu_hw_sspp *ctx); 381 382 int _dpu_hw_sspp_init_debugfs(struct dpu_hw_sspp *hw_pipe, struct dpu_kms *kms, 383 struct dentry *entry); 384 385 #endif /*_DPU_HW_SSPP_H */ 386 387