1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 3 */ 4 5 #ifndef _DPU_HW_PINGPONG_H 6 #define _DPU_HW_PINGPONG_H 7 8 #include "dpu_hw_catalog.h" 9 #include "dpu_hw_mdss.h" 10 #include "dpu_hw_util.h" 11 #include "dpu_hw_blk.h" 12 13 #define DITHER_MATRIX_SZ 16 14 15 struct dpu_hw_pingpong; 16 17 struct dpu_hw_tear_check { 18 /* 19 * This is ratio of MDP VSYNC clk freq(Hz) to 20 * refresh rate divided by no of lines 21 */ 22 u32 vsync_count; 23 u32 sync_cfg_height; 24 u32 vsync_init_val; 25 u32 sync_threshold_start; 26 u32 sync_threshold_continue; 27 u32 start_pos; 28 u32 rd_ptr_irq; 29 u8 hw_vsync_mode; 30 }; 31 32 struct dpu_hw_pp_vsync_info { 33 u32 rd_ptr_init_val; /* value of rd pointer at vsync edge */ 34 u32 rd_ptr_frame_count; /* num frames sent since enabling interface */ 35 u32 rd_ptr_line_count; /* current line on panel (rd ptr) */ 36 u32 wr_ptr_line_count; /* current line within pp fifo (wr ptr) */ 37 }; 38 39 /** 40 * struct dpu_hw_dither_cfg - dither feature structure 41 * @flags: for customizing operations 42 * @temporal_en: temperal dither enable 43 * @c0_bitdepth: c0 component bit depth 44 * @c1_bitdepth: c1 component bit depth 45 * @c2_bitdepth: c2 component bit depth 46 * @c3_bitdepth: c2 component bit depth 47 * @matrix: dither strength matrix 48 */ 49 struct dpu_hw_dither_cfg { 50 u64 flags; 51 u32 temporal_en; 52 u32 c0_bitdepth; 53 u32 c1_bitdepth; 54 u32 c2_bitdepth; 55 u32 c3_bitdepth; 56 u32 matrix[DITHER_MATRIX_SZ]; 57 }; 58 59 /** 60 * 61 * struct dpu_hw_pingpong_ops : Interface to the pingpong Hw driver functions 62 * Assumption is these functions will be called after clocks are enabled 63 * @setup_tearcheck : program tear check values 64 * @enable_tearcheck : enables tear check 65 * @get_vsync_info : retries timing info of the panel 66 * @setup_autorefresh : configure and enable the autorefresh config 67 * @get_autorefresh : retrieve autorefresh config from hardware 68 * @setup_dither : function to program the dither hw block 69 * @get_line_count: obtain current vertical line counter 70 */ 71 struct dpu_hw_pingpong_ops { 72 /** 73 * enables vysnc generation and sets up init value of 74 * read pointer and programs the tear check cofiguration 75 */ 76 int (*setup_tearcheck)(struct dpu_hw_pingpong *pp, 77 struct dpu_hw_tear_check *cfg); 78 79 /** 80 * enables tear check block 81 */ 82 int (*enable_tearcheck)(struct dpu_hw_pingpong *pp, 83 bool enable); 84 85 /** 86 * read, modify, write to either set or clear listening to external TE 87 * @Return: 1 if TE was originally connected, 0 if not, or -ERROR 88 */ 89 int (*connect_external_te)(struct dpu_hw_pingpong *pp, 90 bool enable_external_te); 91 92 /** 93 * provides the programmed and current 94 * line_count 95 */ 96 int (*get_vsync_info)(struct dpu_hw_pingpong *pp, 97 struct dpu_hw_pp_vsync_info *info); 98 99 /** 100 * configure and enable the autorefresh config 101 */ 102 void (*setup_autorefresh)(struct dpu_hw_pingpong *pp, 103 u32 frame_count, bool enable); 104 105 /** 106 * retrieve autorefresh config from hardware 107 */ 108 bool (*get_autorefresh)(struct dpu_hw_pingpong *pp, 109 u32 *frame_count); 110 111 /** 112 * poll until write pointer transmission starts 113 * @Return: 0 on success, -ETIMEDOUT on timeout 114 */ 115 int (*poll_timeout_wr_ptr)(struct dpu_hw_pingpong *pp, u32 timeout_us); 116 117 /** 118 * Obtain current vertical line counter 119 */ 120 u32 (*get_line_count)(struct dpu_hw_pingpong *pp); 121 122 /** 123 * Setup dither matix for pingpong block 124 */ 125 void (*setup_dither)(struct dpu_hw_pingpong *pp, 126 struct dpu_hw_dither_cfg *cfg); 127 /** 128 * Enable DSC 129 */ 130 int (*enable_dsc)(struct dpu_hw_pingpong *pp); 131 132 /** 133 * Disable DSC 134 */ 135 void (*disable_dsc)(struct dpu_hw_pingpong *pp); 136 137 /** 138 * Setup DSC 139 */ 140 int (*setup_dsc)(struct dpu_hw_pingpong *pp); 141 }; 142 143 struct dpu_hw_merge_3d; 144 145 struct dpu_hw_pingpong { 146 struct dpu_hw_blk base; 147 struct dpu_hw_blk_reg_map hw; 148 149 /* pingpong */ 150 enum dpu_pingpong idx; 151 const struct dpu_pingpong_cfg *caps; 152 struct dpu_hw_merge_3d *merge_3d; 153 154 /* ops */ 155 struct dpu_hw_pingpong_ops ops; 156 }; 157 158 /** 159 * to_dpu_hw_pingpong - convert base object dpu_hw_base to container 160 * @hw: Pointer to base hardware block 161 * return: Pointer to hardware block container 162 */ 163 static inline struct dpu_hw_pingpong *to_dpu_hw_pingpong(struct dpu_hw_blk *hw) 164 { 165 return container_of(hw, struct dpu_hw_pingpong, base); 166 } 167 168 /** 169 * dpu_hw_pingpong_init - initializes the pingpong driver for the passed 170 * pingpong idx. 171 * @idx: Pingpong index for which driver object is required 172 * @addr: Mapped register io address of MDP 173 * @m: Pointer to mdss catalog data 174 * Returns: Error code or allocated dpu_hw_pingpong context 175 */ 176 struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx, 177 void __iomem *addr, 178 const struct dpu_mdss_cfg *m); 179 180 /** 181 * dpu_hw_pingpong_destroy - destroys pingpong driver context 182 * should be called to free the context 183 * @pp: Pointer to PP driver context returned by dpu_hw_pingpong_init 184 */ 185 void dpu_hw_pingpong_destroy(struct dpu_hw_pingpong *pp); 186 187 #endif /*_DPU_HW_PINGPONG_H */ 188