1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 3 */ 4 5 #include <linux/iopoll.h> 6 7 #include "dpu_hw_mdss.h" 8 #include "dpu_hwio.h" 9 #include "dpu_hw_catalog.h" 10 #include "dpu_hw_merge3d.h" 11 #include "dpu_kms.h" 12 #include "dpu_trace.h" 13 14 #define MERGE_3D_MUX 0x000 15 #define MERGE_3D_MODE 0x004 16 17 static const struct dpu_merge_3d_cfg *_merge_3d_offset(enum dpu_merge_3d idx, 18 const struct dpu_mdss_cfg *m, 19 void __iomem *addr, 20 struct dpu_hw_blk_reg_map *b) 21 { 22 int i; 23 24 for (i = 0; i < m->merge_3d_count; i++) { 25 if (idx == m->merge_3d[i].id) { 26 b->blk_addr = addr + m->merge_3d[i].base; 27 b->log_mask = DPU_DBG_MASK_PINGPONG; 28 return &m->merge_3d[i]; 29 } 30 } 31 32 return ERR_PTR(-EINVAL); 33 } 34 35 static void dpu_hw_merge_3d_setup_3d_mode(struct dpu_hw_merge_3d *merge_3d, 36 enum dpu_3d_blend_mode mode_3d) 37 { 38 struct dpu_hw_blk_reg_map *c; 39 u32 data; 40 41 42 c = &merge_3d->hw; 43 if (mode_3d == BLEND_3D_NONE) { 44 DPU_REG_WRITE(c, MERGE_3D_MODE, 0); 45 DPU_REG_WRITE(c, MERGE_3D_MUX, 0); 46 } else { 47 data = BIT(0) | ((mode_3d - 1) << 1); 48 DPU_REG_WRITE(c, MERGE_3D_MODE, data); 49 } 50 } 51 52 static void _setup_merge_3d_ops(struct dpu_hw_merge_3d *c, 53 unsigned long features) 54 { 55 c->ops.setup_3d_mode = dpu_hw_merge_3d_setup_3d_mode; 56 }; 57 58 struct dpu_hw_merge_3d *dpu_hw_merge_3d_init(enum dpu_merge_3d idx, 59 void __iomem *addr, 60 const struct dpu_mdss_cfg *m) 61 { 62 struct dpu_hw_merge_3d *c; 63 const struct dpu_merge_3d_cfg *cfg; 64 65 c = kzalloc(sizeof(*c), GFP_KERNEL); 66 if (!c) 67 return ERR_PTR(-ENOMEM); 68 69 cfg = _merge_3d_offset(idx, m, addr, &c->hw); 70 if (IS_ERR_OR_NULL(cfg)) { 71 kfree(c); 72 return ERR_PTR(-EINVAL); 73 } 74 75 c->idx = idx; 76 c->caps = cfg; 77 _setup_merge_3d_ops(c, c->caps->features); 78 79 return c; 80 } 81 82 void dpu_hw_merge_3d_destroy(struct dpu_hw_merge_3d *hw) 83 { 84 kfree(hw); 85 } 86