197fb5e8dSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 225fdd593SJeykumar Sankaran /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 325fdd593SJeykumar Sankaran */ 425fdd593SJeykumar Sankaran 525fdd593SJeykumar Sankaran #ifndef _DPU_HW_LM_H 625fdd593SJeykumar Sankaran #define _DPU_HW_LM_H 725fdd593SJeykumar Sankaran 825fdd593SJeykumar Sankaran #include "dpu_hw_mdss.h" 925fdd593SJeykumar Sankaran #include "dpu_hw_util.h" 1025fdd593SJeykumar Sankaran #include "dpu_hw_blk.h" 1125fdd593SJeykumar Sankaran 1225fdd593SJeykumar Sankaran struct dpu_hw_mixer; 1325fdd593SJeykumar Sankaran 1425fdd593SJeykumar Sankaran struct dpu_hw_mixer_cfg { 1525fdd593SJeykumar Sankaran u32 out_width; 1625fdd593SJeykumar Sankaran u32 out_height; 1725fdd593SJeykumar Sankaran bool right_mixer; 1825fdd593SJeykumar Sankaran int flags; 1925fdd593SJeykumar Sankaran }; 2025fdd593SJeykumar Sankaran 2125fdd593SJeykumar Sankaran struct dpu_hw_color3_cfg { 2225fdd593SJeykumar Sankaran u8 keep_fg[DPU_STAGE_MAX]; 2325fdd593SJeykumar Sankaran }; 2425fdd593SJeykumar Sankaran 2525fdd593SJeykumar Sankaran /** 2625fdd593SJeykumar Sankaran * 2725fdd593SJeykumar Sankaran * struct dpu_hw_lm_ops : Interface to the mixer Hw driver functions 2825fdd593SJeykumar Sankaran * Assumption is these functions will be called after clocks are enabled 2925fdd593SJeykumar Sankaran */ 3025fdd593SJeykumar Sankaran struct dpu_hw_lm_ops { 3125fdd593SJeykumar Sankaran /* 3225fdd593SJeykumar Sankaran * Sets up mixer output width and height 3325fdd593SJeykumar Sankaran * and border color if enabled 3425fdd593SJeykumar Sankaran */ 3525fdd593SJeykumar Sankaran void (*setup_mixer_out)(struct dpu_hw_mixer *ctx, 3625fdd593SJeykumar Sankaran struct dpu_hw_mixer_cfg *cfg); 3725fdd593SJeykumar Sankaran 3825fdd593SJeykumar Sankaran /* 3925fdd593SJeykumar Sankaran * Alpha blending configuration 4025fdd593SJeykumar Sankaran * for the specified stage 4125fdd593SJeykumar Sankaran */ 4225fdd593SJeykumar Sankaran void (*setup_blend_config)(struct dpu_hw_mixer *ctx, uint32_t stage, 4325fdd593SJeykumar Sankaran uint32_t fg_alpha, uint32_t bg_alpha, uint32_t blend_op); 4425fdd593SJeykumar Sankaran 4525fdd593SJeykumar Sankaran /* 4625fdd593SJeykumar Sankaran * Alpha color component selection from either fg or bg 4725fdd593SJeykumar Sankaran */ 4825fdd593SJeykumar Sankaran void (*setup_alpha_out)(struct dpu_hw_mixer *ctx, uint32_t mixer_op); 4925fdd593SJeykumar Sankaran 5025fdd593SJeykumar Sankaran /** 5125fdd593SJeykumar Sankaran * setup_border_color : enable/disable border color 5225fdd593SJeykumar Sankaran */ 5325fdd593SJeykumar Sankaran void (*setup_border_color)(struct dpu_hw_mixer *ctx, 5425fdd593SJeykumar Sankaran struct dpu_mdss_color *color, 5525fdd593SJeykumar Sankaran u8 border_en); 5625fdd593SJeykumar Sankaran }; 5725fdd593SJeykumar Sankaran 5825fdd593SJeykumar Sankaran struct dpu_hw_mixer { 5925fdd593SJeykumar Sankaran struct dpu_hw_blk base; 6025fdd593SJeykumar Sankaran struct dpu_hw_blk_reg_map hw; 6125fdd593SJeykumar Sankaran 6225fdd593SJeykumar Sankaran /* lm */ 6325fdd593SJeykumar Sankaran enum dpu_lm idx; 6425fdd593SJeykumar Sankaran const struct dpu_lm_cfg *cap; 6525fdd593SJeykumar Sankaran const struct dpu_mdp_cfg *mdp; 6625fdd593SJeykumar Sankaran const struct dpu_ctl_cfg *ctl; 6725fdd593SJeykumar Sankaran 6825fdd593SJeykumar Sankaran /* ops */ 6925fdd593SJeykumar Sankaran struct dpu_hw_lm_ops ops; 7025fdd593SJeykumar Sankaran 7125fdd593SJeykumar Sankaran /* store mixer info specific to display */ 7225fdd593SJeykumar Sankaran struct dpu_hw_mixer_cfg cfg; 7325fdd593SJeykumar Sankaran }; 7425fdd593SJeykumar Sankaran 7525fdd593SJeykumar Sankaran /** 7625fdd593SJeykumar Sankaran * to_dpu_hw_mixer - convert base object dpu_hw_base to container 7725fdd593SJeykumar Sankaran * @hw: Pointer to base hardware block 7825fdd593SJeykumar Sankaran * return: Pointer to hardware block container 7925fdd593SJeykumar Sankaran */ 8025fdd593SJeykumar Sankaran static inline struct dpu_hw_mixer *to_dpu_hw_mixer(struct dpu_hw_blk *hw) 8125fdd593SJeykumar Sankaran { 8225fdd593SJeykumar Sankaran return container_of(hw, struct dpu_hw_mixer, base); 8325fdd593SJeykumar Sankaran } 8425fdd593SJeykumar Sankaran 8525fdd593SJeykumar Sankaran /** 8625fdd593SJeykumar Sankaran * dpu_hw_lm_init(): Initializes the mixer hw driver object. 8725fdd593SJeykumar Sankaran * should be called once before accessing every mixer. 8825fdd593SJeykumar Sankaran * @idx: mixer index for which driver object is required 8925fdd593SJeykumar Sankaran * @addr: mapped register io address of MDP 9025fdd593SJeykumar Sankaran * @m : pointer to mdss catalog data 9125fdd593SJeykumar Sankaran */ 9225fdd593SJeykumar Sankaran struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx, 9325fdd593SJeykumar Sankaran void __iomem *addr, 9425fdd593SJeykumar Sankaran struct dpu_mdss_cfg *m); 9525fdd593SJeykumar Sankaran 9625fdd593SJeykumar Sankaran /** 9725fdd593SJeykumar Sankaran * dpu_hw_lm_destroy(): Destroys layer mixer driver context 9825fdd593SJeykumar Sankaran * @lm: Pointer to LM driver context 9925fdd593SJeykumar Sankaran */ 10025fdd593SJeykumar Sankaran void dpu_hw_lm_destroy(struct dpu_hw_mixer *lm); 10125fdd593SJeykumar Sankaran 10225fdd593SJeykumar Sankaran #endif /*_DPU_HW_LM_H */ 103