1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. 4 * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 5 */ 6 7 #ifndef _DPU_HW_INTF_H 8 #define _DPU_HW_INTF_H 9 10 #include "dpu_hw_catalog.h" 11 #include "dpu_hw_mdss.h" 12 #include "dpu_hw_util.h" 13 14 struct dpu_hw_intf; 15 16 /* intf timing settings */ 17 struct intf_timing_params { 18 u32 width; /* active width */ 19 u32 height; /* active height */ 20 u32 xres; /* Display panel width */ 21 u32 yres; /* Display panel height */ 22 23 u32 h_back_porch; 24 u32 h_front_porch; 25 u32 v_back_porch; 26 u32 v_front_porch; 27 u32 hsync_pulse_width; 28 u32 vsync_pulse_width; 29 u32 hsync_polarity; 30 u32 vsync_polarity; 31 u32 border_clr; 32 u32 underflow_clr; 33 u32 hsync_skew; 34 35 bool wide_bus_en; 36 }; 37 38 struct intf_prog_fetch { 39 u8 enable; 40 /* vsync counter for the front porch pixel line */ 41 u32 fetch_start; 42 }; 43 44 struct intf_status { 45 u8 is_en; /* interface timing engine is enabled or not */ 46 u8 is_prog_fetch_en; /* interface prog fetch counter is enabled or not */ 47 u32 frame_count; /* frame count since timing engine enabled */ 48 u32 line_count; /* current line count including blanking */ 49 }; 50 51 /** 52 * struct dpu_hw_intf_ops : Interface to the interface Hw driver functions 53 * Assumption is these functions will be called after clocks are enabled 54 * @ setup_timing_gen : programs the timing engine 55 * @ setup_prog_fetch : enables/disables the programmable fetch logic 56 * @ enable_timing: enable/disable timing engine 57 * @ get_status: returns if timing engine is enabled or not 58 * @ get_line_count: reads current vertical line counter 59 * @bind_pingpong_blk: enable/disable the connection with pingpong which will 60 * feed pixels to this interface 61 * @setup_misr: enable/disable MISR 62 * @collect_misr: read MISR signature 63 * @enable_tearcheck: Enables vsync generation and sets up init value of read 64 * pointer and programs the tear check configuration 65 * @disable_tearcheck: Disables tearcheck block 66 * @connect_external_te: Read, modify, write to either set or clear listening to external TE 67 * Return: 1 if TE was originally connected, 0 if not, or -ERROR 68 * @get_vsync_info: Provides the programmed and current line_count 69 * @setup_autorefresh: Configure and enable the autorefresh config 70 * @get_autorefresh: Retrieve autorefresh config from hardware 71 * Return: 0 on success, -ETIMEDOUT on timeout 72 * @vsync_sel: Select vsync signal for tear-effect configuration 73 * @enable_compression: Enable data compression 74 */ 75 struct dpu_hw_intf_ops { 76 void (*setup_timing_gen)(struct dpu_hw_intf *intf, 77 const struct intf_timing_params *p, 78 const struct dpu_format *fmt); 79 80 void (*setup_prg_fetch)(struct dpu_hw_intf *intf, 81 const struct intf_prog_fetch *fetch); 82 83 void (*enable_timing)(struct dpu_hw_intf *intf, 84 u8 enable); 85 86 void (*get_status)(struct dpu_hw_intf *intf, 87 struct intf_status *status); 88 89 u32 (*get_line_count)(struct dpu_hw_intf *intf); 90 91 void (*bind_pingpong_blk)(struct dpu_hw_intf *intf, 92 const enum dpu_pingpong pp); 93 void (*setup_misr)(struct dpu_hw_intf *intf, bool enable, u32 frame_count); 94 int (*collect_misr)(struct dpu_hw_intf *intf, u32 *misr_value); 95 96 // Tearcheck on INTF since DPU 5.0.0 97 98 int (*enable_tearcheck)(struct dpu_hw_intf *intf, struct dpu_hw_tear_check *cfg); 99 100 int (*disable_tearcheck)(struct dpu_hw_intf *intf); 101 102 int (*connect_external_te)(struct dpu_hw_intf *intf, bool enable_external_te); 103 104 void (*vsync_sel)(struct dpu_hw_intf *intf, u32 vsync_source); 105 106 /** 107 * Disable autorefresh if enabled 108 */ 109 void (*disable_autorefresh)(struct dpu_hw_intf *intf, uint32_t encoder_id, u16 vdisplay); 110 111 void (*enable_compression)(struct dpu_hw_intf *intf); 112 }; 113 114 struct dpu_hw_intf { 115 struct dpu_hw_blk_reg_map hw; 116 117 /* intf */ 118 enum dpu_intf idx; 119 const struct dpu_intf_cfg *cap; 120 121 /* ops */ 122 struct dpu_hw_intf_ops ops; 123 }; 124 125 /** 126 * dpu_hw_intf_init() - Initializes the INTF driver for the passed 127 * interface catalog entry. 128 * @cfg: interface catalog entry for which driver object is required 129 * @addr: mapped register io address of MDP 130 */ 131 struct dpu_hw_intf *dpu_hw_intf_init(const struct dpu_intf_cfg *cfg, 132 void __iomem *addr); 133 134 /** 135 * dpu_hw_intf_destroy(): Destroys INTF driver context 136 * @intf: Pointer to INTF driver context 137 */ 138 void dpu_hw_intf_destroy(struct dpu_hw_intf *intf); 139 140 #endif /*_DPU_HW_INTF_H */ 141