1 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 2 * 3 * This program is free software; you can redistribute it and/or modify 4 * it under the terms of the GNU General Public License version 2 and 5 * only version 2 as published by the Free Software Foundation. 6 * 7 * This program is distributed in the hope that it will be useful, 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * GNU General Public License for more details. 11 */ 12 13 #ifndef _DPU_HW_INTF_H 14 #define _DPU_HW_INTF_H 15 16 #include "dpu_hw_catalog.h" 17 #include "dpu_hw_mdss.h" 18 #include "dpu_hw_util.h" 19 #include "dpu_hw_blk.h" 20 21 struct dpu_hw_intf; 22 23 /* intf timing settings */ 24 struct intf_timing_params { 25 u32 width; /* active width */ 26 u32 height; /* active height */ 27 u32 xres; /* Display panel width */ 28 u32 yres; /* Display panel height */ 29 30 u32 h_back_porch; 31 u32 h_front_porch; 32 u32 v_back_porch; 33 u32 v_front_porch; 34 u32 hsync_pulse_width; 35 u32 vsync_pulse_width; 36 u32 hsync_polarity; 37 u32 vsync_polarity; 38 u32 border_clr; 39 u32 underflow_clr; 40 u32 hsync_skew; 41 }; 42 43 struct intf_prog_fetch { 44 u8 enable; 45 /* vsync counter for the front porch pixel line */ 46 u32 fetch_start; 47 }; 48 49 struct intf_status { 50 u8 is_en; /* interface timing engine is enabled or not */ 51 u32 frame_count; /* frame count since timing engine enabled */ 52 u32 line_count; /* current line count including blanking */ 53 }; 54 55 /** 56 * struct dpu_hw_intf_ops : Interface to the interface Hw driver functions 57 * Assumption is these functions will be called after clocks are enabled 58 * @ setup_timing_gen : programs the timing engine 59 * @ setup_prog_fetch : enables/disables the programmable fetch logic 60 * @ enable_timing: enable/disable timing engine 61 * @ get_status: returns if timing engine is enabled or not 62 * @ get_line_count: reads current vertical line counter 63 */ 64 struct dpu_hw_intf_ops { 65 void (*setup_timing_gen)(struct dpu_hw_intf *intf, 66 const struct intf_timing_params *p, 67 const struct dpu_format *fmt); 68 69 void (*setup_prg_fetch)(struct dpu_hw_intf *intf, 70 const struct intf_prog_fetch *fetch); 71 72 void (*enable_timing)(struct dpu_hw_intf *intf, 73 u8 enable); 74 75 void (*get_status)(struct dpu_hw_intf *intf, 76 struct intf_status *status); 77 78 u32 (*get_line_count)(struct dpu_hw_intf *intf); 79 }; 80 81 struct dpu_hw_intf { 82 struct dpu_hw_blk base; 83 struct dpu_hw_blk_reg_map hw; 84 85 /* intf */ 86 enum dpu_intf idx; 87 const struct dpu_intf_cfg *cap; 88 const struct dpu_mdss_cfg *mdss; 89 90 /* ops */ 91 struct dpu_hw_intf_ops ops; 92 }; 93 94 /** 95 * dpu_hw_intf_init(): Initializes the intf driver for the passed 96 * interface idx. 97 * @idx: interface index for which driver object is required 98 * @addr: mapped register io address of MDP 99 * @m : pointer to mdss catalog data 100 */ 101 struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx, 102 void __iomem *addr, 103 struct dpu_mdss_cfg *m); 104 105 /** 106 * dpu_hw_intf_destroy(): Destroys INTF driver context 107 * @intf: Pointer to INTF driver context 108 */ 109 void dpu_hw_intf_destroy(struct dpu_hw_intf *intf); 110 111 #endif /*_DPU_HW_INTF_H */ 112