1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
3  */
4 
5 #ifndef _DPU_HW_INTERRUPTS_H
6 #define _DPU_HW_INTERRUPTS_H
7 
8 #include <linux/types.h>
9 
10 #include "dpu_hwio.h"
11 #include "dpu_hw_catalog.h"
12 #include "dpu_hw_util.h"
13 #include "dpu_hw_mdss.h"
14 
15 /* When making changes be sure to sync with dpu_intr_set */
16 enum dpu_hw_intr_reg {
17 	MDP_SSPP_TOP0_INTR,
18 	MDP_SSPP_TOP0_INTR2,
19 	MDP_SSPP_TOP0_HIST_INTR,
20 	MDP_INTF0_INTR,
21 	MDP_INTF1_INTR,
22 	MDP_INTF2_INTR,
23 	MDP_INTF3_INTR,
24 	MDP_INTF4_INTR,
25 	MDP_AD4_0_INTR,
26 	MDP_AD4_1_INTR,
27 	MDP_INTF0_7xxx_INTR,
28 	MDP_INTF1_7xxx_INTR,
29 	MDP_INTF5_7xxx_INTR,
30 	MDP_INTR_MAX,
31 };
32 
33 #define DPU_IRQ_IDX(reg_idx, offset)	(reg_idx * 32 + offset)
34 
35 struct dpu_hw_intr;
36 
37 /**
38  * Interrupt operations.
39  */
40 struct dpu_hw_intr_ops {
41 
42 	/**
43 	 * enable_irq - Enable IRQ based on lookup IRQ index
44 	 * @intr:	HW interrupt handle
45 	 * @irq_idx:	Lookup irq index return from irq_idx_lookup
46 	 * @return:	0 for success, otherwise failure
47 	 */
48 	int (*enable_irq_locked)(
49 			struct dpu_hw_intr *intr,
50 			int irq_idx);
51 
52 	/**
53 	 * disable_irq - Disable IRQ based on lookup IRQ index
54 	 * @intr:	HW interrupt handle
55 	 * @irq_idx:	Lookup irq index return from irq_idx_lookup
56 	 * @return:	0 for success, otherwise failure
57 	 */
58 	int (*disable_irq_locked)(
59 			struct dpu_hw_intr *intr,
60 			int irq_idx);
61 
62 	/**
63 	 * clear_all_irqs - Clears all the interrupts (i.e. acknowledges
64 	 *                  any asserted IRQs). Useful during reset.
65 	 * @intr:	HW interrupt handle
66 	 * @return:	0 for success, otherwise failure
67 	 */
68 	int (*clear_all_irqs)(
69 			struct dpu_hw_intr *intr);
70 
71 	/**
72 	 * disable_all_irqs - Disables all the interrupts. Useful during reset.
73 	 * @intr:	HW interrupt handle
74 	 * @return:	0 for success, otherwise failure
75 	 */
76 	int (*disable_all_irqs)(
77 			struct dpu_hw_intr *intr);
78 
79 	/**
80 	 * dispatch_irqs - IRQ dispatcher will call the given callback
81 	 *                 function when a matching interrupt status bit is
82 	 *                 found in the irq mapping table.
83 	 * @intr:	HW interrupt handle
84 	 * @cbfunc:	Callback function pointer
85 	 * @arg:	Argument to pass back during callback
86 	 */
87 	void (*dispatch_irqs)(
88 			struct dpu_hw_intr *intr,
89 			void (*cbfunc)(void *arg, int irq_idx),
90 			void *arg);
91 
92 	/**
93 	 * get_interrupt_status - Gets HW interrupt status, and clear if set,
94 	 *                        based on given lookup IRQ index.
95 	 * @intr:	HW interrupt handle
96 	 * @irq_idx:	Lookup irq index return from irq_idx_lookup
97 	 * @clear:	True to clear irq after read
98 	 */
99 	u32 (*get_interrupt_status)(
100 			struct dpu_hw_intr *intr,
101 			int irq_idx,
102 			bool clear);
103 
104 	/**
105 	 * lock - take the IRQ lock
106 	 * @intr:	HW interrupt handle
107 	 * @return:	irq_flags for the taken spinlock
108 	 */
109 	unsigned long (*lock)(
110 			struct dpu_hw_intr *intr);
111 
112 	/**
113 	 * unlock - take the IRQ lock
114 	 * @intr:	HW interrupt handle
115 	 * @irq_flags:  the irq_flags returned from lock
116 	 */
117 	void (*unlock)(
118 			struct dpu_hw_intr *intr, unsigned long irq_flags);
119 };
120 
121 /**
122  * struct dpu_hw_intr: hw interrupts handling data structure
123  * @hw:               virtual address mapping
124  * @ops:              function pointer mapping for IRQ handling
125  * @cache_irq_mask:   array of IRQ enable masks reg storage created during init
126  * @save_irq_status:  array of IRQ status reg storage created during init
127  * @total_irqs: total number of irq_idx mapped in the hw_interrupts
128  * @irq_lock:         spinlock for accessing IRQ resources
129  */
130 struct dpu_hw_intr {
131 	struct dpu_hw_blk_reg_map hw;
132 	struct dpu_hw_intr_ops ops;
133 	u32 *cache_irq_mask;
134 	u32 *save_irq_status;
135 	u32 total_irqs;
136 	spinlock_t irq_lock;
137 	unsigned long irq_mask;
138 };
139 
140 /**
141  * dpu_hw_intr_init(): Initializes the interrupts hw object
142  * @addr: mapped register io address of MDP
143  * @m :   pointer to mdss catalog data
144  */
145 struct dpu_hw_intr *dpu_hw_intr_init(void __iomem *addr,
146 		struct dpu_mdss_cfg *m);
147 
148 /**
149  * dpu_hw_intr_destroy(): Cleanup interrutps hw object
150  * @intr: pointer to interrupts hw object
151  */
152 void dpu_hw_intr_destroy(struct dpu_hw_intr *intr);
153 #endif
154