1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
3  */
4 
5 #ifndef _DPU_HW_INTERRUPTS_H
6 #define _DPU_HW_INTERRUPTS_H
7 
8 #include <linux/types.h>
9 
10 #include "dpu_hwio.h"
11 #include "dpu_hw_catalog.h"
12 #include "dpu_hw_util.h"
13 #include "dpu_hw_mdss.h"
14 
15 /* When making changes be sure to sync with dpu_intr_set */
16 enum dpu_hw_intr_reg {
17 	MDP_SSPP_TOP0_INTR,
18 	MDP_SSPP_TOP0_INTR2,
19 	MDP_SSPP_TOP0_HIST_INTR,
20 	MDP_INTF0_INTR,
21 	MDP_INTF1_INTR,
22 	MDP_INTF2_INTR,
23 	MDP_INTF3_INTR,
24 	MDP_INTF4_INTR,
25 	MDP_INTF5_INTR,
26 	MDP_AD4_0_INTR,
27 	MDP_AD4_1_INTR,
28 	MDP_INTF0_7xxx_INTR,
29 	MDP_INTF1_7xxx_INTR,
30 	MDP_INTF2_7xxx_INTR,
31 	MDP_INTF3_7xxx_INTR,
32 	MDP_INTF4_7xxx_INTR,
33 	MDP_INTF5_7xxx_INTR,
34 	MDP_INTF6_7xxx_INTR,
35 	MDP_INTF7_7xxx_INTR,
36 	MDP_INTF8_7xxx_INTR,
37 	MDP_INTR_MAX,
38 };
39 
40 #define DPU_IRQ_IDX(reg_idx, offset)	(reg_idx * 32 + offset)
41 
42 /**
43  * struct dpu_hw_intr: hw interrupts handling data structure
44  * @hw:               virtual address mapping
45  * @ops:              function pointer mapping for IRQ handling
46  * @cache_irq_mask:   array of IRQ enable masks reg storage created during init
47  * @save_irq_status:  array of IRQ status reg storage created during init
48  * @total_irqs: total number of irq_idx mapped in the hw_interrupts
49  * @irq_lock:         spinlock for accessing IRQ resources
50  * @irq_cb_tbl:       array of IRQ callbacks
51  */
52 struct dpu_hw_intr {
53 	struct dpu_hw_blk_reg_map hw;
54 	u32 cache_irq_mask[MDP_INTR_MAX];
55 	u32 *save_irq_status;
56 	u32 total_irqs;
57 	spinlock_t irq_lock;
58 	unsigned long irq_mask;
59 
60 	struct {
61 		void (*cb)(void *arg, int irq_idx);
62 		void *arg;
63 		atomic_t count;
64 	} irq_tbl[];
65 };
66 
67 /**
68  * dpu_hw_intr_init(): Initializes the interrupts hw object
69  * @addr: mapped register io address of MDP
70  * @m :   pointer to mdss catalog data
71  */
72 struct dpu_hw_intr *dpu_hw_intr_init(void __iomem *addr,
73 		const struct dpu_mdss_cfg *m);
74 
75 /**
76  * dpu_hw_intr_destroy(): Cleanup interrutps hw object
77  * @intr: pointer to interrupts hw object
78  */
79 void dpu_hw_intr_destroy(struct dpu_hw_intr *intr);
80 #endif
81