197fb5e8dSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 225fdd593SJeykumar Sankaran /* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. 325fdd593SJeykumar Sankaran */ 425fdd593SJeykumar Sankaran 525fdd593SJeykumar Sankaran #ifndef _DPU_HW_INTERRUPTS_H 625fdd593SJeykumar Sankaran #define _DPU_HW_INTERRUPTS_H 725fdd593SJeykumar Sankaran 825fdd593SJeykumar Sankaran #include <linux/types.h> 925fdd593SJeykumar Sankaran 1025fdd593SJeykumar Sankaran #include "dpu_hwio.h" 1125fdd593SJeykumar Sankaran #include "dpu_hw_catalog.h" 1225fdd593SJeykumar Sankaran #include "dpu_hw_util.h" 1325fdd593SJeykumar Sankaran #include "dpu_hw_mdss.h" 1425fdd593SJeykumar Sankaran 15597762d5SDmitry Baryshkov /* When making changes be sure to sync with dpu_intr_set */ 16597762d5SDmitry Baryshkov enum dpu_hw_intr_reg { 17597762d5SDmitry Baryshkov MDP_SSPP_TOP0_INTR, 18597762d5SDmitry Baryshkov MDP_SSPP_TOP0_INTR2, 19597762d5SDmitry Baryshkov MDP_SSPP_TOP0_HIST_INTR, 20bf8198ccSDmitry Baryshkov /* All MDP_INTFn_INTR should come sequentially */ 21597762d5SDmitry Baryshkov MDP_INTF0_INTR, 22597762d5SDmitry Baryshkov MDP_INTF1_INTR, 23597762d5SDmitry Baryshkov MDP_INTF2_INTR, 24597762d5SDmitry Baryshkov MDP_INTF3_INTR, 25597762d5SDmitry Baryshkov MDP_INTF4_INTR, 26148e852fSBjorn Andersson MDP_INTF5_INTR, 27370891f0SDmitry Baryshkov MDP_INTF6_INTR, 28370891f0SDmitry Baryshkov MDP_INTF7_INTR, 29370891f0SDmitry Baryshkov MDP_INTF8_INTR, 30ec6e9b67SMarijn Suijten MDP_INTF1_TEAR_INTR, 31ec6e9b67SMarijn Suijten MDP_INTF2_TEAR_INTR, 32597762d5SDmitry Baryshkov MDP_AD4_0_INTR, 33597762d5SDmitry Baryshkov MDP_AD4_1_INTR, 34597762d5SDmitry Baryshkov MDP_INTR_MAX, 35597762d5SDmitry Baryshkov }; 36597762d5SDmitry Baryshkov 37bf8198ccSDmitry Baryshkov #define MDP_INTFn_INTR(intf) (MDP_INTF0_INTR + (intf - INTF_0)) 38bf8198ccSDmitry Baryshkov 39667e9985SDmitry Baryshkov #define DPU_IRQ_IDX(reg_idx, offset) (reg_idx * 32 + offset) 40667e9985SDmitry Baryshkov 413bbe257cSDmitry Baryshkov #define DPU_NUM_IRQS (MDP_INTR_MAX * 32) 423bbe257cSDmitry Baryshkov 43a70ce2bbSDmitry Baryshkov struct dpu_hw_intr_entry { 44a70ce2bbSDmitry Baryshkov void (*cb)(void *arg); 45a70ce2bbSDmitry Baryshkov void *arg; 46a70ce2bbSDmitry Baryshkov atomic_t count; 47a70ce2bbSDmitry Baryshkov }; 48a70ce2bbSDmitry Baryshkov 4925fdd593SJeykumar Sankaran /** 5025fdd593SJeykumar Sankaran * struct dpu_hw_intr: hw interrupts handling data structure 5125fdd593SJeykumar Sankaran * @hw: virtual address mapping 5225fdd593SJeykumar Sankaran * @ops: function pointer mapping for IRQ handling 5325fdd593SJeykumar Sankaran * @cache_irq_mask: array of IRQ enable masks reg storage created during init 5425fdd593SJeykumar Sankaran * @save_irq_status: array of IRQ status reg storage created during init 5525fdd593SJeykumar Sankaran * @irq_lock: spinlock for accessing IRQ resources 56c929ac60SDmitry Baryshkov * @irq_cb_tbl: array of IRQ callbacks 5725fdd593SJeykumar Sankaran */ 5825fdd593SJeykumar Sankaran struct dpu_hw_intr { 5925fdd593SJeykumar Sankaran struct dpu_hw_blk_reg_map hw; 60c929ac60SDmitry Baryshkov u32 cache_irq_mask[MDP_INTR_MAX]; 6125fdd593SJeykumar Sankaran u32 *save_irq_status; 6225fdd593SJeykumar Sankaran spinlock_t irq_lock; 630846cca3SShubhashree Dhar unsigned long irq_mask; 64370891f0SDmitry Baryshkov const struct dpu_intr_reg *intr_set; 65f25f6566SDmitry Baryshkov 663bbe257cSDmitry Baryshkov struct dpu_hw_intr_entry irq_tbl[DPU_NUM_IRQS]; 6725fdd593SJeykumar Sankaran }; 6825fdd593SJeykumar Sankaran 6925fdd593SJeykumar Sankaran /** 7025fdd593SJeykumar Sankaran * dpu_hw_intr_init(): Initializes the interrupts hw object 7125fdd593SJeykumar Sankaran * @addr: mapped register io address of MDP 72babdb815SMarijn Suijten * @m: pointer to MDSS catalog data 7325fdd593SJeykumar Sankaran */ 7425fdd593SJeykumar Sankaran struct dpu_hw_intr *dpu_hw_intr_init(void __iomem *addr, 7532084967SDmitry Baryshkov const struct dpu_mdss_cfg *m); 7625fdd593SJeykumar Sankaran 7725fdd593SJeykumar Sankaran /** 7825fdd593SJeykumar Sankaran * dpu_hw_intr_destroy(): Cleanup interrutps hw object 7925fdd593SJeykumar Sankaran * @intr: pointer to interrupts hw object 8025fdd593SJeykumar Sankaran */ 8125fdd593SJeykumar Sankaran void dpu_hw_intr_destroy(struct dpu_hw_intr *intr); 8225fdd593SJeykumar Sankaran #endif 83