197fb5e8dSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 225fdd593SJeykumar Sankaran /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 353324b99SAbhinav Kumar * Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. 425fdd593SJeykumar Sankaran */ 525fdd593SJeykumar Sankaran 625fdd593SJeykumar Sankaran #define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__ 725fdd593SJeykumar Sankaran #include <linux/slab.h> 825fdd593SJeykumar Sankaran #include <linux/of_address.h> 925fdd593SJeykumar Sankaran #include <linux/platform_device.h> 1025fdd593SJeykumar Sankaran #include "dpu_hw_mdss.h" 11597762d5SDmitry Baryshkov #include "dpu_hw_interrupts.h" 1225fdd593SJeykumar Sankaran #include "dpu_hw_catalog.h" 1325fdd593SJeykumar Sankaran #include "dpu_kms.h" 1425fdd593SJeykumar Sankaran 15a2a448b4SDmitry Baryshkov #define VIG_BASE_MASK \ 16*7e3d6c54SDmitry Baryshkov (BIT(DPU_SSPP_QOS) |\ 17a2a448b4SDmitry Baryshkov BIT(DPU_SSPP_CDP) |\ 1825fdd593SJeykumar Sankaran BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_EXCL_RECT)) 1925fdd593SJeykumar Sankaran 20a2a448b4SDmitry Baryshkov #define VIG_MASK \ 21a2a448b4SDmitry Baryshkov (VIG_BASE_MASK | \ 22a2a448b4SDmitry Baryshkov BIT(DPU_SSPP_CSC_10BIT)) 23a2a448b4SDmitry Baryshkov 2494391a14SAngeloGioacchino Del Regno #define VIG_MSM8998_MASK \ 2594391a14SAngeloGioacchino Del Regno (VIG_MASK | BIT(DPU_SSPP_SCALER_QSEED3)) 2694391a14SAngeloGioacchino Del Regno 277bdc0c4bSKalyan Thota #define VIG_SDM845_MASK \ 28b8dab65bSAngeloGioacchino Del Regno (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3)) 297bdc0c4bSKalyan Thota 308b409996SDmitry Baryshkov #define VIG_SDM845_MASK_SDMA \ 318b409996SDmitry Baryshkov (VIG_SDM845_MASK | BIT(DPU_SSPP_SMART_DMA_V2)) 328b409996SDmitry Baryshkov 337bdc0c4bSKalyan Thota #define VIG_SC7180_MASK \ 34b8dab65bSAngeloGioacchino Del Regno (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED4)) 357bdc0c4bSKalyan Thota 368b409996SDmitry Baryshkov #define VIG_SC7180_MASK_SDMA \ 378b409996SDmitry Baryshkov (VIG_SC7180_MASK | BIT(DPU_SSPP_SMART_DMA_V2)) 388b409996SDmitry Baryshkov 39a2a448b4SDmitry Baryshkov #define VIG_QCM2290_MASK (VIG_BASE_MASK | BIT(DPU_SSPP_QOS_8LVL)) 405334087eSLoic Poulain 4194391a14SAngeloGioacchino Del Regno #define DMA_MSM8998_MASK \ 42*7e3d6c54SDmitry Baryshkov (BIT(DPU_SSPP_QOS) |\ 4394391a14SAngeloGioacchino Del Regno BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_TS_PREFILL_REC1) |\ 4494391a14SAngeloGioacchino Del Regno BIT(DPU_SSPP_CDP) | BIT(DPU_SSPP_EXCL_RECT)) 4594391a14SAngeloGioacchino Del Regno 46dabfdd89SVinod Polimera #define VIG_SC7280_MASK \ 47dabfdd89SVinod Polimera (VIG_SC7180_MASK | BIT(DPU_SSPP_INLINE_ROTATION)) 48dabfdd89SVinod Polimera 498b409996SDmitry Baryshkov #define VIG_SC7280_MASK_SDMA \ 508b409996SDmitry Baryshkov (VIG_SC7280_MASK | BIT(DPU_SSPP_SMART_DMA_V2)) 518b409996SDmitry Baryshkov 5225fdd593SJeykumar Sankaran #define DMA_SDM845_MASK \ 53*7e3d6c54SDmitry Baryshkov (BIT(DPU_SSPP_QOS) | BIT(DPU_SSPP_QOS_8LVL) |\ 5425fdd593SJeykumar Sankaran BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_TS_PREFILL_REC1) |\ 5525fdd593SJeykumar Sankaran BIT(DPU_SSPP_CDP) | BIT(DPU_SSPP_EXCL_RECT)) 5625fdd593SJeykumar Sankaran 5707ca1fc0SSravanthi Kollukuduru #define DMA_CURSOR_SDM845_MASK \ 5807ca1fc0SSravanthi Kollukuduru (DMA_SDM845_MASK | BIT(DPU_SSPP_CURSOR)) 5907ca1fc0SSravanthi Kollukuduru 608b409996SDmitry Baryshkov #define DMA_SDM845_MASK_SDMA \ 618b409996SDmitry Baryshkov (DMA_SDM845_MASK | BIT(DPU_SSPP_SMART_DMA_V2)) 628b409996SDmitry Baryshkov 638b409996SDmitry Baryshkov #define DMA_CURSOR_SDM845_MASK_SDMA \ 648b409996SDmitry Baryshkov (DMA_CURSOR_SDM845_MASK | BIT(DPU_SSPP_SMART_DMA_V2)) 658b409996SDmitry Baryshkov 6694391a14SAngeloGioacchino Del Regno #define DMA_CURSOR_MSM8998_MASK \ 6794391a14SAngeloGioacchino Del Regno (DMA_MSM8998_MASK | BIT(DPU_SSPP_CURSOR)) 6894391a14SAngeloGioacchino Del Regno 692d8a4edbSDmitry Baryshkov #define MIXER_MSM8998_MASK \ 70a5045b00SDmitry Baryshkov (BIT(DPU_MIXER_SOURCESPLIT)) 7125fdd593SJeykumar Sankaran 722d8a4edbSDmitry Baryshkov #define MIXER_SDM845_MASK \ 732d8a4edbSDmitry Baryshkov (BIT(DPU_MIXER_SOURCESPLIT) | BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA)) 742d8a4edbSDmitry Baryshkov 7500feff8fSDmitry Baryshkov #define MIXER_QCM2290_MASK \ 762d8a4edbSDmitry Baryshkov (BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA)) 777bdc0c4bSKalyan Thota 78fe9d66cfSMarijn Suijten #define PINGPONG_SDM845_MASK \ 79fe9d66cfSMarijn Suijten (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE)) 8025fdd593SJeykumar Sankaran 81fe9d66cfSMarijn Suijten #define PINGPONG_SDM845_TE2_MASK \ 8225fdd593SJeykumar Sankaran (PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2)) 8325fdd593SJeykumar Sankaran 84fe9d66cfSMarijn Suijten #define PINGPONG_SM8150_MASK \ 85fe9d66cfSMarijn Suijten (BIT(DPU_PINGPONG_DITHER)) 86fe9d66cfSMarijn Suijten 87591e34a0SKrishna Manikandan #define CTL_SC7280_MASK \ 8883a58b20SKalyan Thota (BIT(DPU_CTL_ACTIVE_CFG) | \ 8983a58b20SKalyan Thota BIT(DPU_CTL_FETCH_ACTIVE) | \ 9083a58b20SKalyan Thota BIT(DPU_CTL_VM_CFG) | \ 9183a58b20SKalyan Thota BIT(DPU_CTL_DSPP_SUB_BLOCK_FLUSH)) 92591e34a0SKrishna Manikandan 93e92a4ae1SDmitry Baryshkov #define CTL_SM8550_MASK \ 94e92a4ae1SDmitry Baryshkov (CTL_SC7280_MASK | BIT(DPU_CTL_HAS_LAYER_EXT4)) 95e92a4ae1SDmitry Baryshkov 964369c93cSDmitry Baryshkov #define MERGE_3D_SM8150_MASK (0) 974369c93cSDmitry Baryshkov 984259ff7aSKalyan Thota #define DSPP_SC7180_MASK BIT(DPU_DSPP_PCC) 99e47616dfSKalyan Thota 100cace3ac4SJonathan Marek #define INTF_SDM845_MASK (0) 101cace3ac4SJonathan Marek 102e3969eadSVinod Polimera #define INTF_SC7180_MASK \ 103e3969eadSVinod Polimera (BIT(DPU_INTF_INPUT_CTRL) | BIT(DPU_INTF_TE) | BIT(DPU_INTF_STATUS_SUPPORTED)) 104cace3ac4SJonathan Marek 105591e34a0SKrishna Manikandan #define INTF_SC7280_MASK INTF_SC7180_MASK | BIT(DPU_DATA_HCTL_EN) 106591e34a0SKrishna Manikandan 10753324b99SAbhinav Kumar #define WB_SM8250_MASK (BIT(DPU_WB_LINE_MODE) | \ 10853324b99SAbhinav Kumar BIT(DPU_WB_UBWC) | \ 10953324b99SAbhinav Kumar BIT(DPU_WB_YUV_CONFIG) | \ 11053324b99SAbhinav Kumar BIT(DPU_WB_PIPE_ALPHA) | \ 11153324b99SAbhinav Kumar BIT(DPU_WB_XY_ROI_OFFSET) | \ 11253324b99SAbhinav Kumar BIT(DPU_WB_QOS) | \ 11353324b99SAbhinav Kumar BIT(DPU_WB_QOS_8LVL) | \ 11453324b99SAbhinav Kumar BIT(DPU_WB_CDP) | \ 11553324b99SAbhinav Kumar BIT(DPU_WB_INPUT_CTRL)) 11653324b99SAbhinav Kumar 11725fdd593SJeykumar Sankaran #define DEFAULT_PIXEL_RAM_SIZE (50 * 1024) 11825fdd593SJeykumar Sankaran #define DEFAULT_DPU_LINE_WIDTH 2048 11925fdd593SJeykumar Sankaran #define DEFAULT_DPU_OUTPUT_LINE_WIDTH 2560 12025fdd593SJeykumar Sankaran 12125fdd593SJeykumar Sankaran #define MAX_HORZ_DECIMATION 4 12225fdd593SJeykumar Sankaran #define MAX_VERT_DECIMATION 4 12325fdd593SJeykumar Sankaran 12425fdd593SJeykumar Sankaran #define MAX_UPSCALE_RATIO 20 12525fdd593SJeykumar Sankaran #define MAX_DOWNSCALE_RATIO 4 12625fdd593SJeykumar Sankaran #define SSPP_UNITY_SCALE 1 12725fdd593SJeykumar Sankaran 12825fdd593SJeykumar Sankaran #define STRCAT(X, Y) (X Y) 12925fdd593SJeykumar Sankaran 13009c7e370SLee Jones static const uint32_t plane_formats[] = { 13109c7e370SLee Jones DRM_FORMAT_ARGB8888, 13209c7e370SLee Jones DRM_FORMAT_ABGR8888, 13309c7e370SLee Jones DRM_FORMAT_RGBA8888, 13409c7e370SLee Jones DRM_FORMAT_BGRA8888, 13509c7e370SLee Jones DRM_FORMAT_XRGB8888, 13609c7e370SLee Jones DRM_FORMAT_RGBX8888, 13709c7e370SLee Jones DRM_FORMAT_BGRX8888, 13809c7e370SLee Jones DRM_FORMAT_XBGR8888, 139ffbbed63SLeonard Lausen DRM_FORMAT_ARGB2101010, 140da7716a2SJessica Zhang DRM_FORMAT_XRGB2101010, 14109c7e370SLee Jones DRM_FORMAT_RGB888, 14209c7e370SLee Jones DRM_FORMAT_BGR888, 14309c7e370SLee Jones DRM_FORMAT_RGB565, 14409c7e370SLee Jones DRM_FORMAT_BGR565, 14509c7e370SLee Jones DRM_FORMAT_ARGB1555, 14609c7e370SLee Jones DRM_FORMAT_ABGR1555, 14709c7e370SLee Jones DRM_FORMAT_RGBA5551, 14809c7e370SLee Jones DRM_FORMAT_BGRA5551, 14909c7e370SLee Jones DRM_FORMAT_XRGB1555, 15009c7e370SLee Jones DRM_FORMAT_XBGR1555, 15109c7e370SLee Jones DRM_FORMAT_RGBX5551, 15209c7e370SLee Jones DRM_FORMAT_BGRX5551, 15309c7e370SLee Jones DRM_FORMAT_ARGB4444, 15409c7e370SLee Jones DRM_FORMAT_ABGR4444, 15509c7e370SLee Jones DRM_FORMAT_RGBA4444, 15609c7e370SLee Jones DRM_FORMAT_BGRA4444, 15709c7e370SLee Jones DRM_FORMAT_XRGB4444, 15809c7e370SLee Jones DRM_FORMAT_XBGR4444, 15909c7e370SLee Jones DRM_FORMAT_RGBX4444, 16009c7e370SLee Jones DRM_FORMAT_BGRX4444, 16109c7e370SLee Jones }; 16209c7e370SLee Jones 16309c7e370SLee Jones static const uint32_t plane_formats_yuv[] = { 16409c7e370SLee Jones DRM_FORMAT_ARGB8888, 16509c7e370SLee Jones DRM_FORMAT_ABGR8888, 16609c7e370SLee Jones DRM_FORMAT_RGBA8888, 16709c7e370SLee Jones DRM_FORMAT_BGRX8888, 16809c7e370SLee Jones DRM_FORMAT_BGRA8888, 169ffbbed63SLeonard Lausen DRM_FORMAT_ARGB2101010, 170da7716a2SJessica Zhang DRM_FORMAT_XRGB2101010, 17109c7e370SLee Jones DRM_FORMAT_XRGB8888, 17209c7e370SLee Jones DRM_FORMAT_XBGR8888, 17309c7e370SLee Jones DRM_FORMAT_RGBX8888, 17409c7e370SLee Jones DRM_FORMAT_RGB888, 17509c7e370SLee Jones DRM_FORMAT_BGR888, 17609c7e370SLee Jones DRM_FORMAT_RGB565, 17709c7e370SLee Jones DRM_FORMAT_BGR565, 17809c7e370SLee Jones DRM_FORMAT_ARGB1555, 17909c7e370SLee Jones DRM_FORMAT_ABGR1555, 18009c7e370SLee Jones DRM_FORMAT_RGBA5551, 18109c7e370SLee Jones DRM_FORMAT_BGRA5551, 18209c7e370SLee Jones DRM_FORMAT_XRGB1555, 18309c7e370SLee Jones DRM_FORMAT_XBGR1555, 18409c7e370SLee Jones DRM_FORMAT_RGBX5551, 18509c7e370SLee Jones DRM_FORMAT_BGRX5551, 18609c7e370SLee Jones DRM_FORMAT_ARGB4444, 18709c7e370SLee Jones DRM_FORMAT_ABGR4444, 18809c7e370SLee Jones DRM_FORMAT_RGBA4444, 18909c7e370SLee Jones DRM_FORMAT_BGRA4444, 19009c7e370SLee Jones DRM_FORMAT_XRGB4444, 19109c7e370SLee Jones DRM_FORMAT_XBGR4444, 19209c7e370SLee Jones DRM_FORMAT_RGBX4444, 19309c7e370SLee Jones DRM_FORMAT_BGRX4444, 19409c7e370SLee Jones 195f07c9946SJessica Zhang DRM_FORMAT_P010, 19609c7e370SLee Jones DRM_FORMAT_NV12, 19709c7e370SLee Jones DRM_FORMAT_NV21, 19809c7e370SLee Jones DRM_FORMAT_NV16, 19909c7e370SLee Jones DRM_FORMAT_NV61, 20009c7e370SLee Jones DRM_FORMAT_VYUY, 20109c7e370SLee Jones DRM_FORMAT_UYVY, 20209c7e370SLee Jones DRM_FORMAT_YUYV, 20309c7e370SLee Jones DRM_FORMAT_YVYU, 20409c7e370SLee Jones DRM_FORMAT_YUV420, 20509c7e370SLee Jones DRM_FORMAT_YVU420, 20609c7e370SLee Jones }; 20709c7e370SLee Jones 208dabfdd89SVinod Polimera static const u32 rotation_v2_formats[] = { 209dabfdd89SVinod Polimera DRM_FORMAT_NV12, 210dabfdd89SVinod Polimera /* TODO add formats after validation */ 211dabfdd89SVinod Polimera }; 212dabfdd89SVinod Polimera 21353324b99SAbhinav Kumar static const uint32_t wb2_formats[] = { 21453324b99SAbhinav Kumar DRM_FORMAT_RGB565, 21553324b99SAbhinav Kumar DRM_FORMAT_BGR565, 21653324b99SAbhinav Kumar DRM_FORMAT_RGB888, 21753324b99SAbhinav Kumar DRM_FORMAT_ARGB8888, 21853324b99SAbhinav Kumar DRM_FORMAT_RGBA8888, 21953324b99SAbhinav Kumar DRM_FORMAT_ABGR8888, 22053324b99SAbhinav Kumar DRM_FORMAT_XRGB8888, 22153324b99SAbhinav Kumar DRM_FORMAT_RGBX8888, 22253324b99SAbhinav Kumar DRM_FORMAT_XBGR8888, 22353324b99SAbhinav Kumar DRM_FORMAT_ARGB1555, 22453324b99SAbhinav Kumar DRM_FORMAT_RGBA5551, 22553324b99SAbhinav Kumar DRM_FORMAT_XRGB1555, 22653324b99SAbhinav Kumar DRM_FORMAT_RGBX5551, 22753324b99SAbhinav Kumar DRM_FORMAT_ARGB4444, 22853324b99SAbhinav Kumar DRM_FORMAT_RGBA4444, 22953324b99SAbhinav Kumar DRM_FORMAT_RGBX4444, 23053324b99SAbhinav Kumar DRM_FORMAT_XRGB4444, 23153324b99SAbhinav Kumar DRM_FORMAT_BGR565, 23253324b99SAbhinav Kumar DRM_FORMAT_BGR888, 23353324b99SAbhinav Kumar DRM_FORMAT_ABGR8888, 23453324b99SAbhinav Kumar DRM_FORMAT_BGRA8888, 23553324b99SAbhinav Kumar DRM_FORMAT_BGRX8888, 23653324b99SAbhinav Kumar DRM_FORMAT_XBGR8888, 23753324b99SAbhinav Kumar DRM_FORMAT_ABGR1555, 23853324b99SAbhinav Kumar DRM_FORMAT_BGRA5551, 23953324b99SAbhinav Kumar DRM_FORMAT_XBGR1555, 24053324b99SAbhinav Kumar DRM_FORMAT_BGRX5551, 24153324b99SAbhinav Kumar DRM_FORMAT_ABGR4444, 24253324b99SAbhinav Kumar DRM_FORMAT_BGRA4444, 24353324b99SAbhinav Kumar DRM_FORMAT_BGRX4444, 24453324b99SAbhinav Kumar DRM_FORMAT_XBGR4444, 24553324b99SAbhinav Kumar }; 24653324b99SAbhinav Kumar 24725fdd593SJeykumar Sankaran /************************************************************* 24825fdd593SJeykumar Sankaran * SSPP sub blocks config 24925fdd593SJeykumar Sankaran *************************************************************/ 25025fdd593SJeykumar Sankaran 25125fdd593SJeykumar Sankaran /* SSPP common configuration */ 252b75ab05aSShubhashree Dhar #define _VIG_SBLK(num, sdma_pri, qseed_ver) \ 25325fdd593SJeykumar Sankaran { \ 25425fdd593SJeykumar Sankaran .maxdwnscale = MAX_DOWNSCALE_RATIO, \ 25525fdd593SJeykumar Sankaran .maxupscale = MAX_UPSCALE_RATIO, \ 25625fdd593SJeykumar Sankaran .smart_dma_priority = sdma_pri, \ 25725fdd593SJeykumar Sankaran .scaler_blk = {.name = STRCAT("sspp_scaler", num), \ 258b75ab05aSShubhashree Dhar .id = qseed_ver, \ 25925fdd593SJeykumar Sankaran .base = 0xa00, .len = 0xa0,}, \ 26025fdd593SJeykumar Sankaran .csc_blk = {.name = STRCAT("sspp_csc", num), \ 26125fdd593SJeykumar Sankaran .id = DPU_SSPP_CSC_10BIT, \ 26225fdd593SJeykumar Sankaran .base = 0x1a00, .len = 0x100,}, \ 26325fdd593SJeykumar Sankaran .format_list = plane_formats_yuv, \ 264e6b63a7bSFritz Koenig .num_formats = ARRAY_SIZE(plane_formats_yuv), \ 26525fdd593SJeykumar Sankaran .virt_format_list = plane_formats, \ 266e6b63a7bSFritz Koenig .virt_num_formats = ARRAY_SIZE(plane_formats), \ 267dabfdd89SVinod Polimera .rotation_cfg = NULL, \ 268dabfdd89SVinod Polimera } 269dabfdd89SVinod Polimera 270dabfdd89SVinod Polimera #define _VIG_SBLK_ROT(num, sdma_pri, qseed_ver, rot_cfg) \ 271dabfdd89SVinod Polimera { \ 272dabfdd89SVinod Polimera .maxdwnscale = MAX_DOWNSCALE_RATIO, \ 273dabfdd89SVinod Polimera .maxupscale = MAX_UPSCALE_RATIO, \ 274dabfdd89SVinod Polimera .smart_dma_priority = sdma_pri, \ 275dabfdd89SVinod Polimera .scaler_blk = {.name = STRCAT("sspp_scaler", num), \ 276dabfdd89SVinod Polimera .id = qseed_ver, \ 277dabfdd89SVinod Polimera .base = 0xa00, .len = 0xa0,}, \ 278dabfdd89SVinod Polimera .csc_blk = {.name = STRCAT("sspp_csc", num), \ 279dabfdd89SVinod Polimera .id = DPU_SSPP_CSC_10BIT, \ 280dabfdd89SVinod Polimera .base = 0x1a00, .len = 0x100,}, \ 281dabfdd89SVinod Polimera .format_list = plane_formats_yuv, \ 282dabfdd89SVinod Polimera .num_formats = ARRAY_SIZE(plane_formats_yuv), \ 283dabfdd89SVinod Polimera .virt_format_list = plane_formats, \ 284dabfdd89SVinod Polimera .virt_num_formats = ARRAY_SIZE(plane_formats), \ 285dabfdd89SVinod Polimera .rotation_cfg = rot_cfg, \ 28625fdd593SJeykumar Sankaran } 28725fdd593SJeykumar Sankaran 28825fdd593SJeykumar Sankaran #define _DMA_SBLK(num, sdma_pri) \ 28925fdd593SJeykumar Sankaran { \ 29025fdd593SJeykumar Sankaran .maxdwnscale = SSPP_UNITY_SCALE, \ 29125fdd593SJeykumar Sankaran .maxupscale = SSPP_UNITY_SCALE, \ 29225fdd593SJeykumar Sankaran .smart_dma_priority = sdma_pri, \ 29325fdd593SJeykumar Sankaran .format_list = plane_formats, \ 294e6b63a7bSFritz Koenig .num_formats = ARRAY_SIZE(plane_formats), \ 29525fdd593SJeykumar Sankaran .virt_format_list = plane_formats, \ 296e6b63a7bSFritz Koenig .virt_num_formats = ARRAY_SIZE(plane_formats), \ 29725fdd593SJeykumar Sankaran } 29825fdd593SJeykumar Sankaran 29994391a14SAngeloGioacchino Del Regno static const struct dpu_sspp_sub_blks msm8998_vig_sblk_0 = 30094391a14SAngeloGioacchino Del Regno _VIG_SBLK("0", 0, DPU_SSPP_SCALER_QSEED3); 30194391a14SAngeloGioacchino Del Regno static const struct dpu_sspp_sub_blks msm8998_vig_sblk_1 = 30294391a14SAngeloGioacchino Del Regno _VIG_SBLK("1", 0, DPU_SSPP_SCALER_QSEED3); 30394391a14SAngeloGioacchino Del Regno static const struct dpu_sspp_sub_blks msm8998_vig_sblk_2 = 30494391a14SAngeloGioacchino Del Regno _VIG_SBLK("2", 0, DPU_SSPP_SCALER_QSEED3); 30594391a14SAngeloGioacchino Del Regno static const struct dpu_sspp_sub_blks msm8998_vig_sblk_3 = 30694391a14SAngeloGioacchino Del Regno _VIG_SBLK("3", 0, DPU_SSPP_SCALER_QSEED3); 30794391a14SAngeloGioacchino Del Regno 308dabfdd89SVinod Polimera static const struct dpu_rotation_cfg dpu_rot_sc7280_cfg_v2 = { 309dabfdd89SVinod Polimera .rot_maxheight = 1088, 310dabfdd89SVinod Polimera .rot_num_formats = ARRAY_SIZE(rotation_v2_formats), 311dabfdd89SVinod Polimera .rot_format_list = rotation_v2_formats, 312dabfdd89SVinod Polimera }; 313dabfdd89SVinod Polimera 314b75ab05aSShubhashree Dhar static const struct dpu_sspp_sub_blks sdm845_vig_sblk_0 = 315b75ab05aSShubhashree Dhar _VIG_SBLK("0", 5, DPU_SSPP_SCALER_QSEED3); 316b75ab05aSShubhashree Dhar static const struct dpu_sspp_sub_blks sdm845_vig_sblk_1 = 317b75ab05aSShubhashree Dhar _VIG_SBLK("1", 6, DPU_SSPP_SCALER_QSEED3); 318b75ab05aSShubhashree Dhar static const struct dpu_sspp_sub_blks sdm845_vig_sblk_2 = 319b75ab05aSShubhashree Dhar _VIG_SBLK("2", 7, DPU_SSPP_SCALER_QSEED3); 320b75ab05aSShubhashree Dhar static const struct dpu_sspp_sub_blks sdm845_vig_sblk_3 = 321b75ab05aSShubhashree Dhar _VIG_SBLK("3", 8, DPU_SSPP_SCALER_QSEED3); 32225fdd593SJeykumar Sankaran 32325fdd593SJeykumar Sankaran static const struct dpu_sspp_sub_blks sdm845_dma_sblk_0 = _DMA_SBLK("8", 1); 32425fdd593SJeykumar Sankaran static const struct dpu_sspp_sub_blks sdm845_dma_sblk_1 = _DMA_SBLK("9", 2); 32525fdd593SJeykumar Sankaran static const struct dpu_sspp_sub_blks sdm845_dma_sblk_2 = _DMA_SBLK("10", 3); 32625fdd593SJeykumar Sankaran static const struct dpu_sspp_sub_blks sdm845_dma_sblk_3 = _DMA_SBLK("11", 4); 32725fdd593SJeykumar Sankaran 3288f940ddbSKonrad Dybcio #define SSPP_BLK(_name, _id, _base, _len, _features, \ 32907ca1fc0SSravanthi Kollukuduru _sblk, _xinid, _type, _clkctrl) \ 33025fdd593SJeykumar Sankaran { \ 33125fdd593SJeykumar Sankaran .name = _name, .id = _id, \ 3328f940ddbSKonrad Dybcio .base = _base, .len = _len, \ 33307ca1fc0SSravanthi Kollukuduru .features = _features, \ 33425fdd593SJeykumar Sankaran .sblk = &_sblk, \ 33525fdd593SJeykumar Sankaran .xin_id = _xinid, \ 33607ca1fc0SSravanthi Kollukuduru .type = _type, \ 33725fdd593SJeykumar Sankaran .clk_ctrl = _clkctrl \ 33825fdd593SJeykumar Sankaran } 33925fdd593SJeykumar Sankaran 340b75ab05aSShubhashree Dhar static const struct dpu_sspp_sub_blks sc7180_vig_sblk_0 = 341b75ab05aSShubhashree Dhar _VIG_SBLK("0", 4, DPU_SSPP_SCALER_QSEED4); 342b75ab05aSShubhashree Dhar 343dabfdd89SVinod Polimera static const struct dpu_sspp_sub_blks sc7280_vig_sblk_0 = 344dabfdd89SVinod Polimera _VIG_SBLK_ROT("0", 4, DPU_SSPP_SCALER_QSEED4, &dpu_rot_sc7280_cfg_v2); 345dabfdd89SVinod Polimera 3463581b706SAdam Skladowski static const struct dpu_sspp_sub_blks sm6115_vig_sblk_0 = 34738164e99SDmitry Baryshkov _VIG_SBLK("0", 2, DPU_SSPP_SCALER_QSEED4); 3483581b706SAdam Skladowski 349d21fc5dfSDmitry Baryshkov static const struct dpu_sspp_sub_blks sm8250_vig_sblk_0 = 35003c0c3cbSDmitry Baryshkov _VIG_SBLK("0", 5, DPU_SSPP_SCALER_QSEED4); 351d21fc5dfSDmitry Baryshkov static const struct dpu_sspp_sub_blks sm8250_vig_sblk_1 = 35203c0c3cbSDmitry Baryshkov _VIG_SBLK("1", 6, DPU_SSPP_SCALER_QSEED4); 353d21fc5dfSDmitry Baryshkov static const struct dpu_sspp_sub_blks sm8250_vig_sblk_2 = 35403c0c3cbSDmitry Baryshkov _VIG_SBLK("2", 7, DPU_SSPP_SCALER_QSEED4); 355d21fc5dfSDmitry Baryshkov static const struct dpu_sspp_sub_blks sm8250_vig_sblk_3 = 35603c0c3cbSDmitry Baryshkov _VIG_SBLK("3", 8, DPU_SSPP_SCALER_QSEED4); 357d21fc5dfSDmitry Baryshkov 358efcd0107SNeil Armstrong static const struct dpu_sspp_sub_blks sm8550_vig_sblk_0 = 359d113d267SDmitry Baryshkov _VIG_SBLK("0", 7, DPU_SSPP_SCALER_QSEED4); 360efcd0107SNeil Armstrong static const struct dpu_sspp_sub_blks sm8550_vig_sblk_1 = 361d113d267SDmitry Baryshkov _VIG_SBLK("1", 8, DPU_SSPP_SCALER_QSEED4); 362efcd0107SNeil Armstrong static const struct dpu_sspp_sub_blks sm8550_vig_sblk_2 = 363d113d267SDmitry Baryshkov _VIG_SBLK("2", 9, DPU_SSPP_SCALER_QSEED4); 364efcd0107SNeil Armstrong static const struct dpu_sspp_sub_blks sm8550_vig_sblk_3 = 365d113d267SDmitry Baryshkov _VIG_SBLK("3", 10, DPU_SSPP_SCALER_QSEED4); 366efcd0107SNeil Armstrong static const struct dpu_sspp_sub_blks sm8550_dma_sblk_4 = _DMA_SBLK("12", 5); 367e3011955SDmitry Baryshkov static const struct dpu_sspp_sub_blks sm8550_dma_sblk_5 = _DMA_SBLK("13", 6); 368efcd0107SNeil Armstrong 3695334087eSLoic Poulain #define _VIG_SBLK_NOSCALE(num, sdma_pri) \ 3705334087eSLoic Poulain { \ 3715334087eSLoic Poulain .maxdwnscale = SSPP_UNITY_SCALE, \ 3725334087eSLoic Poulain .maxupscale = SSPP_UNITY_SCALE, \ 3735334087eSLoic Poulain .smart_dma_priority = sdma_pri, \ 3745334087eSLoic Poulain .format_list = plane_formats_yuv, \ 3755334087eSLoic Poulain .num_formats = ARRAY_SIZE(plane_formats_yuv), \ 3765334087eSLoic Poulain .virt_format_list = plane_formats, \ 3775334087eSLoic Poulain .virt_num_formats = ARRAY_SIZE(plane_formats), \ 3785334087eSLoic Poulain } 3795334087eSLoic Poulain 3805334087eSLoic Poulain static const struct dpu_sspp_sub_blks qcm2290_vig_sblk_0 = _VIG_SBLK_NOSCALE("0", 2); 3815334087eSLoic Poulain static const struct dpu_sspp_sub_blks qcm2290_dma_sblk_0 = _DMA_SBLK("8", 1); 3825334087eSLoic Poulain 38325fdd593SJeykumar Sankaran /************************************************************* 38425fdd593SJeykumar Sankaran * MIXER sub blocks config 38525fdd593SJeykumar Sankaran *************************************************************/ 3867bdc0c4bSKalyan Thota 387e47616dfSKalyan Thota #define LM_BLK(_name, _id, _base, _fmask, _sblk, _pp, _lmpair, _dspp) \ 38825fdd593SJeykumar Sankaran { \ 38925fdd593SJeykumar Sankaran .name = _name, .id = _id, \ 39025fdd593SJeykumar Sankaran .base = _base, .len = 0x320, \ 3917bdc0c4bSKalyan Thota .features = _fmask, \ 3927bdc0c4bSKalyan Thota .sblk = _sblk, \ 39325fdd593SJeykumar Sankaran .pingpong = _pp, \ 394e47616dfSKalyan Thota .lm_pair_mask = (1 << _lmpair), \ 395e47616dfSKalyan Thota .dspp = _dspp \ 39625fdd593SJeykumar Sankaran } 39725fdd593SJeykumar Sankaran 39894391a14SAngeloGioacchino Del Regno /* MSM8998 */ 39994391a14SAngeloGioacchino Del Regno 40094391a14SAngeloGioacchino Del Regno static const struct dpu_lm_sub_blks msm8998_lm_sblk = { 40194391a14SAngeloGioacchino Del Regno .maxwidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 40294391a14SAngeloGioacchino Del Regno .maxblendstages = 7, /* excluding base layer */ 40394391a14SAngeloGioacchino Del Regno .blendstage_base = { /* offsets relative to mixer base */ 40494391a14SAngeloGioacchino Del Regno 0x20, 0x50, 0x80, 0xb0, 0x230, 40594391a14SAngeloGioacchino Del Regno 0x260, 0x290 40694391a14SAngeloGioacchino Del Regno }, 40794391a14SAngeloGioacchino Del Regno }; 40894391a14SAngeloGioacchino Del Regno 40994391a14SAngeloGioacchino Del Regno /* SDM845 */ 41094391a14SAngeloGioacchino Del Regno 41194391a14SAngeloGioacchino Del Regno static const struct dpu_lm_sub_blks sdm845_lm_sblk = { 41294391a14SAngeloGioacchino Del Regno .maxwidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 41394391a14SAngeloGioacchino Del Regno .maxblendstages = 11, /* excluding base layer */ 41494391a14SAngeloGioacchino Del Regno .blendstage_base = { /* offsets relative to mixer base */ 41594391a14SAngeloGioacchino Del Regno 0x20, 0x38, 0x50, 0x68, 0x80, 0x98, 41694391a14SAngeloGioacchino Del Regno 0xb0, 0xc8, 0xe0, 0xf8, 0x110 41794391a14SAngeloGioacchino Del Regno }, 41894391a14SAngeloGioacchino Del Regno }; 41994391a14SAngeloGioacchino Del Regno 4207bdc0c4bSKalyan Thota /* SC7180 */ 4217bdc0c4bSKalyan Thota 4227bdc0c4bSKalyan Thota static const struct dpu_lm_sub_blks sc7180_lm_sblk = { 4237bdc0c4bSKalyan Thota .maxwidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 4247bdc0c4bSKalyan Thota .maxblendstages = 7, /* excluding base layer */ 4257bdc0c4bSKalyan Thota .blendstage_base = { /* offsets relative to mixer base */ 4267bdc0c4bSKalyan Thota 0x20, 0x38, 0x50, 0x68, 0x80, 0x98, 0xb0 4277bdc0c4bSKalyan Thota }, 4287bdc0c4bSKalyan Thota }; 4297bdc0c4bSKalyan Thota 4305334087eSLoic Poulain /* QCM2290 */ 4315334087eSLoic Poulain 4325334087eSLoic Poulain static const struct dpu_lm_sub_blks qcm2290_lm_sblk = { 433da06be8bSDmitry Baryshkov .maxwidth = DEFAULT_DPU_LINE_WIDTH, 4345334087eSLoic Poulain .maxblendstages = 4, /* excluding base layer */ 4355334087eSLoic Poulain .blendstage_base = { /* offsets relative to mixer base */ 4365334087eSLoic Poulain 0x20, 0x38, 0x50, 0x68 4375334087eSLoic Poulain }, 4385334087eSLoic Poulain }; 4395334087eSLoic Poulain 44025fdd593SJeykumar Sankaran /************************************************************* 441e47616dfSKalyan Thota * DSPP sub blocks config 442e47616dfSKalyan Thota *************************************************************/ 44394391a14SAngeloGioacchino Del Regno static const struct dpu_dspp_sub_blks msm8998_dspp_sblk = { 44494391a14SAngeloGioacchino Del Regno .pcc = {.id = DPU_DSPP_PCC, .base = 0x1700, 44594391a14SAngeloGioacchino Del Regno .len = 0x90, .version = 0x10007}, 44694391a14SAngeloGioacchino Del Regno }; 44794391a14SAngeloGioacchino Del Regno 44805ae91d9SDmitry Baryshkov static const struct dpu_dspp_sub_blks sm8150_dspp_sblk = { 44905ae91d9SDmitry Baryshkov .pcc = {.id = DPU_DSPP_PCC, .base = 0x1700, 45005ae91d9SDmitry Baryshkov .len = 0x90, .version = 0x40000}, 45105ae91d9SDmitry Baryshkov }; 45205ae91d9SDmitry Baryshkov 453862314bcSAngeloGioacchino Del Regno #define DSPP_BLK(_name, _id, _base, _mask, _sblk) \ 454e47616dfSKalyan Thota {\ 455e47616dfSKalyan Thota .name = _name, .id = _id, \ 456e47616dfSKalyan Thota .base = _base, .len = 0x1800, \ 457862314bcSAngeloGioacchino Del Regno .features = _mask, \ 45805ae91d9SDmitry Baryshkov .sblk = _sblk \ 459e47616dfSKalyan Thota } 460e47616dfSKalyan Thota 461e47616dfSKalyan Thota /************************************************************* 46225fdd593SJeykumar Sankaran * PINGPONG sub blocks config 46325fdd593SJeykumar Sankaran *************************************************************/ 46425fdd593SJeykumar Sankaran static const struct dpu_pingpong_sub_blks sdm845_pp_sblk_te = { 46525fdd593SJeykumar Sankaran .te2 = {.id = DPU_PINGPONG_TE2, .base = 0x2000, .len = 0x0, 46625fdd593SJeykumar Sankaran .version = 0x1}, 46725fdd593SJeykumar Sankaran .dither = {.id = DPU_PINGPONG_DITHER, .base = 0x30e0, 46825fdd593SJeykumar Sankaran .len = 0x20, .version = 0x10000}, 46925fdd593SJeykumar Sankaran }; 47025fdd593SJeykumar Sankaran 47125fdd593SJeykumar Sankaran static const struct dpu_pingpong_sub_blks sdm845_pp_sblk = { 47225fdd593SJeykumar Sankaran .dither = {.id = DPU_PINGPONG_DITHER, .base = 0x30e0, 47325fdd593SJeykumar Sankaran .len = 0x20, .version = 0x10000}, 47425fdd593SJeykumar Sankaran }; 47525fdd593SJeykumar Sankaran 476591e34a0SKrishna Manikandan static const struct dpu_pingpong_sub_blks sc7280_pp_sblk = { 477591e34a0SKrishna Manikandan .dither = {.id = DPU_PINGPONG_DITHER, .base = 0xe0, 478591e34a0SKrishna Manikandan .len = 0x20, .version = 0x20000}, 479591e34a0SKrishna Manikandan }; 480591e34a0SKrishna Manikandan 481701f6918SMarijn Suijten #define PP_BLK_DITHER(_name, _id, _base, _merge_3d, _sblk, _done, _rdptr) \ 482efcd0107SNeil Armstrong {\ 483efcd0107SNeil Armstrong .name = _name, .id = _id, \ 484efcd0107SNeil Armstrong .base = _base, .len = 0, \ 485efcd0107SNeil Armstrong .features = BIT(DPU_PINGPONG_DITHER), \ 486efcd0107SNeil Armstrong .merge_3d = _merge_3d, \ 487efcd0107SNeil Armstrong .sblk = &_sblk, \ 488efcd0107SNeil Armstrong .intr_done = _done, \ 489efcd0107SNeil Armstrong .intr_rdptr = _rdptr, \ 490efcd0107SNeil Armstrong } 491fe9d66cfSMarijn Suijten #define PP_BLK(_name, _id, _base, _features, _merge_3d, _sblk, _done, _rdptr) \ 49225fdd593SJeykumar Sankaran {\ 49325fdd593SJeykumar Sankaran .name = _name, .id = _id, \ 49425fdd593SJeykumar Sankaran .base = _base, .len = 0xd4, \ 495fe9d66cfSMarijn Suijten .features = _features, \ 4964369c93cSDmitry Baryshkov .merge_3d = _merge_3d, \ 497667e9985SDmitry Baryshkov .sblk = &_sblk, \ 498667e9985SDmitry Baryshkov .intr_done = _done, \ 499667e9985SDmitry Baryshkov .intr_rdptr = _rdptr, \ 50025fdd593SJeykumar Sankaran } 50125fdd593SJeykumar Sankaran 5024369c93cSDmitry Baryshkov /************************************************************* 5034369c93cSDmitry Baryshkov * MERGE_3D sub blocks config 5044369c93cSDmitry Baryshkov *************************************************************/ 5054369c93cSDmitry Baryshkov #define MERGE_3D_BLK(_name, _id, _base) \ 5064369c93cSDmitry Baryshkov {\ 5074369c93cSDmitry Baryshkov .name = _name, .id = _id, \ 5084369c93cSDmitry Baryshkov .base = _base, .len = 0x100, \ 5094369c93cSDmitry Baryshkov .features = MERGE_3D_SM8150_MASK, \ 5104369c93cSDmitry Baryshkov .sblk = NULL \ 5114369c93cSDmitry Baryshkov } 5124369c93cSDmitry Baryshkov 5137c5ab05eSVinod Koul /************************************************************* 5147c5ab05eSVinod Koul * DSC sub blocks config 5157c5ab05eSVinod Koul *************************************************************/ 5169da5daa0SMarijn Suijten #define DSC_BLK(_name, _id, _base, _features) \ 5177c5ab05eSVinod Koul {\ 5187c5ab05eSVinod Koul .name = _name, .id = _id, \ 5197c5ab05eSVinod Koul .base = _base, .len = 0x140, \ 5209da5daa0SMarijn Suijten .features = _features, \ 5217c5ab05eSVinod Koul } 5227c5ab05eSVinod Koul 52325fdd593SJeykumar Sankaran /************************************************************* 52425fdd593SJeykumar Sankaran * INTF sub blocks config 52525fdd593SJeykumar Sankaran *************************************************************/ 526a38a9949SMarijn Suijten #define INTF_BLK(_name, _id, _base, _len, _type, _ctrl_id, _progfetch, _features, _underrun, _vsync) \ 52725fdd593SJeykumar Sankaran {\ 52825fdd593SJeykumar Sankaran .name = _name, .id = _id, \ 5298399a5ffSKonrad Dybcio .base = _base, .len = _len, \ 530cace3ac4SJonathan Marek .features = _features, \ 53125fdd593SJeykumar Sankaran .type = _type, \ 53225fdd593SJeykumar Sankaran .controller_id = _ctrl_id, \ 533667e9985SDmitry Baryshkov .prog_fetch_lines_worst_case = _progfetch, \ 534a38a9949SMarijn Suijten .intr_underrun = _underrun, \ 535a38a9949SMarijn Suijten .intr_vsync = _vsync, \ 5360272b9c3SMarijn Suijten .intr_tear_rd_ptr = -1, \ 5370272b9c3SMarijn Suijten } 5380272b9c3SMarijn Suijten 5390272b9c3SMarijn Suijten /* DSI Interface sub-block with TEAR registers (since DPU 5.0.0) */ 5400272b9c3SMarijn Suijten #define INTF_BLK_DSI_TE(_name, _id, _base, _len, _type, _ctrl_id, _progfetch, _features, _underrun, _vsync, _tear_rd_ptr) \ 5410272b9c3SMarijn Suijten {\ 5420272b9c3SMarijn Suijten .name = _name, .id = _id, \ 5430272b9c3SMarijn Suijten .base = _base, .len = _len, \ 5440272b9c3SMarijn Suijten .features = _features, \ 5450272b9c3SMarijn Suijten .type = _type, \ 5460272b9c3SMarijn Suijten .controller_id = _ctrl_id, \ 5470272b9c3SMarijn Suijten .prog_fetch_lines_worst_case = _progfetch, \ 5480272b9c3SMarijn Suijten .intr_underrun = _underrun, \ 5490272b9c3SMarijn Suijten .intr_vsync = _vsync, \ 5500272b9c3SMarijn Suijten .intr_tear_rd_ptr = _tear_rd_ptr, \ 55125fdd593SJeykumar Sankaran } 55225fdd593SJeykumar Sankaran 55325fdd593SJeykumar Sankaran /************************************************************* 55453324b99SAbhinav Kumar * Writeback blocks config 55553324b99SAbhinav Kumar *************************************************************/ 55653324b99SAbhinav Kumar #define WB_BLK(_name, _id, _base, _features, _clk_ctrl, \ 557a370cc39SAbhinav Kumar __xin_id, vbif_id, _reg, _max_linewidth, _wb_done_bit) \ 55853324b99SAbhinav Kumar { \ 55953324b99SAbhinav Kumar .name = _name, .id = _id, \ 56053324b99SAbhinav Kumar .base = _base, .len = 0x2c8, \ 56153324b99SAbhinav Kumar .features = _features, \ 56253324b99SAbhinav Kumar .format_list = wb2_formats, \ 56353324b99SAbhinav Kumar .num_formats = ARRAY_SIZE(wb2_formats), \ 56453324b99SAbhinav Kumar .clk_ctrl = _clk_ctrl, \ 56553324b99SAbhinav Kumar .xin_id = __xin_id, \ 56653324b99SAbhinav Kumar .vbif_idx = vbif_id, \ 567a370cc39SAbhinav Kumar .maxlinewidth = _max_linewidth, \ 56853324b99SAbhinav Kumar .intr_wb_done = DPU_IRQ_IDX(_reg, _wb_done_bit) \ 56953324b99SAbhinav Kumar } 57053324b99SAbhinav Kumar 57153324b99SAbhinav Kumar /************************************************************* 57225fdd593SJeykumar Sankaran * VBIF sub blocks config 57325fdd593SJeykumar Sankaran *************************************************************/ 57425fdd593SJeykumar Sankaran /* VBIF QOS remap */ 57594391a14SAngeloGioacchino Del Regno static const u32 msm8998_rt_pri_lvl[] = {1, 2, 2, 2}; 57694391a14SAngeloGioacchino Del Regno static const u32 msm8998_nrt_pri_lvl[] = {1, 1, 1, 1}; 577abda0d92SStephen Boyd static const u32 sdm845_rt_pri_lvl[] = {3, 3, 4, 4, 5, 5, 6, 6}; 578abda0d92SStephen Boyd static const u32 sdm845_nrt_pri_lvl[] = {3, 3, 3, 3, 3, 3, 3, 3}; 57925fdd593SJeykumar Sankaran 58094391a14SAngeloGioacchino Del Regno static const struct dpu_vbif_dynamic_ot_cfg msm8998_ot_rdwr_cfg[] = { 58194391a14SAngeloGioacchino Del Regno { 5823f23a52fSArnaud Vrac .pps = 1920 * 1080 * 30, 58394391a14SAngeloGioacchino Del Regno .ot_limit = 2, 58494391a14SAngeloGioacchino Del Regno }, 58594391a14SAngeloGioacchino Del Regno { 5863f23a52fSArnaud Vrac .pps = 1920 * 1080 * 60, 5873f23a52fSArnaud Vrac .ot_limit = 4, 58894391a14SAngeloGioacchino Del Regno }, 58994391a14SAngeloGioacchino Del Regno { 59094391a14SAngeloGioacchino Del Regno .pps = 3840 * 2160 * 30, 59194391a14SAngeloGioacchino Del Regno .ot_limit = 16, 59294391a14SAngeloGioacchino Del Regno }, 59394391a14SAngeloGioacchino Del Regno }; 59494391a14SAngeloGioacchino Del Regno 59594391a14SAngeloGioacchino Del Regno static const struct dpu_vbif_cfg msm8998_vbif[] = { 59694391a14SAngeloGioacchino Del Regno { 597606f015bSDmitry Baryshkov .name = "vbif_rt", .id = VBIF_RT, 59894391a14SAngeloGioacchino Del Regno .base = 0, .len = 0x1040, 59994391a14SAngeloGioacchino Del Regno .default_ot_rd_limit = 32, 60094391a14SAngeloGioacchino Del Regno .default_ot_wr_limit = 32, 60194391a14SAngeloGioacchino Del Regno .features = BIT(DPU_VBIF_QOS_REMAP) | BIT(DPU_VBIF_QOS_OTLIM), 60294391a14SAngeloGioacchino Del Regno .xin_halt_timeout = 0x4000, 603c8744315SDmitry Baryshkov .qos_rp_remap_size = 0x20, 60494391a14SAngeloGioacchino Del Regno .dynamic_ot_rd_tbl = { 60594391a14SAngeloGioacchino Del Regno .count = ARRAY_SIZE(msm8998_ot_rdwr_cfg), 60694391a14SAngeloGioacchino Del Regno .cfg = msm8998_ot_rdwr_cfg, 60794391a14SAngeloGioacchino Del Regno }, 60894391a14SAngeloGioacchino Del Regno .dynamic_ot_wr_tbl = { 60994391a14SAngeloGioacchino Del Regno .count = ARRAY_SIZE(msm8998_ot_rdwr_cfg), 61094391a14SAngeloGioacchino Del Regno .cfg = msm8998_ot_rdwr_cfg, 61194391a14SAngeloGioacchino Del Regno }, 61294391a14SAngeloGioacchino Del Regno .qos_rt_tbl = { 61394391a14SAngeloGioacchino Del Regno .npriority_lvl = ARRAY_SIZE(msm8998_rt_pri_lvl), 61494391a14SAngeloGioacchino Del Regno .priority_lvl = msm8998_rt_pri_lvl, 61594391a14SAngeloGioacchino Del Regno }, 61694391a14SAngeloGioacchino Del Regno .qos_nrt_tbl = { 61794391a14SAngeloGioacchino Del Regno .npriority_lvl = ARRAY_SIZE(msm8998_nrt_pri_lvl), 61894391a14SAngeloGioacchino Del Regno .priority_lvl = msm8998_nrt_pri_lvl, 61994391a14SAngeloGioacchino Del Regno }, 62094391a14SAngeloGioacchino Del Regno .memtype_count = 14, 62194391a14SAngeloGioacchino Del Regno .memtype = {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, 62294391a14SAngeloGioacchino Del Regno }, 62394391a14SAngeloGioacchino Del Regno }; 62494391a14SAngeloGioacchino Del Regno 625abda0d92SStephen Boyd static const struct dpu_vbif_cfg sdm845_vbif[] = { 62625fdd593SJeykumar Sankaran { 627606f015bSDmitry Baryshkov .name = "vbif_rt", .id = VBIF_RT, 62825fdd593SJeykumar Sankaran .base = 0, .len = 0x1040, 62925fdd593SJeykumar Sankaran .features = BIT(DPU_VBIF_QOS_REMAP), 63025fdd593SJeykumar Sankaran .xin_halt_timeout = 0x4000, 631c8744315SDmitry Baryshkov .qos_rp_remap_size = 0x40, 63225fdd593SJeykumar Sankaran .qos_rt_tbl = { 63325fdd593SJeykumar Sankaran .npriority_lvl = ARRAY_SIZE(sdm845_rt_pri_lvl), 63425fdd593SJeykumar Sankaran .priority_lvl = sdm845_rt_pri_lvl, 63525fdd593SJeykumar Sankaran }, 63625fdd593SJeykumar Sankaran .qos_nrt_tbl = { 63725fdd593SJeykumar Sankaran .npriority_lvl = ARRAY_SIZE(sdm845_nrt_pri_lvl), 63825fdd593SJeykumar Sankaran .priority_lvl = sdm845_nrt_pri_lvl, 63925fdd593SJeykumar Sankaran }, 64025fdd593SJeykumar Sankaran .memtype_count = 14, 64125fdd593SJeykumar Sankaran .memtype = {3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3}, 64225fdd593SJeykumar Sankaran }, 64325fdd593SJeykumar Sankaran }; 64425fdd593SJeykumar Sankaran 64525fdd593SJeykumar Sankaran /************************************************************* 64625fdd593SJeykumar Sankaran * PERF data config 64725fdd593SJeykumar Sankaran *************************************************************/ 64825fdd593SJeykumar Sankaran 64925fdd593SJeykumar Sankaran /* SSPP QOS LUTs */ 65094391a14SAngeloGioacchino Del Regno static const struct dpu_qos_lut_entry msm8998_qos_linear[] = { 65194391a14SAngeloGioacchino Del Regno {.fl = 4, .lut = 0x1b}, 65294391a14SAngeloGioacchino Del Regno {.fl = 5, .lut = 0x5b}, 65394391a14SAngeloGioacchino Del Regno {.fl = 6, .lut = 0x15b}, 65494391a14SAngeloGioacchino Del Regno {.fl = 7, .lut = 0x55b}, 65594391a14SAngeloGioacchino Del Regno {.fl = 8, .lut = 0x155b}, 65694391a14SAngeloGioacchino Del Regno {.fl = 9, .lut = 0x555b}, 65794391a14SAngeloGioacchino Del Regno {.fl = 10, .lut = 0x1555b}, 65894391a14SAngeloGioacchino Del Regno {.fl = 11, .lut = 0x5555b}, 65994391a14SAngeloGioacchino Del Regno {.fl = 12, .lut = 0x15555b}, 6603f23a52fSArnaud Vrac {.fl = 0, .lut = 0x55555b} 66194391a14SAngeloGioacchino Del Regno }; 66294391a14SAngeloGioacchino Del Regno 663abda0d92SStephen Boyd static const struct dpu_qos_lut_entry sdm845_qos_linear[] = { 66425fdd593SJeykumar Sankaran {.fl = 4, .lut = 0x357}, 66525fdd593SJeykumar Sankaran {.fl = 5, .lut = 0x3357}, 66625fdd593SJeykumar Sankaran {.fl = 6, .lut = 0x23357}, 66725fdd593SJeykumar Sankaran {.fl = 7, .lut = 0x223357}, 66825fdd593SJeykumar Sankaran {.fl = 8, .lut = 0x2223357}, 66925fdd593SJeykumar Sankaran {.fl = 9, .lut = 0x22223357}, 67025fdd593SJeykumar Sankaran {.fl = 10, .lut = 0x222223357}, 67125fdd593SJeykumar Sankaran {.fl = 11, .lut = 0x2222223357}, 67225fdd593SJeykumar Sankaran {.fl = 12, .lut = 0x22222223357}, 67325fdd593SJeykumar Sankaran {.fl = 13, .lut = 0x222222223357}, 67425fdd593SJeykumar Sankaran {.fl = 14, .lut = 0x1222222223357}, 67525fdd593SJeykumar Sankaran {.fl = 0, .lut = 0x11222222223357} 67625fdd593SJeykumar Sankaran }; 67725fdd593SJeykumar Sankaran 67894391a14SAngeloGioacchino Del Regno static const struct dpu_qos_lut_entry msm8998_qos_macrotile[] = { 67994391a14SAngeloGioacchino Del Regno {.fl = 10, .lut = 0x1aaff}, 68094391a14SAngeloGioacchino Del Regno {.fl = 11, .lut = 0x5aaff}, 68194391a14SAngeloGioacchino Del Regno {.fl = 12, .lut = 0x15aaff}, 6823f23a52fSArnaud Vrac {.fl = 0, .lut = 0x55aaff}, 68394391a14SAngeloGioacchino Del Regno }; 68494391a14SAngeloGioacchino Del Regno 6857bdc0c4bSKalyan Thota static const struct dpu_qos_lut_entry sc7180_qos_linear[] = { 6867bdc0c4bSKalyan Thota {.fl = 0, .lut = 0x0011222222335777}, 6877bdc0c4bSKalyan Thota }; 6887bdc0c4bSKalyan Thota 689386fced3SJonathan Marek static const struct dpu_qos_lut_entry sm8150_qos_linear[] = { 690386fced3SJonathan Marek {.fl = 0, .lut = 0x0011222222223357 }, 691386fced3SJonathan Marek }; 692386fced3SJonathan Marek 693f3af2d6eSRob Clark static const struct dpu_qos_lut_entry sc8180x_qos_linear[] = { 694f3af2d6eSRob Clark {.fl = 4, .lut = 0x0000000000000357 }, 695f3af2d6eSRob Clark }; 696f3af2d6eSRob Clark 6975334087eSLoic Poulain static const struct dpu_qos_lut_entry qcm2290_qos_linear[] = { 6985334087eSLoic Poulain {.fl = 0, .lut = 0x0011222222335777}, 6995334087eSLoic Poulain }; 7005334087eSLoic Poulain 701abda0d92SStephen Boyd static const struct dpu_qos_lut_entry sdm845_qos_macrotile[] = { 70225fdd593SJeykumar Sankaran {.fl = 10, .lut = 0x344556677}, 70325fdd593SJeykumar Sankaran {.fl = 11, .lut = 0x3344556677}, 70425fdd593SJeykumar Sankaran {.fl = 12, .lut = 0x23344556677}, 70525fdd593SJeykumar Sankaran {.fl = 13, .lut = 0x223344556677}, 70625fdd593SJeykumar Sankaran {.fl = 14, .lut = 0x1223344556677}, 70725fdd593SJeykumar Sankaran {.fl = 0, .lut = 0x112233344556677}, 70825fdd593SJeykumar Sankaran }; 70925fdd593SJeykumar Sankaran 7107bdc0c4bSKalyan Thota static const struct dpu_qos_lut_entry sc7180_qos_macrotile[] = { 7117bdc0c4bSKalyan Thota {.fl = 0, .lut = 0x0011223344556677}, 7127bdc0c4bSKalyan Thota }; 7137bdc0c4bSKalyan Thota 714f3af2d6eSRob Clark static const struct dpu_qos_lut_entry sc8180x_qos_macrotile[] = { 715f3af2d6eSRob Clark {.fl = 10, .lut = 0x0000000344556677}, 716f3af2d6eSRob Clark }; 717f3af2d6eSRob Clark 71894391a14SAngeloGioacchino Del Regno static const struct dpu_qos_lut_entry msm8998_qos_nrt[] = { 71994391a14SAngeloGioacchino Del Regno {.fl = 0, .lut = 0x0}, 72094391a14SAngeloGioacchino Del Regno }; 72194391a14SAngeloGioacchino Del Regno 722abda0d92SStephen Boyd static const struct dpu_qos_lut_entry sdm845_qos_nrt[] = { 72325fdd593SJeykumar Sankaran {.fl = 0, .lut = 0x0}, 72425fdd593SJeykumar Sankaran }; 72525fdd593SJeykumar Sankaran 7267bdc0c4bSKalyan Thota static const struct dpu_qos_lut_entry sc7180_qos_nrt[] = { 7277bdc0c4bSKalyan Thota {.fl = 0, .lut = 0x0}, 7287bdc0c4bSKalyan Thota }; 7297bdc0c4bSKalyan Thota 73025fdd593SJeykumar Sankaran /************************************************************* 731de7d480fSDmitry Baryshkov * Hardware catalog 73225fdd593SJeykumar Sankaran *************************************************************/ 73325fdd593SJeykumar Sankaran 7341c611c48SDmitry Baryshkov #include "catalog/dpu_3_0_msm8998.h" 7351c611c48SDmitry Baryshkov 736460c410fSDmitry Baryshkov #include "catalog/dpu_4_0_sdm845.h" 737460c410fSDmitry Baryshkov 73825035306SDmitry Baryshkov #include "catalog/dpu_5_0_sm8150.h" 73997e2c803SDmitry Baryshkov #include "catalog/dpu_5_1_sc8180x.h" 740f3af2d6eSRob Clark 7412f36168eSDmitry Baryshkov #include "catalog/dpu_6_0_sm8250.h" 742c9cd1552SDmitry Baryshkov #include "catalog/dpu_6_2_sc7180.h" 74301f2e9a7SDmitry Baryshkov #include "catalog/dpu_6_3_sm6115.h" 7445ce22484SDmitry Baryshkov #include "catalog/dpu_6_5_qcm2290.h" 74501f2e9a7SDmitry Baryshkov 746b8ece0c6SDmitry Baryshkov #include "catalog/dpu_7_0_sm8350.h" 747f0f2c32aSDmitry Baryshkov #include "catalog/dpu_7_2_sc7280.h" 748f0f2c32aSDmitry Baryshkov 749225978f4SDmitry Baryshkov #include "catalog/dpu_8_0_sc8280xp.h" 7509cc54793SDmitry Baryshkov #include "catalog/dpu_8_1_sm8450.h" 7519cc54793SDmitry Baryshkov 7529cc54793SDmitry Baryshkov #include "catalog/dpu_9_0_sm8550.h" 753