197fb5e8dSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 225fdd593SJeykumar Sankaran /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 325fdd593SJeykumar Sankaran */ 425fdd593SJeykumar Sankaran 525fdd593SJeykumar Sankaran #define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__ 625fdd593SJeykumar Sankaran #include <linux/slab.h> 725fdd593SJeykumar Sankaran #include <linux/of_address.h> 825fdd593SJeykumar Sankaran #include <linux/platform_device.h> 925fdd593SJeykumar Sankaran #include "dpu_hw_mdss.h" 10*597762d5SDmitry Baryshkov #include "dpu_hw_interrupts.h" 1125fdd593SJeykumar Sankaran #include "dpu_hw_catalog.h" 1225fdd593SJeykumar Sankaran #include "dpu_kms.h" 1325fdd593SJeykumar Sankaran 147bdc0c4bSKalyan Thota #define VIG_MASK \ 157bdc0c4bSKalyan Thota (BIT(DPU_SSPP_SRC) | BIT(DPU_SSPP_QOS) |\ 16b8dab65bSAngeloGioacchino Del Regno BIT(DPU_SSPP_CSC_10BIT) | BIT(DPU_SSPP_CDP) |\ 1725fdd593SJeykumar Sankaran BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_EXCL_RECT)) 1825fdd593SJeykumar Sankaran 197bdc0c4bSKalyan Thota #define VIG_SDM845_MASK \ 20b8dab65bSAngeloGioacchino Del Regno (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3)) 217bdc0c4bSKalyan Thota 227bdc0c4bSKalyan Thota #define VIG_SC7180_MASK \ 23b8dab65bSAngeloGioacchino Del Regno (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED4)) 247bdc0c4bSKalyan Thota 25d21fc5dfSDmitry Baryshkov #define VIG_SM8250_MASK \ 26095eed89SDmitry Baryshkov (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3LITE)) 27d21fc5dfSDmitry Baryshkov 2825fdd593SJeykumar Sankaran #define DMA_SDM845_MASK \ 2925fdd593SJeykumar Sankaran (BIT(DPU_SSPP_SRC) | BIT(DPU_SSPP_QOS) | BIT(DPU_SSPP_QOS_8LVL) |\ 3025fdd593SJeykumar Sankaran BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_TS_PREFILL_REC1) |\ 3125fdd593SJeykumar Sankaran BIT(DPU_SSPP_CDP) | BIT(DPU_SSPP_EXCL_RECT)) 3225fdd593SJeykumar Sankaran 3307ca1fc0SSravanthi Kollukuduru #define DMA_CURSOR_SDM845_MASK \ 3407ca1fc0SSravanthi Kollukuduru (DMA_SDM845_MASK | BIT(DPU_SSPP_CURSOR)) 3507ca1fc0SSravanthi Kollukuduru 3625fdd593SJeykumar Sankaran #define MIXER_SDM845_MASK \ 3725fdd593SJeykumar Sankaran (BIT(DPU_MIXER_SOURCESPLIT) | BIT(DPU_DIM_LAYER)) 3825fdd593SJeykumar Sankaran 397bdc0c4bSKalyan Thota #define MIXER_SC7180_MASK \ 407bdc0c4bSKalyan Thota (BIT(DPU_DIM_LAYER)) 417bdc0c4bSKalyan Thota 4225fdd593SJeykumar Sankaran #define PINGPONG_SDM845_MASK BIT(DPU_PINGPONG_DITHER) 4325fdd593SJeykumar Sankaran 4425fdd593SJeykumar Sankaran #define PINGPONG_SDM845_SPLIT_MASK \ 4525fdd593SJeykumar Sankaran (PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2)) 4625fdd593SJeykumar Sankaran 47591e34a0SKrishna Manikandan #define CTL_SC7280_MASK \ 48591e34a0SKrishna Manikandan (BIT(DPU_CTL_ACTIVE_CFG) | BIT(DPU_CTL_FETCH_ACTIVE)) 49591e34a0SKrishna Manikandan 504369c93cSDmitry Baryshkov #define MERGE_3D_SM8150_MASK (0) 514369c93cSDmitry Baryshkov 524259ff7aSKalyan Thota #define DSPP_SC7180_MASK BIT(DPU_DSPP_PCC) 53e47616dfSKalyan Thota 54cace3ac4SJonathan Marek #define INTF_SDM845_MASK (0) 55cace3ac4SJonathan Marek 56cace3ac4SJonathan Marek #define INTF_SC7180_MASK BIT(DPU_INTF_INPUT_CTRL) | BIT(DPU_INTF_TE) 57cace3ac4SJonathan Marek 58591e34a0SKrishna Manikandan #define INTF_SC7280_MASK INTF_SC7180_MASK | BIT(DPU_DATA_HCTL_EN) 59591e34a0SKrishna Manikandan 60*597762d5SDmitry Baryshkov #define IRQ_SDM845_MASK (BIT(MDP_SSPP_TOP0_INTR) | \ 61*597762d5SDmitry Baryshkov BIT(MDP_SSPP_TOP0_INTR2) | \ 62*597762d5SDmitry Baryshkov BIT(MDP_SSPP_TOP0_HIST_INTR) | \ 63*597762d5SDmitry Baryshkov BIT(MDP_INTF0_INTR) | \ 64*597762d5SDmitry Baryshkov BIT(MDP_INTF1_INTR) | \ 65*597762d5SDmitry Baryshkov BIT(MDP_INTF2_INTR) | \ 66*597762d5SDmitry Baryshkov BIT(MDP_INTF3_INTR) | \ 67*597762d5SDmitry Baryshkov BIT(MDP_INTF4_INTR) | \ 68*597762d5SDmitry Baryshkov BIT(MDP_AD4_0_INTR) | \ 69*597762d5SDmitry Baryshkov BIT(MDP_AD4_1_INTR)) 70*597762d5SDmitry Baryshkov 71*597762d5SDmitry Baryshkov #define IRQ_SC7180_MASK (BIT(MDP_SSPP_TOP0_INTR) | \ 72*597762d5SDmitry Baryshkov BIT(MDP_SSPP_TOP0_INTR2) | \ 73*597762d5SDmitry Baryshkov BIT(MDP_SSPP_TOP0_HIST_INTR) | \ 74*597762d5SDmitry Baryshkov BIT(MDP_INTF0_INTR) | \ 75*597762d5SDmitry Baryshkov BIT(MDP_INTF1_INTR)) 76*597762d5SDmitry Baryshkov 77dc8a4973SKrishna Manikandan #define INTR_SC7180_MASK \ 78dc8a4973SKrishna Manikandan (BIT(DPU_IRQ_TYPE_PING_PONG_RD_PTR) |\ 79dc8a4973SKrishna Manikandan BIT(DPU_IRQ_TYPE_PING_PONG_WR_PTR) |\ 80dc8a4973SKrishna Manikandan BIT(DPU_IRQ_TYPE_PING_PONG_AUTO_REF) |\ 81dc8a4973SKrishna Manikandan BIT(DPU_IRQ_TYPE_PING_PONG_TEAR_CHECK) |\ 82dc8a4973SKrishna Manikandan BIT(DPU_IRQ_TYPE_PING_PONG_TE_CHECK)) 83dc8a4973SKrishna Manikandan 84*597762d5SDmitry Baryshkov #define IRQ_SC7280_MASK (BIT(MDP_SSPP_TOP0_INTR) | \ 85*597762d5SDmitry Baryshkov BIT(MDP_SSPP_TOP0_INTR2) | \ 86*597762d5SDmitry Baryshkov BIT(MDP_SSPP_TOP0_HIST_INTR) | \ 87*597762d5SDmitry Baryshkov BIT(MDP_INTF0_7xxx_INTR) | \ 88*597762d5SDmitry Baryshkov BIT(MDP_INTF1_7xxx_INTR) | \ 89*597762d5SDmitry Baryshkov BIT(MDP_INTF5_7xxx_INTR)) 90*597762d5SDmitry Baryshkov 91*597762d5SDmitry Baryshkov #define IRQ_SM8250_MASK (BIT(MDP_SSPP_TOP0_INTR) | \ 92*597762d5SDmitry Baryshkov BIT(MDP_SSPP_TOP0_INTR2) | \ 93*597762d5SDmitry Baryshkov BIT(MDP_SSPP_TOP0_HIST_INTR) | \ 94*597762d5SDmitry Baryshkov BIT(MDP_INTF0_INTR) | \ 95*597762d5SDmitry Baryshkov BIT(MDP_INTF1_INTR) | \ 96*597762d5SDmitry Baryshkov BIT(MDP_INTF2_INTR) | \ 97*597762d5SDmitry Baryshkov BIT(MDP_INTF3_INTR) | \ 98*597762d5SDmitry Baryshkov BIT(MDP_INTF4_INTR)) 99*597762d5SDmitry Baryshkov 100*597762d5SDmitry Baryshkov 10125fdd593SJeykumar Sankaran #define DEFAULT_PIXEL_RAM_SIZE (50 * 1024) 10225fdd593SJeykumar Sankaran #define DEFAULT_DPU_LINE_WIDTH 2048 10325fdd593SJeykumar Sankaran #define DEFAULT_DPU_OUTPUT_LINE_WIDTH 2560 10425fdd593SJeykumar Sankaran 10525fdd593SJeykumar Sankaran #define MAX_HORZ_DECIMATION 4 10625fdd593SJeykumar Sankaran #define MAX_VERT_DECIMATION 4 10725fdd593SJeykumar Sankaran 10825fdd593SJeykumar Sankaran #define MAX_UPSCALE_RATIO 20 10925fdd593SJeykumar Sankaran #define MAX_DOWNSCALE_RATIO 4 11025fdd593SJeykumar Sankaran #define SSPP_UNITY_SCALE 1 11125fdd593SJeykumar Sankaran 11225fdd593SJeykumar Sankaran #define STRCAT(X, Y) (X Y) 11325fdd593SJeykumar Sankaran 11409c7e370SLee Jones static const uint32_t plane_formats[] = { 11509c7e370SLee Jones DRM_FORMAT_ARGB8888, 11609c7e370SLee Jones DRM_FORMAT_ABGR8888, 11709c7e370SLee Jones DRM_FORMAT_RGBA8888, 11809c7e370SLee Jones DRM_FORMAT_BGRA8888, 11909c7e370SLee Jones DRM_FORMAT_XRGB8888, 12009c7e370SLee Jones DRM_FORMAT_RGBX8888, 12109c7e370SLee Jones DRM_FORMAT_BGRX8888, 12209c7e370SLee Jones DRM_FORMAT_XBGR8888, 12309c7e370SLee Jones DRM_FORMAT_RGB888, 12409c7e370SLee Jones DRM_FORMAT_BGR888, 12509c7e370SLee Jones DRM_FORMAT_RGB565, 12609c7e370SLee Jones DRM_FORMAT_BGR565, 12709c7e370SLee Jones DRM_FORMAT_ARGB1555, 12809c7e370SLee Jones DRM_FORMAT_ABGR1555, 12909c7e370SLee Jones DRM_FORMAT_RGBA5551, 13009c7e370SLee Jones DRM_FORMAT_BGRA5551, 13109c7e370SLee Jones DRM_FORMAT_XRGB1555, 13209c7e370SLee Jones DRM_FORMAT_XBGR1555, 13309c7e370SLee Jones DRM_FORMAT_RGBX5551, 13409c7e370SLee Jones DRM_FORMAT_BGRX5551, 13509c7e370SLee Jones DRM_FORMAT_ARGB4444, 13609c7e370SLee Jones DRM_FORMAT_ABGR4444, 13709c7e370SLee Jones DRM_FORMAT_RGBA4444, 13809c7e370SLee Jones DRM_FORMAT_BGRA4444, 13909c7e370SLee Jones DRM_FORMAT_XRGB4444, 14009c7e370SLee Jones DRM_FORMAT_XBGR4444, 14109c7e370SLee Jones DRM_FORMAT_RGBX4444, 14209c7e370SLee Jones DRM_FORMAT_BGRX4444, 14309c7e370SLee Jones }; 14409c7e370SLee Jones 14509c7e370SLee Jones static const uint32_t plane_formats_yuv[] = { 14609c7e370SLee Jones DRM_FORMAT_ARGB8888, 14709c7e370SLee Jones DRM_FORMAT_ABGR8888, 14809c7e370SLee Jones DRM_FORMAT_RGBA8888, 14909c7e370SLee Jones DRM_FORMAT_BGRX8888, 15009c7e370SLee Jones DRM_FORMAT_BGRA8888, 15109c7e370SLee Jones DRM_FORMAT_XRGB8888, 15209c7e370SLee Jones DRM_FORMAT_XBGR8888, 15309c7e370SLee Jones DRM_FORMAT_RGBX8888, 15409c7e370SLee Jones DRM_FORMAT_RGB888, 15509c7e370SLee Jones DRM_FORMAT_BGR888, 15609c7e370SLee Jones DRM_FORMAT_RGB565, 15709c7e370SLee Jones DRM_FORMAT_BGR565, 15809c7e370SLee Jones DRM_FORMAT_ARGB1555, 15909c7e370SLee Jones DRM_FORMAT_ABGR1555, 16009c7e370SLee Jones DRM_FORMAT_RGBA5551, 16109c7e370SLee Jones DRM_FORMAT_BGRA5551, 16209c7e370SLee Jones DRM_FORMAT_XRGB1555, 16309c7e370SLee Jones DRM_FORMAT_XBGR1555, 16409c7e370SLee Jones DRM_FORMAT_RGBX5551, 16509c7e370SLee Jones DRM_FORMAT_BGRX5551, 16609c7e370SLee Jones DRM_FORMAT_ARGB4444, 16709c7e370SLee Jones DRM_FORMAT_ABGR4444, 16809c7e370SLee Jones DRM_FORMAT_RGBA4444, 16909c7e370SLee Jones DRM_FORMAT_BGRA4444, 17009c7e370SLee Jones DRM_FORMAT_XRGB4444, 17109c7e370SLee Jones DRM_FORMAT_XBGR4444, 17209c7e370SLee Jones DRM_FORMAT_RGBX4444, 17309c7e370SLee Jones DRM_FORMAT_BGRX4444, 17409c7e370SLee Jones 17509c7e370SLee Jones DRM_FORMAT_NV12, 17609c7e370SLee Jones DRM_FORMAT_NV21, 17709c7e370SLee Jones DRM_FORMAT_NV16, 17809c7e370SLee Jones DRM_FORMAT_NV61, 17909c7e370SLee Jones DRM_FORMAT_VYUY, 18009c7e370SLee Jones DRM_FORMAT_UYVY, 18109c7e370SLee Jones DRM_FORMAT_YUYV, 18209c7e370SLee Jones DRM_FORMAT_YVYU, 18309c7e370SLee Jones DRM_FORMAT_YUV420, 18409c7e370SLee Jones DRM_FORMAT_YVU420, 18509c7e370SLee Jones }; 18609c7e370SLee Jones 18725fdd593SJeykumar Sankaran /************************************************************* 18825fdd593SJeykumar Sankaran * DPU sub blocks config 18925fdd593SJeykumar Sankaran *************************************************************/ 19025fdd593SJeykumar Sankaran /* DPU top level caps */ 19125fdd593SJeykumar Sankaran static const struct dpu_caps sdm845_dpu_caps = { 19225fdd593SJeykumar Sankaran .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 19325fdd593SJeykumar Sankaran .max_mixer_blendstages = 0xb, 19425fdd593SJeykumar Sankaran .qseed_type = DPU_SSPP_SCALER_QSEED3, 19525fdd593SJeykumar Sankaran .smart_dma_rev = DPU_SSPP_SMART_DMA_V2, 19625fdd593SJeykumar Sankaran .ubwc_version = DPU_HW_UBWC_VER_20, 19725fdd593SJeykumar Sankaran .has_src_split = true, 19825fdd593SJeykumar Sankaran .has_dim_layer = true, 19925fdd593SJeykumar Sankaran .has_idle_pc = true, 20042a558b7SKalyan Thota .has_3d_merge = true, 2017e9d4cddSJonathan Marek .max_linewidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 2027e9d4cddSJonathan Marek .pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE, 2037e9d4cddSJonathan Marek .max_hdeci_exp = MAX_HORZ_DECIMATION, 2047e9d4cddSJonathan Marek .max_vdeci_exp = MAX_VERT_DECIMATION, 20525fdd593SJeykumar Sankaran }; 20625fdd593SJeykumar Sankaran 2077bdc0c4bSKalyan Thota static const struct dpu_caps sc7180_dpu_caps = { 2087bdc0c4bSKalyan Thota .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 2097bdc0c4bSKalyan Thota .max_mixer_blendstages = 0x9, 2107bdc0c4bSKalyan Thota .qseed_type = DPU_SSPP_SCALER_QSEED4, 2117bdc0c4bSKalyan Thota .smart_dma_rev = DPU_SSPP_SMART_DMA_V2, 2127bdc0c4bSKalyan Thota .ubwc_version = DPU_HW_UBWC_VER_20, 2137bdc0c4bSKalyan Thota .has_dim_layer = true, 2147bdc0c4bSKalyan Thota .has_idle_pc = true, 2157e9d4cddSJonathan Marek .max_linewidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 2167e9d4cddSJonathan Marek .pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE, 2177bdc0c4bSKalyan Thota }; 2187bdc0c4bSKalyan Thota 219386fced3SJonathan Marek static const struct dpu_caps sm8150_dpu_caps = { 220386fced3SJonathan Marek .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 221386fced3SJonathan Marek .max_mixer_blendstages = 0xb, 222386fced3SJonathan Marek .qseed_type = DPU_SSPP_SCALER_QSEED3, 223386fced3SJonathan Marek .smart_dma_rev = DPU_SSPP_SMART_DMA_V2, /* TODO: v2.5 */ 224386fced3SJonathan Marek .ubwc_version = DPU_HW_UBWC_VER_30, 225386fced3SJonathan Marek .has_src_split = true, 226386fced3SJonathan Marek .has_dim_layer = true, 227386fced3SJonathan Marek .has_idle_pc = true, 228386fced3SJonathan Marek .has_3d_merge = true, 229386fced3SJonathan Marek .max_linewidth = 4096, 230386fced3SJonathan Marek .pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE, 231386fced3SJonathan Marek .max_hdeci_exp = MAX_HORZ_DECIMATION, 232386fced3SJonathan Marek .max_vdeci_exp = MAX_VERT_DECIMATION, 233386fced3SJonathan Marek }; 234386fced3SJonathan Marek 235af776a3eSJonathan Marek static const struct dpu_caps sm8250_dpu_caps = { 236af776a3eSJonathan Marek .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 237af776a3eSJonathan Marek .max_mixer_blendstages = 0xb, 238d21fc5dfSDmitry Baryshkov .qseed_type = DPU_SSPP_SCALER_QSEED3LITE, 239af776a3eSJonathan Marek .smart_dma_rev = DPU_SSPP_SMART_DMA_V2, /* TODO: v2.5 */ 240af776a3eSJonathan Marek .ubwc_version = DPU_HW_UBWC_VER_40, 241af776a3eSJonathan Marek .has_src_split = true, 242af776a3eSJonathan Marek .has_dim_layer = true, 243af776a3eSJonathan Marek .has_idle_pc = true, 244af776a3eSJonathan Marek .has_3d_merge = true, 245af776a3eSJonathan Marek .max_linewidth = 4096, 246af776a3eSJonathan Marek .pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE, 247af776a3eSJonathan Marek }; 248af776a3eSJonathan Marek 249591e34a0SKrishna Manikandan static const struct dpu_caps sc7280_dpu_caps = { 250591e34a0SKrishna Manikandan .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 251591e34a0SKrishna Manikandan .max_mixer_blendstages = 0x7, 252591e34a0SKrishna Manikandan .qseed_type = DPU_SSPP_SCALER_QSEED4, 253591e34a0SKrishna Manikandan .smart_dma_rev = DPU_SSPP_SMART_DMA_V2, 254591e34a0SKrishna Manikandan .ubwc_version = DPU_HW_UBWC_VER_30, 255591e34a0SKrishna Manikandan .has_dim_layer = true, 256591e34a0SKrishna Manikandan .has_idle_pc = true, 257591e34a0SKrishna Manikandan .max_linewidth = 2400, 258591e34a0SKrishna Manikandan .pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE, 259591e34a0SKrishna Manikandan }; 260591e34a0SKrishna Manikandan 261abda0d92SStephen Boyd static const struct dpu_mdp_cfg sdm845_mdp[] = { 26225fdd593SJeykumar Sankaran { 26325fdd593SJeykumar Sankaran .name = "top_0", .id = MDP_TOP, 26425fdd593SJeykumar Sankaran .base = 0x0, .len = 0x45C, 26525fdd593SJeykumar Sankaran .features = 0, 26625fdd593SJeykumar Sankaran .highest_bank_bit = 0x2, 26725fdd593SJeykumar Sankaran .clk_ctrls[DPU_CLK_CTRL_VIG0] = { 26825fdd593SJeykumar Sankaran .reg_off = 0x2AC, .bit_off = 0}, 26925fdd593SJeykumar Sankaran .clk_ctrls[DPU_CLK_CTRL_VIG1] = { 27025fdd593SJeykumar Sankaran .reg_off = 0x2B4, .bit_off = 0}, 27125fdd593SJeykumar Sankaran .clk_ctrls[DPU_CLK_CTRL_VIG2] = { 27225fdd593SJeykumar Sankaran .reg_off = 0x2BC, .bit_off = 0}, 27325fdd593SJeykumar Sankaran .clk_ctrls[DPU_CLK_CTRL_VIG3] = { 27425fdd593SJeykumar Sankaran .reg_off = 0x2C4, .bit_off = 0}, 27525fdd593SJeykumar Sankaran .clk_ctrls[DPU_CLK_CTRL_DMA0] = { 27625fdd593SJeykumar Sankaran .reg_off = 0x2AC, .bit_off = 8}, 27725fdd593SJeykumar Sankaran .clk_ctrls[DPU_CLK_CTRL_DMA1] = { 27825fdd593SJeykumar Sankaran .reg_off = 0x2B4, .bit_off = 8}, 27925fdd593SJeykumar Sankaran .clk_ctrls[DPU_CLK_CTRL_CURSOR0] = { 28025fdd593SJeykumar Sankaran .reg_off = 0x2BC, .bit_off = 8}, 28125fdd593SJeykumar Sankaran .clk_ctrls[DPU_CLK_CTRL_CURSOR1] = { 28225fdd593SJeykumar Sankaran .reg_off = 0x2C4, .bit_off = 8}, 28325fdd593SJeykumar Sankaran }, 28425fdd593SJeykumar Sankaran }; 28525fdd593SJeykumar Sankaran 2867bdc0c4bSKalyan Thota static const struct dpu_mdp_cfg sc7180_mdp[] = { 2877bdc0c4bSKalyan Thota { 2887bdc0c4bSKalyan Thota .name = "top_0", .id = MDP_TOP, 2897bdc0c4bSKalyan Thota .base = 0x0, .len = 0x494, 2907bdc0c4bSKalyan Thota .features = 0, 2917bdc0c4bSKalyan Thota .highest_bank_bit = 0x3, 2927bdc0c4bSKalyan Thota .clk_ctrls[DPU_CLK_CTRL_VIG0] = { 2937bdc0c4bSKalyan Thota .reg_off = 0x2AC, .bit_off = 0}, 2947bdc0c4bSKalyan Thota .clk_ctrls[DPU_CLK_CTRL_DMA0] = { 2957bdc0c4bSKalyan Thota .reg_off = 0x2AC, .bit_off = 8}, 2967bdc0c4bSKalyan Thota .clk_ctrls[DPU_CLK_CTRL_CURSOR0] = { 2977b149f2bSKalyan Thota .reg_off = 0x2B4, .bit_off = 8}, 2987b149f2bSKalyan Thota .clk_ctrls[DPU_CLK_CTRL_CURSOR1] = { 2997b149f2bSKalyan Thota .reg_off = 0x2C4, .bit_off = 8}, 3007bdc0c4bSKalyan Thota }, 3017bdc0c4bSKalyan Thota }; 3027bdc0c4bSKalyan Thota 303af776a3eSJonathan Marek static const struct dpu_mdp_cfg sm8250_mdp[] = { 304af776a3eSJonathan Marek { 305af776a3eSJonathan Marek .name = "top_0", .id = MDP_TOP, 306af776a3eSJonathan Marek .base = 0x0, .len = 0x45C, 307af776a3eSJonathan Marek .features = 0, 308af776a3eSJonathan Marek .highest_bank_bit = 0x3, /* TODO: 2 for LP_DDR4 */ 309af776a3eSJonathan Marek .clk_ctrls[DPU_CLK_CTRL_VIG0] = { 310af776a3eSJonathan Marek .reg_off = 0x2AC, .bit_off = 0}, 311af776a3eSJonathan Marek .clk_ctrls[DPU_CLK_CTRL_VIG1] = { 312af776a3eSJonathan Marek .reg_off = 0x2B4, .bit_off = 0}, 313af776a3eSJonathan Marek .clk_ctrls[DPU_CLK_CTRL_VIG2] = { 314af776a3eSJonathan Marek .reg_off = 0x2BC, .bit_off = 0}, 315af776a3eSJonathan Marek .clk_ctrls[DPU_CLK_CTRL_VIG3] = { 316af776a3eSJonathan Marek .reg_off = 0x2C4, .bit_off = 0}, 317af776a3eSJonathan Marek .clk_ctrls[DPU_CLK_CTRL_DMA0] = { 318af776a3eSJonathan Marek .reg_off = 0x2AC, .bit_off = 8}, 319af776a3eSJonathan Marek .clk_ctrls[DPU_CLK_CTRL_DMA1] = { 320af776a3eSJonathan Marek .reg_off = 0x2B4, .bit_off = 8}, 321af776a3eSJonathan Marek .clk_ctrls[DPU_CLK_CTRL_CURSOR0] = { 322af776a3eSJonathan Marek .reg_off = 0x2BC, .bit_off = 8}, 323af776a3eSJonathan Marek .clk_ctrls[DPU_CLK_CTRL_CURSOR1] = { 324af776a3eSJonathan Marek .reg_off = 0x2C4, .bit_off = 8}, 325af776a3eSJonathan Marek .clk_ctrls[DPU_CLK_CTRL_REG_DMA] = { 326af776a3eSJonathan Marek .reg_off = 0x2BC, .bit_off = 20}, 327af776a3eSJonathan Marek }, 328af776a3eSJonathan Marek }; 329af776a3eSJonathan Marek 330591e34a0SKrishna Manikandan static const struct dpu_mdp_cfg sc7280_mdp[] = { 331591e34a0SKrishna Manikandan { 332591e34a0SKrishna Manikandan .name = "top_0", .id = MDP_TOP, 333591e34a0SKrishna Manikandan .base = 0x0, .len = 0x2014, 334591e34a0SKrishna Manikandan .highest_bank_bit = 0x1, 335591e34a0SKrishna Manikandan .clk_ctrls[DPU_CLK_CTRL_VIG0] = { 336591e34a0SKrishna Manikandan .reg_off = 0x2AC, .bit_off = 0}, 337591e34a0SKrishna Manikandan .clk_ctrls[DPU_CLK_CTRL_DMA0] = { 338591e34a0SKrishna Manikandan .reg_off = 0x2AC, .bit_off = 8}, 339591e34a0SKrishna Manikandan .clk_ctrls[DPU_CLK_CTRL_CURSOR0] = { 340591e34a0SKrishna Manikandan .reg_off = 0x2B4, .bit_off = 8}, 341591e34a0SKrishna Manikandan .clk_ctrls[DPU_CLK_CTRL_CURSOR1] = { 342591e34a0SKrishna Manikandan .reg_off = 0x2C4, .bit_off = 8}, 343591e34a0SKrishna Manikandan }, 344591e34a0SKrishna Manikandan }; 345591e34a0SKrishna Manikandan 34625fdd593SJeykumar Sankaran /************************************************************* 34725fdd593SJeykumar Sankaran * CTL sub blocks config 34825fdd593SJeykumar Sankaran *************************************************************/ 349abda0d92SStephen Boyd static const struct dpu_ctl_cfg sdm845_ctl[] = { 35025fdd593SJeykumar Sankaran { 35125fdd593SJeykumar Sankaran .name = "ctl_0", .id = CTL_0, 35225fdd593SJeykumar Sankaran .base = 0x1000, .len = 0xE4, 35325fdd593SJeykumar Sankaran .features = BIT(DPU_CTL_SPLIT_DISPLAY) 35425fdd593SJeykumar Sankaran }, 35525fdd593SJeykumar Sankaran { 35625fdd593SJeykumar Sankaran .name = "ctl_1", .id = CTL_1, 35725fdd593SJeykumar Sankaran .base = 0x1200, .len = 0xE4, 35825fdd593SJeykumar Sankaran .features = BIT(DPU_CTL_SPLIT_DISPLAY) 35925fdd593SJeykumar Sankaran }, 36025fdd593SJeykumar Sankaran { 36125fdd593SJeykumar Sankaran .name = "ctl_2", .id = CTL_2, 36225fdd593SJeykumar Sankaran .base = 0x1400, .len = 0xE4, 36325fdd593SJeykumar Sankaran .features = 0 36425fdd593SJeykumar Sankaran }, 36525fdd593SJeykumar Sankaran { 36625fdd593SJeykumar Sankaran .name = "ctl_3", .id = CTL_3, 36725fdd593SJeykumar Sankaran .base = 0x1600, .len = 0xE4, 36825fdd593SJeykumar Sankaran .features = 0 36925fdd593SJeykumar Sankaran }, 37025fdd593SJeykumar Sankaran { 37125fdd593SJeykumar Sankaran .name = "ctl_4", .id = CTL_4, 37225fdd593SJeykumar Sankaran .base = 0x1800, .len = 0xE4, 37325fdd593SJeykumar Sankaran .features = 0 37425fdd593SJeykumar Sankaran }, 37525fdd593SJeykumar Sankaran }; 37625fdd593SJeykumar Sankaran 3777bdc0c4bSKalyan Thota static const struct dpu_ctl_cfg sc7180_ctl[] = { 3787bdc0c4bSKalyan Thota { 3797bdc0c4bSKalyan Thota .name = "ctl_0", .id = CTL_0, 3807bdc0c4bSKalyan Thota .base = 0x1000, .len = 0xE4, 3817bdc0c4bSKalyan Thota .features = BIT(DPU_CTL_ACTIVE_CFG) 3827bdc0c4bSKalyan Thota }, 3837bdc0c4bSKalyan Thota { 3847bdc0c4bSKalyan Thota .name = "ctl_1", .id = CTL_1, 3857bdc0c4bSKalyan Thota .base = 0x1200, .len = 0xE4, 3867bdc0c4bSKalyan Thota .features = BIT(DPU_CTL_ACTIVE_CFG) 3877bdc0c4bSKalyan Thota }, 3887bdc0c4bSKalyan Thota { 3897bdc0c4bSKalyan Thota .name = "ctl_2", .id = CTL_2, 3907bdc0c4bSKalyan Thota .base = 0x1400, .len = 0xE4, 3917bdc0c4bSKalyan Thota .features = BIT(DPU_CTL_ACTIVE_CFG) 3927bdc0c4bSKalyan Thota }, 3937bdc0c4bSKalyan Thota }; 3947bdc0c4bSKalyan Thota 395386fced3SJonathan Marek static const struct dpu_ctl_cfg sm8150_ctl[] = { 396386fced3SJonathan Marek { 397386fced3SJonathan Marek .name = "ctl_0", .id = CTL_0, 398386fced3SJonathan Marek .base = 0x1000, .len = 0x1e0, 399386fced3SJonathan Marek .features = BIT(DPU_CTL_ACTIVE_CFG) | BIT(DPU_CTL_SPLIT_DISPLAY) 400386fced3SJonathan Marek }, 401386fced3SJonathan Marek { 402386fced3SJonathan Marek .name = "ctl_1", .id = CTL_1, 403386fced3SJonathan Marek .base = 0x1200, .len = 0x1e0, 404386fced3SJonathan Marek .features = BIT(DPU_CTL_ACTIVE_CFG) | BIT(DPU_CTL_SPLIT_DISPLAY) 405386fced3SJonathan Marek }, 406386fced3SJonathan Marek { 407386fced3SJonathan Marek .name = "ctl_2", .id = CTL_2, 408386fced3SJonathan Marek .base = 0x1400, .len = 0x1e0, 409386fced3SJonathan Marek .features = BIT(DPU_CTL_ACTIVE_CFG) 410386fced3SJonathan Marek }, 411386fced3SJonathan Marek { 412386fced3SJonathan Marek .name = "ctl_3", .id = CTL_3, 413386fced3SJonathan Marek .base = 0x1600, .len = 0x1e0, 414386fced3SJonathan Marek .features = BIT(DPU_CTL_ACTIVE_CFG) 415386fced3SJonathan Marek }, 416386fced3SJonathan Marek { 417386fced3SJonathan Marek .name = "ctl_4", .id = CTL_4, 418386fced3SJonathan Marek .base = 0x1800, .len = 0x1e0, 419386fced3SJonathan Marek .features = BIT(DPU_CTL_ACTIVE_CFG) 420386fced3SJonathan Marek }, 421386fced3SJonathan Marek { 422386fced3SJonathan Marek .name = "ctl_5", .id = CTL_5, 423386fced3SJonathan Marek .base = 0x1a00, .len = 0x1e0, 424386fced3SJonathan Marek .features = BIT(DPU_CTL_ACTIVE_CFG) 425386fced3SJonathan Marek }, 426386fced3SJonathan Marek }; 427386fced3SJonathan Marek 428591e34a0SKrishna Manikandan static const struct dpu_ctl_cfg sc7280_ctl[] = { 429591e34a0SKrishna Manikandan { 430591e34a0SKrishna Manikandan .name = "ctl_0", .id = CTL_0, 431591e34a0SKrishna Manikandan .base = 0x15000, .len = 0x1E8, 432591e34a0SKrishna Manikandan .features = CTL_SC7280_MASK 433591e34a0SKrishna Manikandan }, 434591e34a0SKrishna Manikandan { 435591e34a0SKrishna Manikandan .name = "ctl_1", .id = CTL_1, 436591e34a0SKrishna Manikandan .base = 0x16000, .len = 0x1E8, 437591e34a0SKrishna Manikandan .features = CTL_SC7280_MASK 438591e34a0SKrishna Manikandan }, 439591e34a0SKrishna Manikandan { 440591e34a0SKrishna Manikandan .name = "ctl_2", .id = CTL_2, 441591e34a0SKrishna Manikandan .base = 0x17000, .len = 0x1E8, 442591e34a0SKrishna Manikandan .features = CTL_SC7280_MASK 443591e34a0SKrishna Manikandan }, 444591e34a0SKrishna Manikandan { 445591e34a0SKrishna Manikandan .name = "ctl_3", .id = CTL_3, 446591e34a0SKrishna Manikandan .base = 0x18000, .len = 0x1E8, 447591e34a0SKrishna Manikandan .features = CTL_SC7280_MASK 448591e34a0SKrishna Manikandan }, 449591e34a0SKrishna Manikandan }; 450591e34a0SKrishna Manikandan 45125fdd593SJeykumar Sankaran /************************************************************* 45225fdd593SJeykumar Sankaran * SSPP sub blocks config 45325fdd593SJeykumar Sankaran *************************************************************/ 45425fdd593SJeykumar Sankaran 45525fdd593SJeykumar Sankaran /* SSPP common configuration */ 45625fdd593SJeykumar Sankaran 457b75ab05aSShubhashree Dhar #define _VIG_SBLK(num, sdma_pri, qseed_ver) \ 45825fdd593SJeykumar Sankaran { \ 45925fdd593SJeykumar Sankaran .maxdwnscale = MAX_DOWNSCALE_RATIO, \ 46025fdd593SJeykumar Sankaran .maxupscale = MAX_UPSCALE_RATIO, \ 46125fdd593SJeykumar Sankaran .smart_dma_priority = sdma_pri, \ 46225fdd593SJeykumar Sankaran .src_blk = {.name = STRCAT("sspp_src_", num), \ 46325fdd593SJeykumar Sankaran .id = DPU_SSPP_SRC, .base = 0x00, .len = 0x150,}, \ 46425fdd593SJeykumar Sankaran .scaler_blk = {.name = STRCAT("sspp_scaler", num), \ 465b75ab05aSShubhashree Dhar .id = qseed_ver, \ 46625fdd593SJeykumar Sankaran .base = 0xa00, .len = 0xa0,}, \ 46725fdd593SJeykumar Sankaran .csc_blk = {.name = STRCAT("sspp_csc", num), \ 46825fdd593SJeykumar Sankaran .id = DPU_SSPP_CSC_10BIT, \ 46925fdd593SJeykumar Sankaran .base = 0x1a00, .len = 0x100,}, \ 47025fdd593SJeykumar Sankaran .format_list = plane_formats_yuv, \ 471e6b63a7bSFritz Koenig .num_formats = ARRAY_SIZE(plane_formats_yuv), \ 47225fdd593SJeykumar Sankaran .virt_format_list = plane_formats, \ 473e6b63a7bSFritz Koenig .virt_num_formats = ARRAY_SIZE(plane_formats), \ 47425fdd593SJeykumar Sankaran } 47525fdd593SJeykumar Sankaran 47625fdd593SJeykumar Sankaran #define _DMA_SBLK(num, sdma_pri) \ 47725fdd593SJeykumar Sankaran { \ 47825fdd593SJeykumar Sankaran .maxdwnscale = SSPP_UNITY_SCALE, \ 47925fdd593SJeykumar Sankaran .maxupscale = SSPP_UNITY_SCALE, \ 48025fdd593SJeykumar Sankaran .smart_dma_priority = sdma_pri, \ 48125fdd593SJeykumar Sankaran .src_blk = {.name = STRCAT("sspp_src_", num), \ 48225fdd593SJeykumar Sankaran .id = DPU_SSPP_SRC, .base = 0x00, .len = 0x150,}, \ 48325fdd593SJeykumar Sankaran .format_list = plane_formats, \ 484e6b63a7bSFritz Koenig .num_formats = ARRAY_SIZE(plane_formats), \ 48525fdd593SJeykumar Sankaran .virt_format_list = plane_formats, \ 486e6b63a7bSFritz Koenig .virt_num_formats = ARRAY_SIZE(plane_formats), \ 48725fdd593SJeykumar Sankaran } 48825fdd593SJeykumar Sankaran 489b75ab05aSShubhashree Dhar static const struct dpu_sspp_sub_blks sdm845_vig_sblk_0 = 490b75ab05aSShubhashree Dhar _VIG_SBLK("0", 5, DPU_SSPP_SCALER_QSEED3); 491b75ab05aSShubhashree Dhar static const struct dpu_sspp_sub_blks sdm845_vig_sblk_1 = 492b75ab05aSShubhashree Dhar _VIG_SBLK("1", 6, DPU_SSPP_SCALER_QSEED3); 493b75ab05aSShubhashree Dhar static const struct dpu_sspp_sub_blks sdm845_vig_sblk_2 = 494b75ab05aSShubhashree Dhar _VIG_SBLK("2", 7, DPU_SSPP_SCALER_QSEED3); 495b75ab05aSShubhashree Dhar static const struct dpu_sspp_sub_blks sdm845_vig_sblk_3 = 496b75ab05aSShubhashree Dhar _VIG_SBLK("3", 8, DPU_SSPP_SCALER_QSEED3); 49725fdd593SJeykumar Sankaran 49825fdd593SJeykumar Sankaran static const struct dpu_sspp_sub_blks sdm845_dma_sblk_0 = _DMA_SBLK("8", 1); 49925fdd593SJeykumar Sankaran static const struct dpu_sspp_sub_blks sdm845_dma_sblk_1 = _DMA_SBLK("9", 2); 50025fdd593SJeykumar Sankaran static const struct dpu_sspp_sub_blks sdm845_dma_sblk_2 = _DMA_SBLK("10", 3); 50125fdd593SJeykumar Sankaran static const struct dpu_sspp_sub_blks sdm845_dma_sblk_3 = _DMA_SBLK("11", 4); 50225fdd593SJeykumar Sankaran 50307ca1fc0SSravanthi Kollukuduru #define SSPP_BLK(_name, _id, _base, _features, \ 50407ca1fc0SSravanthi Kollukuduru _sblk, _xinid, _type, _clkctrl) \ 50525fdd593SJeykumar Sankaran { \ 50625fdd593SJeykumar Sankaran .name = _name, .id = _id, \ 50725fdd593SJeykumar Sankaran .base = _base, .len = 0x1c8, \ 50807ca1fc0SSravanthi Kollukuduru .features = _features, \ 50925fdd593SJeykumar Sankaran .sblk = &_sblk, \ 51025fdd593SJeykumar Sankaran .xin_id = _xinid, \ 51107ca1fc0SSravanthi Kollukuduru .type = _type, \ 51225fdd593SJeykumar Sankaran .clk_ctrl = _clkctrl \ 51325fdd593SJeykumar Sankaran } 51425fdd593SJeykumar Sankaran 515abda0d92SStephen Boyd static const struct dpu_sspp_cfg sdm845_sspp[] = { 51607ca1fc0SSravanthi Kollukuduru SSPP_BLK("sspp_0", SSPP_VIG0, 0x4000, VIG_SDM845_MASK, 51707ca1fc0SSravanthi Kollukuduru sdm845_vig_sblk_0, 0, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG0), 51807ca1fc0SSravanthi Kollukuduru SSPP_BLK("sspp_1", SSPP_VIG1, 0x6000, VIG_SDM845_MASK, 51907ca1fc0SSravanthi Kollukuduru sdm845_vig_sblk_1, 4, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG1), 52007ca1fc0SSravanthi Kollukuduru SSPP_BLK("sspp_2", SSPP_VIG2, 0x8000, VIG_SDM845_MASK, 52107ca1fc0SSravanthi Kollukuduru sdm845_vig_sblk_2, 8, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG2), 52207ca1fc0SSravanthi Kollukuduru SSPP_BLK("sspp_3", SSPP_VIG3, 0xa000, VIG_SDM845_MASK, 52307ca1fc0SSravanthi Kollukuduru sdm845_vig_sblk_3, 12, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG3), 52407ca1fc0SSravanthi Kollukuduru SSPP_BLK("sspp_8", SSPP_DMA0, 0x24000, DMA_SDM845_MASK, 52507ca1fc0SSravanthi Kollukuduru sdm845_dma_sblk_0, 1, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA0), 52607ca1fc0SSravanthi Kollukuduru SSPP_BLK("sspp_9", SSPP_DMA1, 0x26000, DMA_SDM845_MASK, 52707ca1fc0SSravanthi Kollukuduru sdm845_dma_sblk_1, 5, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA1), 52807ca1fc0SSravanthi Kollukuduru SSPP_BLK("sspp_10", SSPP_DMA2, 0x28000, DMA_CURSOR_SDM845_MASK, 52907ca1fc0SSravanthi Kollukuduru sdm845_dma_sblk_2, 9, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR0), 53007ca1fc0SSravanthi Kollukuduru SSPP_BLK("sspp_11", SSPP_DMA3, 0x2a000, DMA_CURSOR_SDM845_MASK, 53107ca1fc0SSravanthi Kollukuduru sdm845_dma_sblk_3, 13, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR1), 53225fdd593SJeykumar Sankaran }; 53325fdd593SJeykumar Sankaran 534b75ab05aSShubhashree Dhar static const struct dpu_sspp_sub_blks sc7180_vig_sblk_0 = 535b75ab05aSShubhashree Dhar _VIG_SBLK("0", 4, DPU_SSPP_SCALER_QSEED4); 536b75ab05aSShubhashree Dhar 5377bdc0c4bSKalyan Thota static const struct dpu_sspp_cfg sc7180_sspp[] = { 5387bdc0c4bSKalyan Thota SSPP_BLK("sspp_0", SSPP_VIG0, 0x4000, VIG_SC7180_MASK, 539b75ab05aSShubhashree Dhar sc7180_vig_sblk_0, 0, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG0), 5407bdc0c4bSKalyan Thota SSPP_BLK("sspp_8", SSPP_DMA0, 0x24000, DMA_SDM845_MASK, 5417bdc0c4bSKalyan Thota sdm845_dma_sblk_0, 1, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA0), 5427b149f2bSKalyan Thota SSPP_BLK("sspp_9", SSPP_DMA1, 0x26000, DMA_CURSOR_SDM845_MASK, 5437b149f2bSKalyan Thota sdm845_dma_sblk_1, 5, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR0), 5447bdc0c4bSKalyan Thota SSPP_BLK("sspp_10", SSPP_DMA2, 0x28000, DMA_CURSOR_SDM845_MASK, 5457b149f2bSKalyan Thota sdm845_dma_sblk_2, 9, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR1), 5467bdc0c4bSKalyan Thota }; 5477bdc0c4bSKalyan Thota 548d21fc5dfSDmitry Baryshkov static const struct dpu_sspp_sub_blks sm8250_vig_sblk_0 = 549d21fc5dfSDmitry Baryshkov _VIG_SBLK("0", 5, DPU_SSPP_SCALER_QSEED3LITE); 550d21fc5dfSDmitry Baryshkov static const struct dpu_sspp_sub_blks sm8250_vig_sblk_1 = 551d21fc5dfSDmitry Baryshkov _VIG_SBLK("1", 6, DPU_SSPP_SCALER_QSEED3LITE); 552d21fc5dfSDmitry Baryshkov static const struct dpu_sspp_sub_blks sm8250_vig_sblk_2 = 553d21fc5dfSDmitry Baryshkov _VIG_SBLK("2", 7, DPU_SSPP_SCALER_QSEED3LITE); 554d21fc5dfSDmitry Baryshkov static const struct dpu_sspp_sub_blks sm8250_vig_sblk_3 = 555d21fc5dfSDmitry Baryshkov _VIG_SBLK("3", 8, DPU_SSPP_SCALER_QSEED3LITE); 556d21fc5dfSDmitry Baryshkov 557d21fc5dfSDmitry Baryshkov static const struct dpu_sspp_cfg sm8250_sspp[] = { 558d21fc5dfSDmitry Baryshkov SSPP_BLK("sspp_0", SSPP_VIG0, 0x4000, VIG_SM8250_MASK, 559d21fc5dfSDmitry Baryshkov sm8250_vig_sblk_0, 0, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG0), 560d21fc5dfSDmitry Baryshkov SSPP_BLK("sspp_1", SSPP_VIG1, 0x6000, VIG_SM8250_MASK, 561d21fc5dfSDmitry Baryshkov sm8250_vig_sblk_1, 4, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG1), 562d21fc5dfSDmitry Baryshkov SSPP_BLK("sspp_2", SSPP_VIG2, 0x8000, VIG_SM8250_MASK, 563d21fc5dfSDmitry Baryshkov sm8250_vig_sblk_2, 8, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG2), 564d21fc5dfSDmitry Baryshkov SSPP_BLK("sspp_3", SSPP_VIG3, 0xa000, VIG_SM8250_MASK, 565d21fc5dfSDmitry Baryshkov sm8250_vig_sblk_3, 12, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG3), 566d21fc5dfSDmitry Baryshkov SSPP_BLK("sspp_8", SSPP_DMA0, 0x24000, DMA_SDM845_MASK, 567d21fc5dfSDmitry Baryshkov sdm845_dma_sblk_0, 1, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA0), 568d21fc5dfSDmitry Baryshkov SSPP_BLK("sspp_9", SSPP_DMA1, 0x26000, DMA_SDM845_MASK, 569d21fc5dfSDmitry Baryshkov sdm845_dma_sblk_1, 5, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA1), 570d21fc5dfSDmitry Baryshkov SSPP_BLK("sspp_10", SSPP_DMA2, 0x28000, DMA_CURSOR_SDM845_MASK, 571d21fc5dfSDmitry Baryshkov sdm845_dma_sblk_2, 9, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR0), 572d21fc5dfSDmitry Baryshkov SSPP_BLK("sspp_11", SSPP_DMA3, 0x2a000, DMA_CURSOR_SDM845_MASK, 573d21fc5dfSDmitry Baryshkov sdm845_dma_sblk_3, 13, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR1), 574d21fc5dfSDmitry Baryshkov }; 575d21fc5dfSDmitry Baryshkov 576591e34a0SKrishna Manikandan static const struct dpu_sspp_cfg sc7280_sspp[] = { 577591e34a0SKrishna Manikandan SSPP_BLK("sspp_0", SSPP_VIG0, 0x4000, VIG_SC7180_MASK, 578591e34a0SKrishna Manikandan sc7180_vig_sblk_0, 0, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG0), 579591e34a0SKrishna Manikandan SSPP_BLK("sspp_8", SSPP_DMA0, 0x24000, DMA_SDM845_MASK, 580591e34a0SKrishna Manikandan sdm845_dma_sblk_0, 1, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA0), 581591e34a0SKrishna Manikandan SSPP_BLK("sspp_9", SSPP_DMA1, 0x26000, DMA_CURSOR_SDM845_MASK, 582591e34a0SKrishna Manikandan sdm845_dma_sblk_1, 5, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR0), 583591e34a0SKrishna Manikandan SSPP_BLK("sspp_10", SSPP_DMA2, 0x28000, DMA_CURSOR_SDM845_MASK, 584591e34a0SKrishna Manikandan sdm845_dma_sblk_2, 9, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR1), 585591e34a0SKrishna Manikandan }; 586591e34a0SKrishna Manikandan 58725fdd593SJeykumar Sankaran /************************************************************* 58825fdd593SJeykumar Sankaran * MIXER sub blocks config 58925fdd593SJeykumar Sankaran *************************************************************/ 5907bdc0c4bSKalyan Thota 5917bdc0c4bSKalyan Thota /* SDM845 */ 5927bdc0c4bSKalyan Thota 59325fdd593SJeykumar Sankaran static const struct dpu_lm_sub_blks sdm845_lm_sblk = { 59425fdd593SJeykumar Sankaran .maxwidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 59525fdd593SJeykumar Sankaran .maxblendstages = 11, /* excluding base layer */ 59625fdd593SJeykumar Sankaran .blendstage_base = { /* offsets relative to mixer base */ 59725fdd593SJeykumar Sankaran 0x20, 0x38, 0x50, 0x68, 0x80, 0x98, 59825fdd593SJeykumar Sankaran 0xb0, 0xc8, 0xe0, 0xf8, 0x110 59925fdd593SJeykumar Sankaran }, 60025fdd593SJeykumar Sankaran }; 60125fdd593SJeykumar Sankaran 602e47616dfSKalyan Thota #define LM_BLK(_name, _id, _base, _fmask, _sblk, _pp, _lmpair, _dspp) \ 60325fdd593SJeykumar Sankaran { \ 60425fdd593SJeykumar Sankaran .name = _name, .id = _id, \ 60525fdd593SJeykumar Sankaran .base = _base, .len = 0x320, \ 6067bdc0c4bSKalyan Thota .features = _fmask, \ 6077bdc0c4bSKalyan Thota .sblk = _sblk, \ 60825fdd593SJeykumar Sankaran .pingpong = _pp, \ 609e47616dfSKalyan Thota .lm_pair_mask = (1 << _lmpair), \ 610e47616dfSKalyan Thota .dspp = _dspp \ 61125fdd593SJeykumar Sankaran } 61225fdd593SJeykumar Sankaran 613abda0d92SStephen Boyd static const struct dpu_lm_cfg sdm845_lm[] = { 6147bdc0c4bSKalyan Thota LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK, 615e47616dfSKalyan Thota &sdm845_lm_sblk, PINGPONG_0, LM_1, 0), 6167bdc0c4bSKalyan Thota LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK, 617e47616dfSKalyan Thota &sdm845_lm_sblk, PINGPONG_1, LM_0, 0), 6187bdc0c4bSKalyan Thota LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK, 619e47616dfSKalyan Thota &sdm845_lm_sblk, PINGPONG_2, LM_5, 0), 6207bdc0c4bSKalyan Thota LM_BLK("lm_3", LM_3, 0x0, MIXER_SDM845_MASK, 621e47616dfSKalyan Thota &sdm845_lm_sblk, PINGPONG_MAX, 0, 0), 6227bdc0c4bSKalyan Thota LM_BLK("lm_4", LM_4, 0x0, MIXER_SDM845_MASK, 623e47616dfSKalyan Thota &sdm845_lm_sblk, PINGPONG_MAX, 0, 0), 6247bdc0c4bSKalyan Thota LM_BLK("lm_5", LM_5, 0x49000, MIXER_SDM845_MASK, 625e47616dfSKalyan Thota &sdm845_lm_sblk, PINGPONG_3, LM_2, 0), 6267bdc0c4bSKalyan Thota }; 6277bdc0c4bSKalyan Thota 6287bdc0c4bSKalyan Thota /* SC7180 */ 6297bdc0c4bSKalyan Thota 6307bdc0c4bSKalyan Thota static const struct dpu_lm_sub_blks sc7180_lm_sblk = { 6317bdc0c4bSKalyan Thota .maxwidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 6327bdc0c4bSKalyan Thota .maxblendstages = 7, /* excluding base layer */ 6337bdc0c4bSKalyan Thota .blendstage_base = { /* offsets relative to mixer base */ 6347bdc0c4bSKalyan Thota 0x20, 0x38, 0x50, 0x68, 0x80, 0x98, 0xb0 6357bdc0c4bSKalyan Thota }, 6367bdc0c4bSKalyan Thota }; 6377bdc0c4bSKalyan Thota 6387bdc0c4bSKalyan Thota static const struct dpu_lm_cfg sc7180_lm[] = { 6397bdc0c4bSKalyan Thota LM_BLK("lm_0", LM_0, 0x44000, MIXER_SC7180_MASK, 640e47616dfSKalyan Thota &sc7180_lm_sblk, PINGPONG_0, LM_1, DSPP_0), 6417bdc0c4bSKalyan Thota LM_BLK("lm_1", LM_1, 0x45000, MIXER_SC7180_MASK, 642e47616dfSKalyan Thota &sc7180_lm_sblk, PINGPONG_1, LM_0, 0), 64325fdd593SJeykumar Sankaran }; 64425fdd593SJeykumar Sankaran 645386fced3SJonathan Marek /* SM8150 */ 646386fced3SJonathan Marek 647386fced3SJonathan Marek static const struct dpu_lm_cfg sm8150_lm[] = { 648386fced3SJonathan Marek LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK, 64905ae91d9SDmitry Baryshkov &sdm845_lm_sblk, PINGPONG_0, LM_1, DSPP_0), 650386fced3SJonathan Marek LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK, 65105ae91d9SDmitry Baryshkov &sdm845_lm_sblk, PINGPONG_1, LM_0, DSPP_1), 652386fced3SJonathan Marek LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK, 653386fced3SJonathan Marek &sdm845_lm_sblk, PINGPONG_2, LM_3, 0), 654386fced3SJonathan Marek LM_BLK("lm_3", LM_3, 0x47000, MIXER_SDM845_MASK, 655386fced3SJonathan Marek &sdm845_lm_sblk, PINGPONG_3, LM_2, 0), 656386fced3SJonathan Marek LM_BLK("lm_4", LM_4, 0x48000, MIXER_SDM845_MASK, 657386fced3SJonathan Marek &sdm845_lm_sblk, PINGPONG_4, LM_5, 0), 658386fced3SJonathan Marek LM_BLK("lm_5", LM_5, 0x49000, MIXER_SDM845_MASK, 659386fced3SJonathan Marek &sdm845_lm_sblk, PINGPONG_5, LM_4, 0), 660386fced3SJonathan Marek }; 661386fced3SJonathan Marek 662591e34a0SKrishna Manikandan static const struct dpu_lm_cfg sc7280_lm[] = { 663591e34a0SKrishna Manikandan LM_BLK("lm_0", LM_0, 0x44000, MIXER_SC7180_MASK, 664591e34a0SKrishna Manikandan &sc7180_lm_sblk, PINGPONG_0, 0, 0), 665591e34a0SKrishna Manikandan LM_BLK("lm_2", LM_2, 0x46000, MIXER_SC7180_MASK, 666591e34a0SKrishna Manikandan &sc7180_lm_sblk, PINGPONG_2, LM_3, 0), 667591e34a0SKrishna Manikandan LM_BLK("lm_3", LM_3, 0x47000, MIXER_SC7180_MASK, 668591e34a0SKrishna Manikandan &sc7180_lm_sblk, PINGPONG_3, LM_2, 0), 669591e34a0SKrishna Manikandan }; 670591e34a0SKrishna Manikandan 67125fdd593SJeykumar Sankaran /************************************************************* 672e47616dfSKalyan Thota * DSPP sub blocks config 673e47616dfSKalyan Thota *************************************************************/ 6744259ff7aSKalyan Thota static const struct dpu_dspp_sub_blks sc7180_dspp_sblk = { 6754259ff7aSKalyan Thota .pcc = {.id = DPU_DSPP_PCC, .base = 0x1700, 6764259ff7aSKalyan Thota .len = 0x90, .version = 0x10000}, 6774259ff7aSKalyan Thota }; 6784259ff7aSKalyan Thota 67905ae91d9SDmitry Baryshkov static const struct dpu_dspp_sub_blks sm8150_dspp_sblk = { 68005ae91d9SDmitry Baryshkov .pcc = {.id = DPU_DSPP_PCC, .base = 0x1700, 68105ae91d9SDmitry Baryshkov .len = 0x90, .version = 0x40000}, 68205ae91d9SDmitry Baryshkov }; 68305ae91d9SDmitry Baryshkov 684862314bcSAngeloGioacchino Del Regno #define DSPP_BLK(_name, _id, _base, _mask, _sblk) \ 685e47616dfSKalyan Thota {\ 686e47616dfSKalyan Thota .name = _name, .id = _id, \ 687e47616dfSKalyan Thota .base = _base, .len = 0x1800, \ 688862314bcSAngeloGioacchino Del Regno .features = _mask, \ 68905ae91d9SDmitry Baryshkov .sblk = _sblk \ 690e47616dfSKalyan Thota } 691e47616dfSKalyan Thota 692e47616dfSKalyan Thota static const struct dpu_dspp_cfg sc7180_dspp[] = { 693862314bcSAngeloGioacchino Del Regno DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, 694862314bcSAngeloGioacchino Del Regno &sc7180_dspp_sblk), 69505ae91d9SDmitry Baryshkov }; 69605ae91d9SDmitry Baryshkov 69705ae91d9SDmitry Baryshkov static const struct dpu_dspp_cfg sm8150_dspp[] = { 698862314bcSAngeloGioacchino Del Regno DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, 699862314bcSAngeloGioacchino Del Regno &sm8150_dspp_sblk), 700862314bcSAngeloGioacchino Del Regno DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK, 701862314bcSAngeloGioacchino Del Regno &sm8150_dspp_sblk), 702862314bcSAngeloGioacchino Del Regno DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK, 703862314bcSAngeloGioacchino Del Regno &sm8150_dspp_sblk), 704862314bcSAngeloGioacchino Del Regno DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK, 705862314bcSAngeloGioacchino Del Regno &sm8150_dspp_sblk), 706e47616dfSKalyan Thota }; 707386fced3SJonathan Marek 708e47616dfSKalyan Thota /************************************************************* 70925fdd593SJeykumar Sankaran * PINGPONG sub blocks config 71025fdd593SJeykumar Sankaran *************************************************************/ 71125fdd593SJeykumar Sankaran static const struct dpu_pingpong_sub_blks sdm845_pp_sblk_te = { 71225fdd593SJeykumar Sankaran .te2 = {.id = DPU_PINGPONG_TE2, .base = 0x2000, .len = 0x0, 71325fdd593SJeykumar Sankaran .version = 0x1}, 71425fdd593SJeykumar Sankaran .dither = {.id = DPU_PINGPONG_DITHER, .base = 0x30e0, 71525fdd593SJeykumar Sankaran .len = 0x20, .version = 0x10000}, 71625fdd593SJeykumar Sankaran }; 71725fdd593SJeykumar Sankaran 71825fdd593SJeykumar Sankaran static const struct dpu_pingpong_sub_blks sdm845_pp_sblk = { 71925fdd593SJeykumar Sankaran .dither = {.id = DPU_PINGPONG_DITHER, .base = 0x30e0, 72025fdd593SJeykumar Sankaran .len = 0x20, .version = 0x10000}, 72125fdd593SJeykumar Sankaran }; 72225fdd593SJeykumar Sankaran 723591e34a0SKrishna Manikandan static const struct dpu_pingpong_sub_blks sc7280_pp_sblk = { 724591e34a0SKrishna Manikandan .dither = {.id = DPU_PINGPONG_DITHER, .base = 0xe0, 725591e34a0SKrishna Manikandan .len = 0x20, .version = 0x20000}, 726591e34a0SKrishna Manikandan }; 727591e34a0SKrishna Manikandan 728591e34a0SKrishna Manikandan #define PP_BLK_TE(_name, _id, _base, _merge_3d, _sblk) \ 72925fdd593SJeykumar Sankaran {\ 73025fdd593SJeykumar Sankaran .name = _name, .id = _id, \ 73125fdd593SJeykumar Sankaran .base = _base, .len = 0xd4, \ 73225fdd593SJeykumar Sankaran .features = PINGPONG_SDM845_SPLIT_MASK, \ 7334369c93cSDmitry Baryshkov .merge_3d = _merge_3d, \ 734591e34a0SKrishna Manikandan .sblk = &_sblk \ 73525fdd593SJeykumar Sankaran } 736591e34a0SKrishna Manikandan #define PP_BLK(_name, _id, _base, _merge_3d, _sblk) \ 73725fdd593SJeykumar Sankaran {\ 73825fdd593SJeykumar Sankaran .name = _name, .id = _id, \ 73925fdd593SJeykumar Sankaran .base = _base, .len = 0xd4, \ 74025fdd593SJeykumar Sankaran .features = PINGPONG_SDM845_MASK, \ 7414369c93cSDmitry Baryshkov .merge_3d = _merge_3d, \ 742591e34a0SKrishna Manikandan .sblk = &_sblk \ 74325fdd593SJeykumar Sankaran } 74425fdd593SJeykumar Sankaran 745abda0d92SStephen Boyd static const struct dpu_pingpong_cfg sdm845_pp[] = { 746591e34a0SKrishna Manikandan PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000, 0, sdm845_pp_sblk_te), 747591e34a0SKrishna Manikandan PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800, 0, sdm845_pp_sblk_te), 748591e34a0SKrishna Manikandan PP_BLK("pingpong_2", PINGPONG_2, 0x71000, 0, sdm845_pp_sblk), 749591e34a0SKrishna Manikandan PP_BLK("pingpong_3", PINGPONG_3, 0x71800, 0, sdm845_pp_sblk), 75025fdd593SJeykumar Sankaran }; 75125fdd593SJeykumar Sankaran 7527bdc0c4bSKalyan Thota static struct dpu_pingpong_cfg sc7180_pp[] = { 753591e34a0SKrishna Manikandan PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000, 0, sdm845_pp_sblk_te), 754591e34a0SKrishna Manikandan PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800, 0, sdm845_pp_sblk_te), 7557bdc0c4bSKalyan Thota }; 7567bdc0c4bSKalyan Thota 757386fced3SJonathan Marek static const struct dpu_pingpong_cfg sm8150_pp[] = { 758591e34a0SKrishna Manikandan PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000, MERGE_3D_0, sdm845_pp_sblk_te), 759591e34a0SKrishna Manikandan PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800, MERGE_3D_0, sdm845_pp_sblk_te), 760591e34a0SKrishna Manikandan PP_BLK("pingpong_2", PINGPONG_2, 0x71000, MERGE_3D_1, sdm845_pp_sblk), 761591e34a0SKrishna Manikandan PP_BLK("pingpong_3", PINGPONG_3, 0x71800, MERGE_3D_1, sdm845_pp_sblk), 762591e34a0SKrishna Manikandan PP_BLK("pingpong_4", PINGPONG_4, 0x72000, MERGE_3D_2, sdm845_pp_sblk), 763591e34a0SKrishna Manikandan PP_BLK("pingpong_5", PINGPONG_5, 0x72800, MERGE_3D_2, sdm845_pp_sblk), 7644369c93cSDmitry Baryshkov }; 7654369c93cSDmitry Baryshkov 7664369c93cSDmitry Baryshkov /************************************************************* 7674369c93cSDmitry Baryshkov * MERGE_3D sub blocks config 7684369c93cSDmitry Baryshkov *************************************************************/ 7694369c93cSDmitry Baryshkov #define MERGE_3D_BLK(_name, _id, _base) \ 7704369c93cSDmitry Baryshkov {\ 7714369c93cSDmitry Baryshkov .name = _name, .id = _id, \ 7724369c93cSDmitry Baryshkov .base = _base, .len = 0x100, \ 7734369c93cSDmitry Baryshkov .features = MERGE_3D_SM8150_MASK, \ 7744369c93cSDmitry Baryshkov .sblk = NULL \ 7754369c93cSDmitry Baryshkov } 7764369c93cSDmitry Baryshkov 7774369c93cSDmitry Baryshkov static const struct dpu_merge_3d_cfg sm8150_merge_3d[] = { 7784369c93cSDmitry Baryshkov MERGE_3D_BLK("merge_3d_0", MERGE_3D_0, 0x83000), 7794369c93cSDmitry Baryshkov MERGE_3D_BLK("merge_3d_1", MERGE_3D_1, 0x83100), 7804369c93cSDmitry Baryshkov MERGE_3D_BLK("merge_3d_2", MERGE_3D_2, 0x83200), 781386fced3SJonathan Marek }; 782386fced3SJonathan Marek 783591e34a0SKrishna Manikandan static const struct dpu_pingpong_cfg sc7280_pp[] = { 784591e34a0SKrishna Manikandan PP_BLK("pingpong_0", PINGPONG_0, 0x59000, 0, sc7280_pp_sblk), 785591e34a0SKrishna Manikandan PP_BLK("pingpong_1", PINGPONG_1, 0x6a000, 0, sc7280_pp_sblk), 786591e34a0SKrishna Manikandan PP_BLK("pingpong_2", PINGPONG_2, 0x6b000, 0, sc7280_pp_sblk), 787591e34a0SKrishna Manikandan PP_BLK("pingpong_3", PINGPONG_3, 0x6c000, 0, sc7280_pp_sblk), 788591e34a0SKrishna Manikandan }; 78925fdd593SJeykumar Sankaran /************************************************************* 79025fdd593SJeykumar Sankaran * INTF sub blocks config 79125fdd593SJeykumar Sankaran *************************************************************/ 792731806daSAngeloGioacchino Del Regno #define INTF_BLK(_name, _id, _base, _type, _ctrl_id, _progfetch, _features) \ 79325fdd593SJeykumar Sankaran {\ 79425fdd593SJeykumar Sankaran .name = _name, .id = _id, \ 79525fdd593SJeykumar Sankaran .base = _base, .len = 0x280, \ 796cace3ac4SJonathan Marek .features = _features, \ 79725fdd593SJeykumar Sankaran .type = _type, \ 79825fdd593SJeykumar Sankaran .controller_id = _ctrl_id, \ 799731806daSAngeloGioacchino Del Regno .prog_fetch_lines_worst_case = _progfetch \ 80025fdd593SJeykumar Sankaran } 80125fdd593SJeykumar Sankaran 802abda0d92SStephen Boyd static const struct dpu_intf_cfg sdm845_intf[] = { 803731806daSAngeloGioacchino Del Regno INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SDM845_MASK), 804731806daSAngeloGioacchino Del Regno INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SDM845_MASK), 805731806daSAngeloGioacchino Del Regno INTF_BLK("intf_2", INTF_2, 0x6B000, INTF_DSI, 1, 24, INTF_SDM845_MASK), 806731806daSAngeloGioacchino Del Regno INTF_BLK("intf_3", INTF_3, 0x6B800, INTF_DP, 1, 24, INTF_SDM845_MASK), 80725fdd593SJeykumar Sankaran }; 80825fdd593SJeykumar Sankaran 8097bdc0c4bSKalyan Thota static const struct dpu_intf_cfg sc7180_intf[] = { 810731806daSAngeloGioacchino Del Regno INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC7180_MASK), 811731806daSAngeloGioacchino Del Regno INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SC7180_MASK), 8127bdc0c4bSKalyan Thota }; 8137bdc0c4bSKalyan Thota 814386fced3SJonathan Marek static const struct dpu_intf_cfg sm8150_intf[] = { 815731806daSAngeloGioacchino Del Regno INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC7180_MASK), 816731806daSAngeloGioacchino Del Regno INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SC7180_MASK), 817731806daSAngeloGioacchino Del Regno INTF_BLK("intf_2", INTF_2, 0x6B000, INTF_DSI, 1, 24, INTF_SC7180_MASK), 818731806daSAngeloGioacchino Del Regno INTF_BLK("intf_3", INTF_3, 0x6B800, INTF_DP, 1, 24, INTF_SC7180_MASK), 819386fced3SJonathan Marek }; 820386fced3SJonathan Marek 821591e34a0SKrishna Manikandan static const struct dpu_intf_cfg sc7280_intf[] = { 822591e34a0SKrishna Manikandan INTF_BLK("intf_0", INTF_0, 0x34000, INTF_DP, 0, 24, INTF_SC7280_MASK), 823591e34a0SKrishna Manikandan INTF_BLK("intf_1", INTF_1, 0x35000, INTF_DSI, 0, 24, INTF_SC7280_MASK), 824591e34a0SKrishna Manikandan INTF_BLK("intf_5", INTF_5, 0x39000, INTF_EDP, 0, 24, INTF_SC7280_MASK), 825591e34a0SKrishna Manikandan }; 826591e34a0SKrishna Manikandan 82725fdd593SJeykumar Sankaran /************************************************************* 82825fdd593SJeykumar Sankaran * VBIF sub blocks config 82925fdd593SJeykumar Sankaran *************************************************************/ 83025fdd593SJeykumar Sankaran /* VBIF QOS remap */ 831abda0d92SStephen Boyd static const u32 sdm845_rt_pri_lvl[] = {3, 3, 4, 4, 5, 5, 6, 6}; 832abda0d92SStephen Boyd static const u32 sdm845_nrt_pri_lvl[] = {3, 3, 3, 3, 3, 3, 3, 3}; 83325fdd593SJeykumar Sankaran 834abda0d92SStephen Boyd static const struct dpu_vbif_cfg sdm845_vbif[] = { 83525fdd593SJeykumar Sankaran { 83625fdd593SJeykumar Sankaran .name = "vbif_0", .id = VBIF_0, 83725fdd593SJeykumar Sankaran .base = 0, .len = 0x1040, 83825fdd593SJeykumar Sankaran .features = BIT(DPU_VBIF_QOS_REMAP), 83925fdd593SJeykumar Sankaran .xin_halt_timeout = 0x4000, 84025fdd593SJeykumar Sankaran .qos_rt_tbl = { 84125fdd593SJeykumar Sankaran .npriority_lvl = ARRAY_SIZE(sdm845_rt_pri_lvl), 84225fdd593SJeykumar Sankaran .priority_lvl = sdm845_rt_pri_lvl, 84325fdd593SJeykumar Sankaran }, 84425fdd593SJeykumar Sankaran .qos_nrt_tbl = { 84525fdd593SJeykumar Sankaran .npriority_lvl = ARRAY_SIZE(sdm845_nrt_pri_lvl), 84625fdd593SJeykumar Sankaran .priority_lvl = sdm845_nrt_pri_lvl, 84725fdd593SJeykumar Sankaran }, 84825fdd593SJeykumar Sankaran .memtype_count = 14, 84925fdd593SJeykumar Sankaran .memtype = {3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3}, 85025fdd593SJeykumar Sankaran }, 85125fdd593SJeykumar Sankaran }; 85225fdd593SJeykumar Sankaran 853abda0d92SStephen Boyd static const struct dpu_reg_dma_cfg sdm845_regdma = { 85425fdd593SJeykumar Sankaran .base = 0x0, .version = 0x1, .trigger_sel_off = 0x119c 85525fdd593SJeykumar Sankaran }; 85625fdd593SJeykumar Sankaran 857386fced3SJonathan Marek static const struct dpu_reg_dma_cfg sm8150_regdma = { 858386fced3SJonathan Marek .base = 0x0, .version = 0x00010001, .trigger_sel_off = 0x119c 859386fced3SJonathan Marek }; 860386fced3SJonathan Marek 861af776a3eSJonathan Marek static const struct dpu_reg_dma_cfg sm8250_regdma = { 862af776a3eSJonathan Marek .base = 0x0, 863af776a3eSJonathan Marek .version = 0x00010002, 864af776a3eSJonathan Marek .trigger_sel_off = 0x119c, 865af776a3eSJonathan Marek .xin_id = 7, 866af776a3eSJonathan Marek .clk_ctrl = DPU_CLK_CTRL_REG_DMA, 867af776a3eSJonathan Marek }; 868af776a3eSJonathan Marek 86925fdd593SJeykumar Sankaran /************************************************************* 87025fdd593SJeykumar Sankaran * PERF data config 87125fdd593SJeykumar Sankaran *************************************************************/ 87225fdd593SJeykumar Sankaran 87325fdd593SJeykumar Sankaran /* SSPP QOS LUTs */ 874abda0d92SStephen Boyd static const struct dpu_qos_lut_entry sdm845_qos_linear[] = { 87525fdd593SJeykumar Sankaran {.fl = 4, .lut = 0x357}, 87625fdd593SJeykumar Sankaran {.fl = 5, .lut = 0x3357}, 87725fdd593SJeykumar Sankaran {.fl = 6, .lut = 0x23357}, 87825fdd593SJeykumar Sankaran {.fl = 7, .lut = 0x223357}, 87925fdd593SJeykumar Sankaran {.fl = 8, .lut = 0x2223357}, 88025fdd593SJeykumar Sankaran {.fl = 9, .lut = 0x22223357}, 88125fdd593SJeykumar Sankaran {.fl = 10, .lut = 0x222223357}, 88225fdd593SJeykumar Sankaran {.fl = 11, .lut = 0x2222223357}, 88325fdd593SJeykumar Sankaran {.fl = 12, .lut = 0x22222223357}, 88425fdd593SJeykumar Sankaran {.fl = 13, .lut = 0x222222223357}, 88525fdd593SJeykumar Sankaran {.fl = 14, .lut = 0x1222222223357}, 88625fdd593SJeykumar Sankaran {.fl = 0, .lut = 0x11222222223357} 88725fdd593SJeykumar Sankaran }; 88825fdd593SJeykumar Sankaran 8897bdc0c4bSKalyan Thota static const struct dpu_qos_lut_entry sc7180_qos_linear[] = { 8907bdc0c4bSKalyan Thota {.fl = 0, .lut = 0x0011222222335777}, 8917bdc0c4bSKalyan Thota }; 8927bdc0c4bSKalyan Thota 893386fced3SJonathan Marek static const struct dpu_qos_lut_entry sm8150_qos_linear[] = { 894386fced3SJonathan Marek {.fl = 0, .lut = 0x0011222222223357 }, 895386fced3SJonathan Marek }; 896386fced3SJonathan Marek 897abda0d92SStephen Boyd static const struct dpu_qos_lut_entry sdm845_qos_macrotile[] = { 89825fdd593SJeykumar Sankaran {.fl = 10, .lut = 0x344556677}, 89925fdd593SJeykumar Sankaran {.fl = 11, .lut = 0x3344556677}, 90025fdd593SJeykumar Sankaran {.fl = 12, .lut = 0x23344556677}, 90125fdd593SJeykumar Sankaran {.fl = 13, .lut = 0x223344556677}, 90225fdd593SJeykumar Sankaran {.fl = 14, .lut = 0x1223344556677}, 90325fdd593SJeykumar Sankaran {.fl = 0, .lut = 0x112233344556677}, 90425fdd593SJeykumar Sankaran }; 90525fdd593SJeykumar Sankaran 9067bdc0c4bSKalyan Thota static const struct dpu_qos_lut_entry sc7180_qos_macrotile[] = { 9077bdc0c4bSKalyan Thota {.fl = 0, .lut = 0x0011223344556677}, 9087bdc0c4bSKalyan Thota }; 9097bdc0c4bSKalyan Thota 910abda0d92SStephen Boyd static const struct dpu_qos_lut_entry sdm845_qos_nrt[] = { 91125fdd593SJeykumar Sankaran {.fl = 0, .lut = 0x0}, 91225fdd593SJeykumar Sankaran }; 91325fdd593SJeykumar Sankaran 9147bdc0c4bSKalyan Thota static const struct dpu_qos_lut_entry sc7180_qos_nrt[] = { 9157bdc0c4bSKalyan Thota {.fl = 0, .lut = 0x0}, 9167bdc0c4bSKalyan Thota }; 9177bdc0c4bSKalyan Thota 918abda0d92SStephen Boyd static const struct dpu_perf_cfg sdm845_perf_data = { 91925fdd593SJeykumar Sankaran .max_bw_low = 6800000, 92025fdd593SJeykumar Sankaran .max_bw_high = 6800000, 92125fdd593SJeykumar Sankaran .min_core_ib = 2400000, 92225fdd593SJeykumar Sankaran .min_llcc_ib = 800000, 92325fdd593SJeykumar Sankaran .min_dram_ib = 800000, 92425fdd593SJeykumar Sankaran .core_ib_ff = "6.0", 92525fdd593SJeykumar Sankaran .core_clk_ff = "1.0", 92625fdd593SJeykumar Sankaran .comp_ratio_rt = 92725fdd593SJeykumar Sankaran "NV12/5/1/1.23 AB24/5/1/1.23 XB24/5/1/1.23", 92825fdd593SJeykumar Sankaran .comp_ratio_nrt = 92925fdd593SJeykumar Sankaran "NV12/5/1/1.25 AB24/5/1/1.25 XB24/5/1/1.25", 93025fdd593SJeykumar Sankaran .undersized_prefill_lines = 2, 93125fdd593SJeykumar Sankaran .xtra_prefill_lines = 2, 93225fdd593SJeykumar Sankaran .dest_scale_prefill_lines = 3, 93325fdd593SJeykumar Sankaran .macrotile_prefill_lines = 4, 93425fdd593SJeykumar Sankaran .yuv_nv12_prefill_lines = 8, 93525fdd593SJeykumar Sankaran .linear_prefill_lines = 1, 93625fdd593SJeykumar Sankaran .downscaling_prefill_lines = 1, 93725fdd593SJeykumar Sankaran .amortizable_threshold = 25, 93825fdd593SJeykumar Sankaran .min_prefill_lines = 24, 93925fdd593SJeykumar Sankaran .danger_lut_tbl = {0xf, 0xffff, 0x0}, 94025fdd593SJeykumar Sankaran .qos_lut_tbl = { 94125fdd593SJeykumar Sankaran {.nentry = ARRAY_SIZE(sdm845_qos_linear), 94225fdd593SJeykumar Sankaran .entries = sdm845_qos_linear 94325fdd593SJeykumar Sankaran }, 94425fdd593SJeykumar Sankaran {.nentry = ARRAY_SIZE(sdm845_qos_macrotile), 94525fdd593SJeykumar Sankaran .entries = sdm845_qos_macrotile 94625fdd593SJeykumar Sankaran }, 94725fdd593SJeykumar Sankaran {.nentry = ARRAY_SIZE(sdm845_qos_nrt), 94825fdd593SJeykumar Sankaran .entries = sdm845_qos_nrt 94925fdd593SJeykumar Sankaran }, 95025fdd593SJeykumar Sankaran }, 95125fdd593SJeykumar Sankaran .cdp_cfg = { 95225fdd593SJeykumar Sankaran {.rd_enable = 1, .wr_enable = 1}, 95325fdd593SJeykumar Sankaran {.rd_enable = 1, .wr_enable = 0} 95425fdd593SJeykumar Sankaran }, 9554f2c9838SDmitry Baryshkov .clk_inefficiency_factor = 105, 9564f2c9838SDmitry Baryshkov .bw_inefficiency_factor = 120, 95725fdd593SJeykumar Sankaran }; 95825fdd593SJeykumar Sankaran 9597bdc0c4bSKalyan Thota static const struct dpu_perf_cfg sc7180_perf_data = { 96071dc6c08SKrishna Manikandan .max_bw_low = 6800000, 96171dc6c08SKrishna Manikandan .max_bw_high = 6800000, 9627bdc0c4bSKalyan Thota .min_core_ib = 2400000, 9637bdc0c4bSKalyan Thota .min_llcc_ib = 800000, 964c33b7c03SKalyan Thota .min_dram_ib = 1600000, 965c33b7c03SKalyan Thota .min_prefill_lines = 24, 9667bdc0c4bSKalyan Thota .danger_lut_tbl = {0xff, 0xffff, 0x0}, 9677bdc0c4bSKalyan Thota .qos_lut_tbl = { 9687bdc0c4bSKalyan Thota {.nentry = ARRAY_SIZE(sc7180_qos_linear), 9697bdc0c4bSKalyan Thota .entries = sc7180_qos_linear 9707bdc0c4bSKalyan Thota }, 9717bdc0c4bSKalyan Thota {.nentry = ARRAY_SIZE(sc7180_qos_macrotile), 9727bdc0c4bSKalyan Thota .entries = sc7180_qos_macrotile 9737bdc0c4bSKalyan Thota }, 9747bdc0c4bSKalyan Thota {.nentry = ARRAY_SIZE(sc7180_qos_nrt), 9757bdc0c4bSKalyan Thota .entries = sc7180_qos_nrt 9767bdc0c4bSKalyan Thota }, 9777bdc0c4bSKalyan Thota }, 9787bdc0c4bSKalyan Thota .cdp_cfg = { 9797bdc0c4bSKalyan Thota {.rd_enable = 1, .wr_enable = 1}, 9807bdc0c4bSKalyan Thota {.rd_enable = 1, .wr_enable = 0} 9817bdc0c4bSKalyan Thota }, 982c33b7c03SKalyan Thota .clk_inefficiency_factor = 105, 983c33b7c03SKalyan Thota .bw_inefficiency_factor = 120, 9847bdc0c4bSKalyan Thota }; 9857bdc0c4bSKalyan Thota 986386fced3SJonathan Marek static const struct dpu_perf_cfg sm8150_perf_data = { 987386fced3SJonathan Marek .max_bw_low = 12800000, 988386fced3SJonathan Marek .max_bw_high = 12800000, 989386fced3SJonathan Marek .min_core_ib = 2400000, 990386fced3SJonathan Marek .min_llcc_ib = 800000, 991386fced3SJonathan Marek .min_dram_ib = 800000, 9924f2c9838SDmitry Baryshkov .min_prefill_lines = 24, 993386fced3SJonathan Marek .danger_lut_tbl = {0xf, 0xffff, 0x0}, 994386fced3SJonathan Marek .qos_lut_tbl = { 995386fced3SJonathan Marek {.nentry = ARRAY_SIZE(sm8150_qos_linear), 996386fced3SJonathan Marek .entries = sm8150_qos_linear 997386fced3SJonathan Marek }, 998386fced3SJonathan Marek {.nentry = ARRAY_SIZE(sc7180_qos_macrotile), 999386fced3SJonathan Marek .entries = sc7180_qos_macrotile 1000386fced3SJonathan Marek }, 1001386fced3SJonathan Marek {.nentry = ARRAY_SIZE(sc7180_qos_nrt), 1002386fced3SJonathan Marek .entries = sc7180_qos_nrt 1003386fced3SJonathan Marek }, 1004386fced3SJonathan Marek /* TODO: macrotile-qseed is different from macrotile */ 1005386fced3SJonathan Marek }, 1006386fced3SJonathan Marek .cdp_cfg = { 1007386fced3SJonathan Marek {.rd_enable = 1, .wr_enable = 1}, 1008386fced3SJonathan Marek {.rd_enable = 1, .wr_enable = 0} 1009386fced3SJonathan Marek }, 10104f2c9838SDmitry Baryshkov .clk_inefficiency_factor = 105, 10114f2c9838SDmitry Baryshkov .bw_inefficiency_factor = 120, 1012386fced3SJonathan Marek }; 1013386fced3SJonathan Marek 1014af776a3eSJonathan Marek static const struct dpu_perf_cfg sm8250_perf_data = { 1015af776a3eSJonathan Marek .max_bw_low = 13700000, 1016af776a3eSJonathan Marek .max_bw_high = 16600000, 1017af776a3eSJonathan Marek .min_core_ib = 4800000, 1018af776a3eSJonathan Marek .min_llcc_ib = 0, 1019af776a3eSJonathan Marek .min_dram_ib = 800000, 10204f2c9838SDmitry Baryshkov .min_prefill_lines = 35, 1021af776a3eSJonathan Marek .danger_lut_tbl = {0xf, 0xffff, 0x0}, 1022af776a3eSJonathan Marek .qos_lut_tbl = { 1023af776a3eSJonathan Marek {.nentry = ARRAY_SIZE(sc7180_qos_linear), 1024af776a3eSJonathan Marek .entries = sc7180_qos_linear 1025af776a3eSJonathan Marek }, 1026af776a3eSJonathan Marek {.nentry = ARRAY_SIZE(sc7180_qos_macrotile), 1027af776a3eSJonathan Marek .entries = sc7180_qos_macrotile 1028af776a3eSJonathan Marek }, 1029af776a3eSJonathan Marek {.nentry = ARRAY_SIZE(sc7180_qos_nrt), 1030af776a3eSJonathan Marek .entries = sc7180_qos_nrt 1031af776a3eSJonathan Marek }, 1032af776a3eSJonathan Marek /* TODO: macrotile-qseed is different from macrotile */ 1033af776a3eSJonathan Marek }, 1034af776a3eSJonathan Marek .cdp_cfg = { 1035af776a3eSJonathan Marek {.rd_enable = 1, .wr_enable = 1}, 1036af776a3eSJonathan Marek {.rd_enable = 1, .wr_enable = 0} 1037af776a3eSJonathan Marek }, 10384f2c9838SDmitry Baryshkov .clk_inefficiency_factor = 105, 10394f2c9838SDmitry Baryshkov .bw_inefficiency_factor = 120, 1040af776a3eSJonathan Marek }; 1041af776a3eSJonathan Marek 1042591e34a0SKrishna Manikandan static const struct dpu_perf_cfg sc7280_perf_data = { 1043591e34a0SKrishna Manikandan .max_bw_low = 4700000, 1044591e34a0SKrishna Manikandan .max_bw_high = 8800000, 1045591e34a0SKrishna Manikandan .min_core_ib = 2500000, 1046591e34a0SKrishna Manikandan .min_llcc_ib = 0, 1047591e34a0SKrishna Manikandan .min_dram_ib = 1600000, 1048591e34a0SKrishna Manikandan .min_prefill_lines = 24, 1049591e34a0SKrishna Manikandan .danger_lut_tbl = {0xffff, 0xffff, 0x0}, 1050591e34a0SKrishna Manikandan .qos_lut_tbl = { 1051591e34a0SKrishna Manikandan {.nentry = ARRAY_SIZE(sc7180_qos_macrotile), 1052591e34a0SKrishna Manikandan .entries = sc7180_qos_macrotile 1053591e34a0SKrishna Manikandan }, 1054591e34a0SKrishna Manikandan {.nentry = ARRAY_SIZE(sc7180_qos_macrotile), 1055591e34a0SKrishna Manikandan .entries = sc7180_qos_macrotile 1056591e34a0SKrishna Manikandan }, 1057591e34a0SKrishna Manikandan {.nentry = ARRAY_SIZE(sc7180_qos_nrt), 1058591e34a0SKrishna Manikandan .entries = sc7180_qos_nrt 1059591e34a0SKrishna Manikandan }, 1060591e34a0SKrishna Manikandan }, 1061591e34a0SKrishna Manikandan .cdp_cfg = { 1062591e34a0SKrishna Manikandan {.rd_enable = 1, .wr_enable = 1}, 1063591e34a0SKrishna Manikandan {.rd_enable = 1, .wr_enable = 0} 1064591e34a0SKrishna Manikandan }, 1065591e34a0SKrishna Manikandan .clk_inefficiency_factor = 105, 1066591e34a0SKrishna Manikandan .bw_inefficiency_factor = 120, 1067591e34a0SKrishna Manikandan }; 1068591e34a0SKrishna Manikandan 106925fdd593SJeykumar Sankaran /************************************************************* 107025fdd593SJeykumar Sankaran * Hardware catalog init 107125fdd593SJeykumar Sankaran *************************************************************/ 107225fdd593SJeykumar Sankaran 107325fdd593SJeykumar Sankaran /* 107425fdd593SJeykumar Sankaran * sdm845_cfg_init(): populate sdm845 dpu sub-blocks reg offsets 107525fdd593SJeykumar Sankaran * and instance counts. 107625fdd593SJeykumar Sankaran */ 1077fba33caeSJordan Crouse static void sdm845_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 107825fdd593SJeykumar Sankaran { 107925fdd593SJeykumar Sankaran *dpu_cfg = (struct dpu_mdss_cfg){ 108025fdd593SJeykumar Sankaran .caps = &sdm845_dpu_caps, 108125fdd593SJeykumar Sankaran .mdp_count = ARRAY_SIZE(sdm845_mdp), 108225fdd593SJeykumar Sankaran .mdp = sdm845_mdp, 108325fdd593SJeykumar Sankaran .ctl_count = ARRAY_SIZE(sdm845_ctl), 108425fdd593SJeykumar Sankaran .ctl = sdm845_ctl, 108525fdd593SJeykumar Sankaran .sspp_count = ARRAY_SIZE(sdm845_sspp), 108625fdd593SJeykumar Sankaran .sspp = sdm845_sspp, 108725fdd593SJeykumar Sankaran .mixer_count = ARRAY_SIZE(sdm845_lm), 108825fdd593SJeykumar Sankaran .mixer = sdm845_lm, 108925fdd593SJeykumar Sankaran .pingpong_count = ARRAY_SIZE(sdm845_pp), 109025fdd593SJeykumar Sankaran .pingpong = sdm845_pp, 109125fdd593SJeykumar Sankaran .intf_count = ARRAY_SIZE(sdm845_intf), 109225fdd593SJeykumar Sankaran .intf = sdm845_intf, 109325fdd593SJeykumar Sankaran .vbif_count = ARRAY_SIZE(sdm845_vbif), 109425fdd593SJeykumar Sankaran .vbif = sdm845_vbif, 109525fdd593SJeykumar Sankaran .reg_dma_count = 1, 109625fdd593SJeykumar Sankaran .dma_cfg = sdm845_regdma, 109725fdd593SJeykumar Sankaran .perf = sdm845_perf_data, 1098*597762d5SDmitry Baryshkov .mdss_irqs = IRQ_SDM845_MASK, 109925fdd593SJeykumar Sankaran }; 110025fdd593SJeykumar Sankaran } 110125fdd593SJeykumar Sankaran 11027bdc0c4bSKalyan Thota /* 11037bdc0c4bSKalyan Thota * sc7180_cfg_init(): populate sc7180 dpu sub-blocks reg offsets 11047bdc0c4bSKalyan Thota * and instance counts. 11057bdc0c4bSKalyan Thota */ 11067bdc0c4bSKalyan Thota static void sc7180_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 11077bdc0c4bSKalyan Thota { 11087bdc0c4bSKalyan Thota *dpu_cfg = (struct dpu_mdss_cfg){ 11097bdc0c4bSKalyan Thota .caps = &sc7180_dpu_caps, 11107bdc0c4bSKalyan Thota .mdp_count = ARRAY_SIZE(sc7180_mdp), 11117bdc0c4bSKalyan Thota .mdp = sc7180_mdp, 11127bdc0c4bSKalyan Thota .ctl_count = ARRAY_SIZE(sc7180_ctl), 11137bdc0c4bSKalyan Thota .ctl = sc7180_ctl, 11147bdc0c4bSKalyan Thota .sspp_count = ARRAY_SIZE(sc7180_sspp), 11157bdc0c4bSKalyan Thota .sspp = sc7180_sspp, 11167bdc0c4bSKalyan Thota .mixer_count = ARRAY_SIZE(sc7180_lm), 11177bdc0c4bSKalyan Thota .mixer = sc7180_lm, 1118e47616dfSKalyan Thota .dspp_count = ARRAY_SIZE(sc7180_dspp), 1119e47616dfSKalyan Thota .dspp = sc7180_dspp, 11207bdc0c4bSKalyan Thota .pingpong_count = ARRAY_SIZE(sc7180_pp), 11217bdc0c4bSKalyan Thota .pingpong = sc7180_pp, 11227bdc0c4bSKalyan Thota .intf_count = ARRAY_SIZE(sc7180_intf), 11237bdc0c4bSKalyan Thota .intf = sc7180_intf, 11247bdc0c4bSKalyan Thota .vbif_count = ARRAY_SIZE(sdm845_vbif), 11257bdc0c4bSKalyan Thota .vbif = sdm845_vbif, 11267bdc0c4bSKalyan Thota .reg_dma_count = 1, 11277bdc0c4bSKalyan Thota .dma_cfg = sdm845_regdma, 11287bdc0c4bSKalyan Thota .perf = sc7180_perf_data, 1129*597762d5SDmitry Baryshkov .mdss_irqs = IRQ_SC7180_MASK, 1130dc8a4973SKrishna Manikandan .obsolete_irq = INTR_SC7180_MASK, 11317bdc0c4bSKalyan Thota }; 11327bdc0c4bSKalyan Thota } 11337bdc0c4bSKalyan Thota 1134386fced3SJonathan Marek /* 1135386fced3SJonathan Marek * sm8150_cfg_init(): populate sm8150 dpu sub-blocks reg offsets 1136386fced3SJonathan Marek * and instance counts. 1137386fced3SJonathan Marek */ 1138386fced3SJonathan Marek static void sm8150_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 1139386fced3SJonathan Marek { 1140386fced3SJonathan Marek *dpu_cfg = (struct dpu_mdss_cfg){ 1141386fced3SJonathan Marek .caps = &sm8150_dpu_caps, 1142386fced3SJonathan Marek .mdp_count = ARRAY_SIZE(sdm845_mdp), 1143386fced3SJonathan Marek .mdp = sdm845_mdp, 1144386fced3SJonathan Marek .ctl_count = ARRAY_SIZE(sm8150_ctl), 1145386fced3SJonathan Marek .ctl = sm8150_ctl, 1146386fced3SJonathan Marek .sspp_count = ARRAY_SIZE(sdm845_sspp), 1147386fced3SJonathan Marek .sspp = sdm845_sspp, 1148386fced3SJonathan Marek .mixer_count = ARRAY_SIZE(sm8150_lm), 1149386fced3SJonathan Marek .mixer = sm8150_lm, 115005ae91d9SDmitry Baryshkov .dspp_count = ARRAY_SIZE(sm8150_dspp), 115105ae91d9SDmitry Baryshkov .dspp = sm8150_dspp, 1152386fced3SJonathan Marek .pingpong_count = ARRAY_SIZE(sm8150_pp), 1153386fced3SJonathan Marek .pingpong = sm8150_pp, 11544369c93cSDmitry Baryshkov .merge_3d_count = ARRAY_SIZE(sm8150_merge_3d), 11554369c93cSDmitry Baryshkov .merge_3d = sm8150_merge_3d, 1156386fced3SJonathan Marek .intf_count = ARRAY_SIZE(sm8150_intf), 1157386fced3SJonathan Marek .intf = sm8150_intf, 1158386fced3SJonathan Marek .vbif_count = ARRAY_SIZE(sdm845_vbif), 1159386fced3SJonathan Marek .vbif = sdm845_vbif, 1160386fced3SJonathan Marek .reg_dma_count = 1, 1161386fced3SJonathan Marek .dma_cfg = sm8150_regdma, 1162386fced3SJonathan Marek .perf = sm8150_perf_data, 1163*597762d5SDmitry Baryshkov .mdss_irqs = IRQ_SDM845_MASK, 1164386fced3SJonathan Marek }; 1165386fced3SJonathan Marek } 1166386fced3SJonathan Marek 1167af776a3eSJonathan Marek /* 1168af776a3eSJonathan Marek * sm8250_cfg_init(): populate sm8250 dpu sub-blocks reg offsets 1169af776a3eSJonathan Marek * and instance counts. 1170af776a3eSJonathan Marek */ 1171af776a3eSJonathan Marek static void sm8250_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 1172af776a3eSJonathan Marek { 1173af776a3eSJonathan Marek *dpu_cfg = (struct dpu_mdss_cfg){ 1174af776a3eSJonathan Marek .caps = &sm8250_dpu_caps, 1175af776a3eSJonathan Marek .mdp_count = ARRAY_SIZE(sm8250_mdp), 1176af776a3eSJonathan Marek .mdp = sm8250_mdp, 1177af776a3eSJonathan Marek .ctl_count = ARRAY_SIZE(sm8150_ctl), 1178af776a3eSJonathan Marek .ctl = sm8150_ctl, 1179d21fc5dfSDmitry Baryshkov .sspp_count = ARRAY_SIZE(sm8250_sspp), 1180d21fc5dfSDmitry Baryshkov .sspp = sm8250_sspp, 1181af776a3eSJonathan Marek .mixer_count = ARRAY_SIZE(sm8150_lm), 1182af776a3eSJonathan Marek .mixer = sm8150_lm, 118305ae91d9SDmitry Baryshkov .dspp_count = ARRAY_SIZE(sm8150_dspp), 118405ae91d9SDmitry Baryshkov .dspp = sm8150_dspp, 1185af776a3eSJonathan Marek .pingpong_count = ARRAY_SIZE(sm8150_pp), 1186af776a3eSJonathan Marek .pingpong = sm8150_pp, 11874369c93cSDmitry Baryshkov .merge_3d_count = ARRAY_SIZE(sm8150_merge_3d), 11884369c93cSDmitry Baryshkov .merge_3d = sm8150_merge_3d, 1189af776a3eSJonathan Marek .intf_count = ARRAY_SIZE(sm8150_intf), 1190af776a3eSJonathan Marek .intf = sm8150_intf, 1191af776a3eSJonathan Marek .vbif_count = ARRAY_SIZE(sdm845_vbif), 1192af776a3eSJonathan Marek .vbif = sdm845_vbif, 1193af776a3eSJonathan Marek .reg_dma_count = 1, 1194af776a3eSJonathan Marek .dma_cfg = sm8250_regdma, 1195af776a3eSJonathan Marek .perf = sm8250_perf_data, 1196*597762d5SDmitry Baryshkov .mdss_irqs = IRQ_SM8250_MASK, 1197af776a3eSJonathan Marek }; 1198af776a3eSJonathan Marek } 1199af776a3eSJonathan Marek 1200591e34a0SKrishna Manikandan static void sc7280_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 1201591e34a0SKrishna Manikandan { 1202591e34a0SKrishna Manikandan *dpu_cfg = (struct dpu_mdss_cfg){ 1203591e34a0SKrishna Manikandan .caps = &sc7280_dpu_caps, 1204591e34a0SKrishna Manikandan .mdp_count = ARRAY_SIZE(sc7280_mdp), 1205591e34a0SKrishna Manikandan .mdp = sc7280_mdp, 1206591e34a0SKrishna Manikandan .ctl_count = ARRAY_SIZE(sc7280_ctl), 1207591e34a0SKrishna Manikandan .ctl = sc7280_ctl, 1208591e34a0SKrishna Manikandan .sspp_count = ARRAY_SIZE(sc7280_sspp), 1209591e34a0SKrishna Manikandan .sspp = sc7280_sspp, 1210591e34a0SKrishna Manikandan .mixer_count = ARRAY_SIZE(sc7280_lm), 1211591e34a0SKrishna Manikandan .mixer = sc7280_lm, 1212591e34a0SKrishna Manikandan .pingpong_count = ARRAY_SIZE(sc7280_pp), 1213591e34a0SKrishna Manikandan .pingpong = sc7280_pp, 1214591e34a0SKrishna Manikandan .intf_count = ARRAY_SIZE(sc7280_intf), 1215591e34a0SKrishna Manikandan .intf = sc7280_intf, 1216591e34a0SKrishna Manikandan .vbif_count = ARRAY_SIZE(sdm845_vbif), 1217591e34a0SKrishna Manikandan .vbif = sdm845_vbif, 1218591e34a0SKrishna Manikandan .perf = sc7280_perf_data, 1219*597762d5SDmitry Baryshkov .mdss_irqs = IRQ_SC7280_MASK, 1220dc8a4973SKrishna Manikandan .obsolete_irq = INTR_SC7180_MASK, 1221591e34a0SKrishna Manikandan }; 1222591e34a0SKrishna Manikandan } 1223591e34a0SKrishna Manikandan 1224abda0d92SStephen Boyd static const struct dpu_mdss_hw_cfg_handler cfg_handler[] = { 122525fdd593SJeykumar Sankaran { .hw_rev = DPU_HW_VER_400, .cfg_init = sdm845_cfg_init}, 122625fdd593SJeykumar Sankaran { .hw_rev = DPU_HW_VER_401, .cfg_init = sdm845_cfg_init}, 1227386fced3SJonathan Marek { .hw_rev = DPU_HW_VER_500, .cfg_init = sm8150_cfg_init}, 1228386fced3SJonathan Marek { .hw_rev = DPU_HW_VER_501, .cfg_init = sm8150_cfg_init}, 1229af776a3eSJonathan Marek { .hw_rev = DPU_HW_VER_600, .cfg_init = sm8250_cfg_init}, 12307bdc0c4bSKalyan Thota { .hw_rev = DPU_HW_VER_620, .cfg_init = sc7180_cfg_init}, 1231591e34a0SKrishna Manikandan { .hw_rev = DPU_HW_VER_720, .cfg_init = sc7280_cfg_init}, 123225fdd593SJeykumar Sankaran }; 123325fdd593SJeykumar Sankaran 123425fdd593SJeykumar Sankaran void dpu_hw_catalog_deinit(struct dpu_mdss_cfg *dpu_cfg) 123525fdd593SJeykumar Sankaran { 123625fdd593SJeykumar Sankaran kfree(dpu_cfg); 123725fdd593SJeykumar Sankaran } 123825fdd593SJeykumar Sankaran 123925fdd593SJeykumar Sankaran struct dpu_mdss_cfg *dpu_hw_catalog_init(u32 hw_rev) 124025fdd593SJeykumar Sankaran { 124125fdd593SJeykumar Sankaran int i; 124225fdd593SJeykumar Sankaran struct dpu_mdss_cfg *dpu_cfg; 124325fdd593SJeykumar Sankaran 124425fdd593SJeykumar Sankaran dpu_cfg = kzalloc(sizeof(*dpu_cfg), GFP_KERNEL); 124525fdd593SJeykumar Sankaran if (!dpu_cfg) 124625fdd593SJeykumar Sankaran return ERR_PTR(-ENOMEM); 124725fdd593SJeykumar Sankaran 124825fdd593SJeykumar Sankaran for (i = 0; i < ARRAY_SIZE(cfg_handler); i++) { 124925fdd593SJeykumar Sankaran if (cfg_handler[i].hw_rev == hw_rev) { 125025fdd593SJeykumar Sankaran cfg_handler[i].cfg_init(dpu_cfg); 125125fdd593SJeykumar Sankaran dpu_cfg->hwversion = hw_rev; 125225fdd593SJeykumar Sankaran return dpu_cfg; 125325fdd593SJeykumar Sankaran } 125425fdd593SJeykumar Sankaran } 125525fdd593SJeykumar Sankaran 125625fdd593SJeykumar Sankaran DPU_ERROR("unsupported chipset id:%X\n", hw_rev); 125725fdd593SJeykumar Sankaran dpu_hw_catalog_deinit(dpu_cfg); 125825fdd593SJeykumar Sankaran return ERR_PTR(-ENODEV); 125925fdd593SJeykumar Sankaran } 126025fdd593SJeykumar Sankaran 1261