197fb5e8dSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 225fdd593SJeykumar Sankaran /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 325fdd593SJeykumar Sankaran */ 425fdd593SJeykumar Sankaran 525fdd593SJeykumar Sankaran #define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__ 625fdd593SJeykumar Sankaran #include <linux/slab.h> 725fdd593SJeykumar Sankaran #include <linux/of_address.h> 825fdd593SJeykumar Sankaran #include <linux/platform_device.h> 925fdd593SJeykumar Sankaran #include "dpu_hw_mdss.h" 1025fdd593SJeykumar Sankaran #include "dpu_hw_catalog.h" 1125fdd593SJeykumar Sankaran #include "dpu_kms.h" 1225fdd593SJeykumar Sankaran 137bdc0c4bSKalyan Thota #define VIG_MASK \ 147bdc0c4bSKalyan Thota (BIT(DPU_SSPP_SRC) | BIT(DPU_SSPP_QOS) |\ 15b8dab65bSAngeloGioacchino Del Regno BIT(DPU_SSPP_CSC_10BIT) | BIT(DPU_SSPP_CDP) |\ 1625fdd593SJeykumar Sankaran BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_EXCL_RECT)) 1725fdd593SJeykumar Sankaran 187bdc0c4bSKalyan Thota #define VIG_SDM845_MASK \ 19b8dab65bSAngeloGioacchino Del Regno (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3)) 207bdc0c4bSKalyan Thota 217bdc0c4bSKalyan Thota #define VIG_SC7180_MASK \ 22b8dab65bSAngeloGioacchino Del Regno (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED4)) 237bdc0c4bSKalyan Thota 24d21fc5dfSDmitry Baryshkov #define VIG_SM8250_MASK \ 25095eed89SDmitry Baryshkov (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3LITE)) 26d21fc5dfSDmitry Baryshkov 2725fdd593SJeykumar Sankaran #define DMA_SDM845_MASK \ 2825fdd593SJeykumar Sankaran (BIT(DPU_SSPP_SRC) | BIT(DPU_SSPP_QOS) | BIT(DPU_SSPP_QOS_8LVL) |\ 2925fdd593SJeykumar Sankaran BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_TS_PREFILL_REC1) |\ 3025fdd593SJeykumar Sankaran BIT(DPU_SSPP_CDP) | BIT(DPU_SSPP_EXCL_RECT)) 3125fdd593SJeykumar Sankaran 3207ca1fc0SSravanthi Kollukuduru #define DMA_CURSOR_SDM845_MASK \ 3307ca1fc0SSravanthi Kollukuduru (DMA_SDM845_MASK | BIT(DPU_SSPP_CURSOR)) 3407ca1fc0SSravanthi Kollukuduru 3525fdd593SJeykumar Sankaran #define MIXER_SDM845_MASK \ 3625fdd593SJeykumar Sankaran (BIT(DPU_MIXER_SOURCESPLIT) | BIT(DPU_DIM_LAYER)) 3725fdd593SJeykumar Sankaran 387bdc0c4bSKalyan Thota #define MIXER_SC7180_MASK \ 397bdc0c4bSKalyan Thota (BIT(DPU_DIM_LAYER)) 407bdc0c4bSKalyan Thota 4125fdd593SJeykumar Sankaran #define PINGPONG_SDM845_MASK BIT(DPU_PINGPONG_DITHER) 4225fdd593SJeykumar Sankaran 4325fdd593SJeykumar Sankaran #define PINGPONG_SDM845_SPLIT_MASK \ 4425fdd593SJeykumar Sankaran (PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2)) 4525fdd593SJeykumar Sankaran 464369c93cSDmitry Baryshkov #define MERGE_3D_SM8150_MASK (0) 474369c93cSDmitry Baryshkov 484259ff7aSKalyan Thota #define DSPP_SC7180_MASK BIT(DPU_DSPP_PCC) 49e47616dfSKalyan Thota 50cace3ac4SJonathan Marek #define INTF_SDM845_MASK (0) 51cace3ac4SJonathan Marek 52cace3ac4SJonathan Marek #define INTF_SC7180_MASK BIT(DPU_INTF_INPUT_CTRL) | BIT(DPU_INTF_TE) 53cace3ac4SJonathan Marek 5425fdd593SJeykumar Sankaran #define DEFAULT_PIXEL_RAM_SIZE (50 * 1024) 5525fdd593SJeykumar Sankaran #define DEFAULT_DPU_LINE_WIDTH 2048 5625fdd593SJeykumar Sankaran #define DEFAULT_DPU_OUTPUT_LINE_WIDTH 2560 5725fdd593SJeykumar Sankaran 5825fdd593SJeykumar Sankaran #define MAX_HORZ_DECIMATION 4 5925fdd593SJeykumar Sankaran #define MAX_VERT_DECIMATION 4 6025fdd593SJeykumar Sankaran 6125fdd593SJeykumar Sankaran #define MAX_UPSCALE_RATIO 20 6225fdd593SJeykumar Sankaran #define MAX_DOWNSCALE_RATIO 4 6325fdd593SJeykumar Sankaran #define SSPP_UNITY_SCALE 1 6425fdd593SJeykumar Sankaran 6525fdd593SJeykumar Sankaran #define STRCAT(X, Y) (X Y) 6625fdd593SJeykumar Sankaran 6709c7e370SLee Jones static const uint32_t plane_formats[] = { 6809c7e370SLee Jones DRM_FORMAT_ARGB8888, 6909c7e370SLee Jones DRM_FORMAT_ABGR8888, 7009c7e370SLee Jones DRM_FORMAT_RGBA8888, 7109c7e370SLee Jones DRM_FORMAT_BGRA8888, 7209c7e370SLee Jones DRM_FORMAT_XRGB8888, 7309c7e370SLee Jones DRM_FORMAT_RGBX8888, 7409c7e370SLee Jones DRM_FORMAT_BGRX8888, 7509c7e370SLee Jones DRM_FORMAT_XBGR8888, 7609c7e370SLee Jones DRM_FORMAT_RGB888, 7709c7e370SLee Jones DRM_FORMAT_BGR888, 7809c7e370SLee Jones DRM_FORMAT_RGB565, 7909c7e370SLee Jones DRM_FORMAT_BGR565, 8009c7e370SLee Jones DRM_FORMAT_ARGB1555, 8109c7e370SLee Jones DRM_FORMAT_ABGR1555, 8209c7e370SLee Jones DRM_FORMAT_RGBA5551, 8309c7e370SLee Jones DRM_FORMAT_BGRA5551, 8409c7e370SLee Jones DRM_FORMAT_XRGB1555, 8509c7e370SLee Jones DRM_FORMAT_XBGR1555, 8609c7e370SLee Jones DRM_FORMAT_RGBX5551, 8709c7e370SLee Jones DRM_FORMAT_BGRX5551, 8809c7e370SLee Jones DRM_FORMAT_ARGB4444, 8909c7e370SLee Jones DRM_FORMAT_ABGR4444, 9009c7e370SLee Jones DRM_FORMAT_RGBA4444, 9109c7e370SLee Jones DRM_FORMAT_BGRA4444, 9209c7e370SLee Jones DRM_FORMAT_XRGB4444, 9309c7e370SLee Jones DRM_FORMAT_XBGR4444, 9409c7e370SLee Jones DRM_FORMAT_RGBX4444, 9509c7e370SLee Jones DRM_FORMAT_BGRX4444, 9609c7e370SLee Jones }; 9709c7e370SLee Jones 9809c7e370SLee Jones static const uint32_t plane_formats_yuv[] = { 9909c7e370SLee Jones DRM_FORMAT_ARGB8888, 10009c7e370SLee Jones DRM_FORMAT_ABGR8888, 10109c7e370SLee Jones DRM_FORMAT_RGBA8888, 10209c7e370SLee Jones DRM_FORMAT_BGRX8888, 10309c7e370SLee Jones DRM_FORMAT_BGRA8888, 10409c7e370SLee Jones DRM_FORMAT_XRGB8888, 10509c7e370SLee Jones DRM_FORMAT_XBGR8888, 10609c7e370SLee Jones DRM_FORMAT_RGBX8888, 10709c7e370SLee Jones DRM_FORMAT_RGB888, 10809c7e370SLee Jones DRM_FORMAT_BGR888, 10909c7e370SLee Jones DRM_FORMAT_RGB565, 11009c7e370SLee Jones DRM_FORMAT_BGR565, 11109c7e370SLee Jones DRM_FORMAT_ARGB1555, 11209c7e370SLee Jones DRM_FORMAT_ABGR1555, 11309c7e370SLee Jones DRM_FORMAT_RGBA5551, 11409c7e370SLee Jones DRM_FORMAT_BGRA5551, 11509c7e370SLee Jones DRM_FORMAT_XRGB1555, 11609c7e370SLee Jones DRM_FORMAT_XBGR1555, 11709c7e370SLee Jones DRM_FORMAT_RGBX5551, 11809c7e370SLee Jones DRM_FORMAT_BGRX5551, 11909c7e370SLee Jones DRM_FORMAT_ARGB4444, 12009c7e370SLee Jones DRM_FORMAT_ABGR4444, 12109c7e370SLee Jones DRM_FORMAT_RGBA4444, 12209c7e370SLee Jones DRM_FORMAT_BGRA4444, 12309c7e370SLee Jones DRM_FORMAT_XRGB4444, 12409c7e370SLee Jones DRM_FORMAT_XBGR4444, 12509c7e370SLee Jones DRM_FORMAT_RGBX4444, 12609c7e370SLee Jones DRM_FORMAT_BGRX4444, 12709c7e370SLee Jones 12809c7e370SLee Jones DRM_FORMAT_NV12, 12909c7e370SLee Jones DRM_FORMAT_NV21, 13009c7e370SLee Jones DRM_FORMAT_NV16, 13109c7e370SLee Jones DRM_FORMAT_NV61, 13209c7e370SLee Jones DRM_FORMAT_VYUY, 13309c7e370SLee Jones DRM_FORMAT_UYVY, 13409c7e370SLee Jones DRM_FORMAT_YUYV, 13509c7e370SLee Jones DRM_FORMAT_YVYU, 13609c7e370SLee Jones DRM_FORMAT_YUV420, 13709c7e370SLee Jones DRM_FORMAT_YVU420, 13809c7e370SLee Jones }; 13909c7e370SLee Jones 14025fdd593SJeykumar Sankaran /************************************************************* 14125fdd593SJeykumar Sankaran * DPU sub blocks config 14225fdd593SJeykumar Sankaran *************************************************************/ 14325fdd593SJeykumar Sankaran /* DPU top level caps */ 14425fdd593SJeykumar Sankaran static const struct dpu_caps sdm845_dpu_caps = { 14525fdd593SJeykumar Sankaran .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 14625fdd593SJeykumar Sankaran .max_mixer_blendstages = 0xb, 14725fdd593SJeykumar Sankaran .qseed_type = DPU_SSPP_SCALER_QSEED3, 14825fdd593SJeykumar Sankaran .smart_dma_rev = DPU_SSPP_SMART_DMA_V2, 14925fdd593SJeykumar Sankaran .ubwc_version = DPU_HW_UBWC_VER_20, 15025fdd593SJeykumar Sankaran .has_src_split = true, 15125fdd593SJeykumar Sankaran .has_dim_layer = true, 15225fdd593SJeykumar Sankaran .has_idle_pc = true, 15342a558b7SKalyan Thota .has_3d_merge = true, 1547e9d4cddSJonathan Marek .max_linewidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 1557e9d4cddSJonathan Marek .pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE, 1567e9d4cddSJonathan Marek .max_hdeci_exp = MAX_HORZ_DECIMATION, 1577e9d4cddSJonathan Marek .max_vdeci_exp = MAX_VERT_DECIMATION, 15825fdd593SJeykumar Sankaran }; 15925fdd593SJeykumar Sankaran 1607bdc0c4bSKalyan Thota static const struct dpu_caps sc7180_dpu_caps = { 1617bdc0c4bSKalyan Thota .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 1627bdc0c4bSKalyan Thota .max_mixer_blendstages = 0x9, 1637bdc0c4bSKalyan Thota .qseed_type = DPU_SSPP_SCALER_QSEED4, 1647bdc0c4bSKalyan Thota .smart_dma_rev = DPU_SSPP_SMART_DMA_V2, 1657bdc0c4bSKalyan Thota .ubwc_version = DPU_HW_UBWC_VER_20, 1667bdc0c4bSKalyan Thota .has_dim_layer = true, 1677bdc0c4bSKalyan Thota .has_idle_pc = true, 1687e9d4cddSJonathan Marek .max_linewidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 1697e9d4cddSJonathan Marek .pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE, 1707bdc0c4bSKalyan Thota }; 1717bdc0c4bSKalyan Thota 172386fced3SJonathan Marek static const struct dpu_caps sm8150_dpu_caps = { 173386fced3SJonathan Marek .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 174386fced3SJonathan Marek .max_mixer_blendstages = 0xb, 175386fced3SJonathan Marek .qseed_type = DPU_SSPP_SCALER_QSEED3, 176386fced3SJonathan Marek .smart_dma_rev = DPU_SSPP_SMART_DMA_V2, /* TODO: v2.5 */ 177386fced3SJonathan Marek .ubwc_version = DPU_HW_UBWC_VER_30, 178386fced3SJonathan Marek .has_src_split = true, 179386fced3SJonathan Marek .has_dim_layer = true, 180386fced3SJonathan Marek .has_idle_pc = true, 181386fced3SJonathan Marek .has_3d_merge = true, 182386fced3SJonathan Marek .max_linewidth = 4096, 183386fced3SJonathan Marek .pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE, 184386fced3SJonathan Marek .max_hdeci_exp = MAX_HORZ_DECIMATION, 185386fced3SJonathan Marek .max_vdeci_exp = MAX_VERT_DECIMATION, 186386fced3SJonathan Marek }; 187386fced3SJonathan Marek 188af776a3eSJonathan Marek static const struct dpu_caps sm8250_dpu_caps = { 189af776a3eSJonathan Marek .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 190af776a3eSJonathan Marek .max_mixer_blendstages = 0xb, 191d21fc5dfSDmitry Baryshkov .qseed_type = DPU_SSPP_SCALER_QSEED3LITE, 192af776a3eSJonathan Marek .smart_dma_rev = DPU_SSPP_SMART_DMA_V2, /* TODO: v2.5 */ 193af776a3eSJonathan Marek .ubwc_version = DPU_HW_UBWC_VER_40, 194af776a3eSJonathan Marek .has_src_split = true, 195af776a3eSJonathan Marek .has_dim_layer = true, 196af776a3eSJonathan Marek .has_idle_pc = true, 197af776a3eSJonathan Marek .has_3d_merge = true, 198af776a3eSJonathan Marek .max_linewidth = 4096, 199af776a3eSJonathan Marek .pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE, 200af776a3eSJonathan Marek }; 201af776a3eSJonathan Marek 202abda0d92SStephen Boyd static const struct dpu_mdp_cfg sdm845_mdp[] = { 20325fdd593SJeykumar Sankaran { 20425fdd593SJeykumar Sankaran .name = "top_0", .id = MDP_TOP, 20525fdd593SJeykumar Sankaran .base = 0x0, .len = 0x45C, 20625fdd593SJeykumar Sankaran .features = 0, 20725fdd593SJeykumar Sankaran .highest_bank_bit = 0x2, 20825fdd593SJeykumar Sankaran .clk_ctrls[DPU_CLK_CTRL_VIG0] = { 20925fdd593SJeykumar Sankaran .reg_off = 0x2AC, .bit_off = 0}, 21025fdd593SJeykumar Sankaran .clk_ctrls[DPU_CLK_CTRL_VIG1] = { 21125fdd593SJeykumar Sankaran .reg_off = 0x2B4, .bit_off = 0}, 21225fdd593SJeykumar Sankaran .clk_ctrls[DPU_CLK_CTRL_VIG2] = { 21325fdd593SJeykumar Sankaran .reg_off = 0x2BC, .bit_off = 0}, 21425fdd593SJeykumar Sankaran .clk_ctrls[DPU_CLK_CTRL_VIG3] = { 21525fdd593SJeykumar Sankaran .reg_off = 0x2C4, .bit_off = 0}, 21625fdd593SJeykumar Sankaran .clk_ctrls[DPU_CLK_CTRL_DMA0] = { 21725fdd593SJeykumar Sankaran .reg_off = 0x2AC, .bit_off = 8}, 21825fdd593SJeykumar Sankaran .clk_ctrls[DPU_CLK_CTRL_DMA1] = { 21925fdd593SJeykumar Sankaran .reg_off = 0x2B4, .bit_off = 8}, 22025fdd593SJeykumar Sankaran .clk_ctrls[DPU_CLK_CTRL_CURSOR0] = { 22125fdd593SJeykumar Sankaran .reg_off = 0x2BC, .bit_off = 8}, 22225fdd593SJeykumar Sankaran .clk_ctrls[DPU_CLK_CTRL_CURSOR1] = { 22325fdd593SJeykumar Sankaran .reg_off = 0x2C4, .bit_off = 8}, 22425fdd593SJeykumar Sankaran }, 22525fdd593SJeykumar Sankaran }; 22625fdd593SJeykumar Sankaran 2277bdc0c4bSKalyan Thota static const struct dpu_mdp_cfg sc7180_mdp[] = { 2287bdc0c4bSKalyan Thota { 2297bdc0c4bSKalyan Thota .name = "top_0", .id = MDP_TOP, 2307bdc0c4bSKalyan Thota .base = 0x0, .len = 0x494, 2317bdc0c4bSKalyan Thota .features = 0, 2327bdc0c4bSKalyan Thota .highest_bank_bit = 0x3, 2337bdc0c4bSKalyan Thota .clk_ctrls[DPU_CLK_CTRL_VIG0] = { 2347bdc0c4bSKalyan Thota .reg_off = 0x2AC, .bit_off = 0}, 2357bdc0c4bSKalyan Thota .clk_ctrls[DPU_CLK_CTRL_DMA0] = { 2367bdc0c4bSKalyan Thota .reg_off = 0x2AC, .bit_off = 8}, 2377bdc0c4bSKalyan Thota .clk_ctrls[DPU_CLK_CTRL_CURSOR0] = { 2387b149f2bSKalyan Thota .reg_off = 0x2B4, .bit_off = 8}, 2397b149f2bSKalyan Thota .clk_ctrls[DPU_CLK_CTRL_CURSOR1] = { 2407b149f2bSKalyan Thota .reg_off = 0x2C4, .bit_off = 8}, 2417bdc0c4bSKalyan Thota }, 2427bdc0c4bSKalyan Thota }; 2437bdc0c4bSKalyan Thota 244af776a3eSJonathan Marek static const struct dpu_mdp_cfg sm8250_mdp[] = { 245af776a3eSJonathan Marek { 246af776a3eSJonathan Marek .name = "top_0", .id = MDP_TOP, 247af776a3eSJonathan Marek .base = 0x0, .len = 0x45C, 248af776a3eSJonathan Marek .features = 0, 249af776a3eSJonathan Marek .highest_bank_bit = 0x3, /* TODO: 2 for LP_DDR4 */ 250af776a3eSJonathan Marek .clk_ctrls[DPU_CLK_CTRL_VIG0] = { 251af776a3eSJonathan Marek .reg_off = 0x2AC, .bit_off = 0}, 252af776a3eSJonathan Marek .clk_ctrls[DPU_CLK_CTRL_VIG1] = { 253af776a3eSJonathan Marek .reg_off = 0x2B4, .bit_off = 0}, 254af776a3eSJonathan Marek .clk_ctrls[DPU_CLK_CTRL_VIG2] = { 255af776a3eSJonathan Marek .reg_off = 0x2BC, .bit_off = 0}, 256af776a3eSJonathan Marek .clk_ctrls[DPU_CLK_CTRL_VIG3] = { 257af776a3eSJonathan Marek .reg_off = 0x2C4, .bit_off = 0}, 258af776a3eSJonathan Marek .clk_ctrls[DPU_CLK_CTRL_DMA0] = { 259af776a3eSJonathan Marek .reg_off = 0x2AC, .bit_off = 8}, 260af776a3eSJonathan Marek .clk_ctrls[DPU_CLK_CTRL_DMA1] = { 261af776a3eSJonathan Marek .reg_off = 0x2B4, .bit_off = 8}, 262af776a3eSJonathan Marek .clk_ctrls[DPU_CLK_CTRL_CURSOR0] = { 263af776a3eSJonathan Marek .reg_off = 0x2BC, .bit_off = 8}, 264af776a3eSJonathan Marek .clk_ctrls[DPU_CLK_CTRL_CURSOR1] = { 265af776a3eSJonathan Marek .reg_off = 0x2C4, .bit_off = 8}, 266af776a3eSJonathan Marek .clk_ctrls[DPU_CLK_CTRL_REG_DMA] = { 267af776a3eSJonathan Marek .reg_off = 0x2BC, .bit_off = 20}, 268af776a3eSJonathan Marek }, 269af776a3eSJonathan Marek }; 270af776a3eSJonathan Marek 27125fdd593SJeykumar Sankaran /************************************************************* 27225fdd593SJeykumar Sankaran * CTL sub blocks config 27325fdd593SJeykumar Sankaran *************************************************************/ 274abda0d92SStephen Boyd static const struct dpu_ctl_cfg sdm845_ctl[] = { 27525fdd593SJeykumar Sankaran { 27625fdd593SJeykumar Sankaran .name = "ctl_0", .id = CTL_0, 27725fdd593SJeykumar Sankaran .base = 0x1000, .len = 0xE4, 27825fdd593SJeykumar Sankaran .features = BIT(DPU_CTL_SPLIT_DISPLAY) 27925fdd593SJeykumar Sankaran }, 28025fdd593SJeykumar Sankaran { 28125fdd593SJeykumar Sankaran .name = "ctl_1", .id = CTL_1, 28225fdd593SJeykumar Sankaran .base = 0x1200, .len = 0xE4, 28325fdd593SJeykumar Sankaran .features = BIT(DPU_CTL_SPLIT_DISPLAY) 28425fdd593SJeykumar Sankaran }, 28525fdd593SJeykumar Sankaran { 28625fdd593SJeykumar Sankaran .name = "ctl_2", .id = CTL_2, 28725fdd593SJeykumar Sankaran .base = 0x1400, .len = 0xE4, 28825fdd593SJeykumar Sankaran .features = 0 28925fdd593SJeykumar Sankaran }, 29025fdd593SJeykumar Sankaran { 29125fdd593SJeykumar Sankaran .name = "ctl_3", .id = CTL_3, 29225fdd593SJeykumar Sankaran .base = 0x1600, .len = 0xE4, 29325fdd593SJeykumar Sankaran .features = 0 29425fdd593SJeykumar Sankaran }, 29525fdd593SJeykumar Sankaran { 29625fdd593SJeykumar Sankaran .name = "ctl_4", .id = CTL_4, 29725fdd593SJeykumar Sankaran .base = 0x1800, .len = 0xE4, 29825fdd593SJeykumar Sankaran .features = 0 29925fdd593SJeykumar Sankaran }, 30025fdd593SJeykumar Sankaran }; 30125fdd593SJeykumar Sankaran 3027bdc0c4bSKalyan Thota static const struct dpu_ctl_cfg sc7180_ctl[] = { 3037bdc0c4bSKalyan Thota { 3047bdc0c4bSKalyan Thota .name = "ctl_0", .id = CTL_0, 3057bdc0c4bSKalyan Thota .base = 0x1000, .len = 0xE4, 3067bdc0c4bSKalyan Thota .features = BIT(DPU_CTL_ACTIVE_CFG) 3077bdc0c4bSKalyan Thota }, 3087bdc0c4bSKalyan Thota { 3097bdc0c4bSKalyan Thota .name = "ctl_1", .id = CTL_1, 3107bdc0c4bSKalyan Thota .base = 0x1200, .len = 0xE4, 3117bdc0c4bSKalyan Thota .features = BIT(DPU_CTL_ACTIVE_CFG) 3127bdc0c4bSKalyan Thota }, 3137bdc0c4bSKalyan Thota { 3147bdc0c4bSKalyan Thota .name = "ctl_2", .id = CTL_2, 3157bdc0c4bSKalyan Thota .base = 0x1400, .len = 0xE4, 3167bdc0c4bSKalyan Thota .features = BIT(DPU_CTL_ACTIVE_CFG) 3177bdc0c4bSKalyan Thota }, 3187bdc0c4bSKalyan Thota }; 3197bdc0c4bSKalyan Thota 320386fced3SJonathan Marek static const struct dpu_ctl_cfg sm8150_ctl[] = { 321386fced3SJonathan Marek { 322386fced3SJonathan Marek .name = "ctl_0", .id = CTL_0, 323386fced3SJonathan Marek .base = 0x1000, .len = 0x1e0, 324386fced3SJonathan Marek .features = BIT(DPU_CTL_ACTIVE_CFG) | BIT(DPU_CTL_SPLIT_DISPLAY) 325386fced3SJonathan Marek }, 326386fced3SJonathan Marek { 327386fced3SJonathan Marek .name = "ctl_1", .id = CTL_1, 328386fced3SJonathan Marek .base = 0x1200, .len = 0x1e0, 329386fced3SJonathan Marek .features = BIT(DPU_CTL_ACTIVE_CFG) | BIT(DPU_CTL_SPLIT_DISPLAY) 330386fced3SJonathan Marek }, 331386fced3SJonathan Marek { 332386fced3SJonathan Marek .name = "ctl_2", .id = CTL_2, 333386fced3SJonathan Marek .base = 0x1400, .len = 0x1e0, 334386fced3SJonathan Marek .features = BIT(DPU_CTL_ACTIVE_CFG) 335386fced3SJonathan Marek }, 336386fced3SJonathan Marek { 337386fced3SJonathan Marek .name = "ctl_3", .id = CTL_3, 338386fced3SJonathan Marek .base = 0x1600, .len = 0x1e0, 339386fced3SJonathan Marek .features = BIT(DPU_CTL_ACTIVE_CFG) 340386fced3SJonathan Marek }, 341386fced3SJonathan Marek { 342386fced3SJonathan Marek .name = "ctl_4", .id = CTL_4, 343386fced3SJonathan Marek .base = 0x1800, .len = 0x1e0, 344386fced3SJonathan Marek .features = BIT(DPU_CTL_ACTIVE_CFG) 345386fced3SJonathan Marek }, 346386fced3SJonathan Marek { 347386fced3SJonathan Marek .name = "ctl_5", .id = CTL_5, 348386fced3SJonathan Marek .base = 0x1a00, .len = 0x1e0, 349386fced3SJonathan Marek .features = BIT(DPU_CTL_ACTIVE_CFG) 350386fced3SJonathan Marek }, 351386fced3SJonathan Marek }; 352386fced3SJonathan Marek 35325fdd593SJeykumar Sankaran /************************************************************* 35425fdd593SJeykumar Sankaran * SSPP sub blocks config 35525fdd593SJeykumar Sankaran *************************************************************/ 35625fdd593SJeykumar Sankaran 35725fdd593SJeykumar Sankaran /* SSPP common configuration */ 35825fdd593SJeykumar Sankaran 359b75ab05aSShubhashree Dhar #define _VIG_SBLK(num, sdma_pri, qseed_ver) \ 36025fdd593SJeykumar Sankaran { \ 36125fdd593SJeykumar Sankaran .maxdwnscale = MAX_DOWNSCALE_RATIO, \ 36225fdd593SJeykumar Sankaran .maxupscale = MAX_UPSCALE_RATIO, \ 36325fdd593SJeykumar Sankaran .smart_dma_priority = sdma_pri, \ 36425fdd593SJeykumar Sankaran .src_blk = {.name = STRCAT("sspp_src_", num), \ 36525fdd593SJeykumar Sankaran .id = DPU_SSPP_SRC, .base = 0x00, .len = 0x150,}, \ 36625fdd593SJeykumar Sankaran .scaler_blk = {.name = STRCAT("sspp_scaler", num), \ 367b75ab05aSShubhashree Dhar .id = qseed_ver, \ 36825fdd593SJeykumar Sankaran .base = 0xa00, .len = 0xa0,}, \ 36925fdd593SJeykumar Sankaran .csc_blk = {.name = STRCAT("sspp_csc", num), \ 37025fdd593SJeykumar Sankaran .id = DPU_SSPP_CSC_10BIT, \ 37125fdd593SJeykumar Sankaran .base = 0x1a00, .len = 0x100,}, \ 37225fdd593SJeykumar Sankaran .format_list = plane_formats_yuv, \ 373e6b63a7bSFritz Koenig .num_formats = ARRAY_SIZE(plane_formats_yuv), \ 37425fdd593SJeykumar Sankaran .virt_format_list = plane_formats, \ 375e6b63a7bSFritz Koenig .virt_num_formats = ARRAY_SIZE(plane_formats), \ 37625fdd593SJeykumar Sankaran } 37725fdd593SJeykumar Sankaran 37825fdd593SJeykumar Sankaran #define _DMA_SBLK(num, sdma_pri) \ 37925fdd593SJeykumar Sankaran { \ 38025fdd593SJeykumar Sankaran .maxdwnscale = SSPP_UNITY_SCALE, \ 38125fdd593SJeykumar Sankaran .maxupscale = SSPP_UNITY_SCALE, \ 38225fdd593SJeykumar Sankaran .smart_dma_priority = sdma_pri, \ 38325fdd593SJeykumar Sankaran .src_blk = {.name = STRCAT("sspp_src_", num), \ 38425fdd593SJeykumar Sankaran .id = DPU_SSPP_SRC, .base = 0x00, .len = 0x150,}, \ 38525fdd593SJeykumar Sankaran .format_list = plane_formats, \ 386e6b63a7bSFritz Koenig .num_formats = ARRAY_SIZE(plane_formats), \ 38725fdd593SJeykumar Sankaran .virt_format_list = plane_formats, \ 388e6b63a7bSFritz Koenig .virt_num_formats = ARRAY_SIZE(plane_formats), \ 38925fdd593SJeykumar Sankaran } 39025fdd593SJeykumar Sankaran 391b75ab05aSShubhashree Dhar static const struct dpu_sspp_sub_blks sdm845_vig_sblk_0 = 392b75ab05aSShubhashree Dhar _VIG_SBLK("0", 5, DPU_SSPP_SCALER_QSEED3); 393b75ab05aSShubhashree Dhar static const struct dpu_sspp_sub_blks sdm845_vig_sblk_1 = 394b75ab05aSShubhashree Dhar _VIG_SBLK("1", 6, DPU_SSPP_SCALER_QSEED3); 395b75ab05aSShubhashree Dhar static const struct dpu_sspp_sub_blks sdm845_vig_sblk_2 = 396b75ab05aSShubhashree Dhar _VIG_SBLK("2", 7, DPU_SSPP_SCALER_QSEED3); 397b75ab05aSShubhashree Dhar static const struct dpu_sspp_sub_blks sdm845_vig_sblk_3 = 398b75ab05aSShubhashree Dhar _VIG_SBLK("3", 8, DPU_SSPP_SCALER_QSEED3); 39925fdd593SJeykumar Sankaran 40025fdd593SJeykumar Sankaran static const struct dpu_sspp_sub_blks sdm845_dma_sblk_0 = _DMA_SBLK("8", 1); 40125fdd593SJeykumar Sankaran static const struct dpu_sspp_sub_blks sdm845_dma_sblk_1 = _DMA_SBLK("9", 2); 40225fdd593SJeykumar Sankaran static const struct dpu_sspp_sub_blks sdm845_dma_sblk_2 = _DMA_SBLK("10", 3); 40325fdd593SJeykumar Sankaran static const struct dpu_sspp_sub_blks sdm845_dma_sblk_3 = _DMA_SBLK("11", 4); 40425fdd593SJeykumar Sankaran 40507ca1fc0SSravanthi Kollukuduru #define SSPP_BLK(_name, _id, _base, _features, \ 40607ca1fc0SSravanthi Kollukuduru _sblk, _xinid, _type, _clkctrl) \ 40725fdd593SJeykumar Sankaran { \ 40825fdd593SJeykumar Sankaran .name = _name, .id = _id, \ 40925fdd593SJeykumar Sankaran .base = _base, .len = 0x1c8, \ 41007ca1fc0SSravanthi Kollukuduru .features = _features, \ 41125fdd593SJeykumar Sankaran .sblk = &_sblk, \ 41225fdd593SJeykumar Sankaran .xin_id = _xinid, \ 41307ca1fc0SSravanthi Kollukuduru .type = _type, \ 41425fdd593SJeykumar Sankaran .clk_ctrl = _clkctrl \ 41525fdd593SJeykumar Sankaran } 41625fdd593SJeykumar Sankaran 417abda0d92SStephen Boyd static const struct dpu_sspp_cfg sdm845_sspp[] = { 41807ca1fc0SSravanthi Kollukuduru SSPP_BLK("sspp_0", SSPP_VIG0, 0x4000, VIG_SDM845_MASK, 41907ca1fc0SSravanthi Kollukuduru sdm845_vig_sblk_0, 0, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG0), 42007ca1fc0SSravanthi Kollukuduru SSPP_BLK("sspp_1", SSPP_VIG1, 0x6000, VIG_SDM845_MASK, 42107ca1fc0SSravanthi Kollukuduru sdm845_vig_sblk_1, 4, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG1), 42207ca1fc0SSravanthi Kollukuduru SSPP_BLK("sspp_2", SSPP_VIG2, 0x8000, VIG_SDM845_MASK, 42307ca1fc0SSravanthi Kollukuduru sdm845_vig_sblk_2, 8, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG2), 42407ca1fc0SSravanthi Kollukuduru SSPP_BLK("sspp_3", SSPP_VIG3, 0xa000, VIG_SDM845_MASK, 42507ca1fc0SSravanthi Kollukuduru sdm845_vig_sblk_3, 12, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG3), 42607ca1fc0SSravanthi Kollukuduru SSPP_BLK("sspp_8", SSPP_DMA0, 0x24000, DMA_SDM845_MASK, 42707ca1fc0SSravanthi Kollukuduru sdm845_dma_sblk_0, 1, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA0), 42807ca1fc0SSravanthi Kollukuduru SSPP_BLK("sspp_9", SSPP_DMA1, 0x26000, DMA_SDM845_MASK, 42907ca1fc0SSravanthi Kollukuduru sdm845_dma_sblk_1, 5, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA1), 43007ca1fc0SSravanthi Kollukuduru SSPP_BLK("sspp_10", SSPP_DMA2, 0x28000, DMA_CURSOR_SDM845_MASK, 43107ca1fc0SSravanthi Kollukuduru sdm845_dma_sblk_2, 9, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR0), 43207ca1fc0SSravanthi Kollukuduru SSPP_BLK("sspp_11", SSPP_DMA3, 0x2a000, DMA_CURSOR_SDM845_MASK, 43307ca1fc0SSravanthi Kollukuduru sdm845_dma_sblk_3, 13, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR1), 43425fdd593SJeykumar Sankaran }; 43525fdd593SJeykumar Sankaran 436b75ab05aSShubhashree Dhar static const struct dpu_sspp_sub_blks sc7180_vig_sblk_0 = 437b75ab05aSShubhashree Dhar _VIG_SBLK("0", 4, DPU_SSPP_SCALER_QSEED4); 438b75ab05aSShubhashree Dhar 4397bdc0c4bSKalyan Thota static const struct dpu_sspp_cfg sc7180_sspp[] = { 4407bdc0c4bSKalyan Thota SSPP_BLK("sspp_0", SSPP_VIG0, 0x4000, VIG_SC7180_MASK, 441b75ab05aSShubhashree Dhar sc7180_vig_sblk_0, 0, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG0), 4427bdc0c4bSKalyan Thota SSPP_BLK("sspp_8", SSPP_DMA0, 0x24000, DMA_SDM845_MASK, 4437bdc0c4bSKalyan Thota sdm845_dma_sblk_0, 1, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA0), 4447b149f2bSKalyan Thota SSPP_BLK("sspp_9", SSPP_DMA1, 0x26000, DMA_CURSOR_SDM845_MASK, 4457b149f2bSKalyan Thota sdm845_dma_sblk_1, 5, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR0), 4467bdc0c4bSKalyan Thota SSPP_BLK("sspp_10", SSPP_DMA2, 0x28000, DMA_CURSOR_SDM845_MASK, 4477b149f2bSKalyan Thota sdm845_dma_sblk_2, 9, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR1), 4487bdc0c4bSKalyan Thota }; 4497bdc0c4bSKalyan Thota 450d21fc5dfSDmitry Baryshkov static const struct dpu_sspp_sub_blks sm8250_vig_sblk_0 = 451d21fc5dfSDmitry Baryshkov _VIG_SBLK("0", 5, DPU_SSPP_SCALER_QSEED3LITE); 452d21fc5dfSDmitry Baryshkov static const struct dpu_sspp_sub_blks sm8250_vig_sblk_1 = 453d21fc5dfSDmitry Baryshkov _VIG_SBLK("1", 6, DPU_SSPP_SCALER_QSEED3LITE); 454d21fc5dfSDmitry Baryshkov static const struct dpu_sspp_sub_blks sm8250_vig_sblk_2 = 455d21fc5dfSDmitry Baryshkov _VIG_SBLK("2", 7, DPU_SSPP_SCALER_QSEED3LITE); 456d21fc5dfSDmitry Baryshkov static const struct dpu_sspp_sub_blks sm8250_vig_sblk_3 = 457d21fc5dfSDmitry Baryshkov _VIG_SBLK("3", 8, DPU_SSPP_SCALER_QSEED3LITE); 458d21fc5dfSDmitry Baryshkov 459d21fc5dfSDmitry Baryshkov static const struct dpu_sspp_cfg sm8250_sspp[] = { 460d21fc5dfSDmitry Baryshkov SSPP_BLK("sspp_0", SSPP_VIG0, 0x4000, VIG_SM8250_MASK, 461d21fc5dfSDmitry Baryshkov sm8250_vig_sblk_0, 0, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG0), 462d21fc5dfSDmitry Baryshkov SSPP_BLK("sspp_1", SSPP_VIG1, 0x6000, VIG_SM8250_MASK, 463d21fc5dfSDmitry Baryshkov sm8250_vig_sblk_1, 4, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG1), 464d21fc5dfSDmitry Baryshkov SSPP_BLK("sspp_2", SSPP_VIG2, 0x8000, VIG_SM8250_MASK, 465d21fc5dfSDmitry Baryshkov sm8250_vig_sblk_2, 8, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG2), 466d21fc5dfSDmitry Baryshkov SSPP_BLK("sspp_3", SSPP_VIG3, 0xa000, VIG_SM8250_MASK, 467d21fc5dfSDmitry Baryshkov sm8250_vig_sblk_3, 12, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG3), 468d21fc5dfSDmitry Baryshkov SSPP_BLK("sspp_8", SSPP_DMA0, 0x24000, DMA_SDM845_MASK, 469d21fc5dfSDmitry Baryshkov sdm845_dma_sblk_0, 1, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA0), 470d21fc5dfSDmitry Baryshkov SSPP_BLK("sspp_9", SSPP_DMA1, 0x26000, DMA_SDM845_MASK, 471d21fc5dfSDmitry Baryshkov sdm845_dma_sblk_1, 5, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA1), 472d21fc5dfSDmitry Baryshkov SSPP_BLK("sspp_10", SSPP_DMA2, 0x28000, DMA_CURSOR_SDM845_MASK, 473d21fc5dfSDmitry Baryshkov sdm845_dma_sblk_2, 9, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR0), 474d21fc5dfSDmitry Baryshkov SSPP_BLK("sspp_11", SSPP_DMA3, 0x2a000, DMA_CURSOR_SDM845_MASK, 475d21fc5dfSDmitry Baryshkov sdm845_dma_sblk_3, 13, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR1), 476d21fc5dfSDmitry Baryshkov }; 477d21fc5dfSDmitry Baryshkov 47825fdd593SJeykumar Sankaran /************************************************************* 47925fdd593SJeykumar Sankaran * MIXER sub blocks config 48025fdd593SJeykumar Sankaran *************************************************************/ 4817bdc0c4bSKalyan Thota 4827bdc0c4bSKalyan Thota /* SDM845 */ 4837bdc0c4bSKalyan Thota 48425fdd593SJeykumar Sankaran static const struct dpu_lm_sub_blks sdm845_lm_sblk = { 48525fdd593SJeykumar Sankaran .maxwidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 48625fdd593SJeykumar Sankaran .maxblendstages = 11, /* excluding base layer */ 48725fdd593SJeykumar Sankaran .blendstage_base = { /* offsets relative to mixer base */ 48825fdd593SJeykumar Sankaran 0x20, 0x38, 0x50, 0x68, 0x80, 0x98, 48925fdd593SJeykumar Sankaran 0xb0, 0xc8, 0xe0, 0xf8, 0x110 49025fdd593SJeykumar Sankaran }, 49125fdd593SJeykumar Sankaran }; 49225fdd593SJeykumar Sankaran 493e47616dfSKalyan Thota #define LM_BLK(_name, _id, _base, _fmask, _sblk, _pp, _lmpair, _dspp) \ 49425fdd593SJeykumar Sankaran { \ 49525fdd593SJeykumar Sankaran .name = _name, .id = _id, \ 49625fdd593SJeykumar Sankaran .base = _base, .len = 0x320, \ 4977bdc0c4bSKalyan Thota .features = _fmask, \ 4987bdc0c4bSKalyan Thota .sblk = _sblk, \ 49925fdd593SJeykumar Sankaran .pingpong = _pp, \ 500e47616dfSKalyan Thota .lm_pair_mask = (1 << _lmpair), \ 501e47616dfSKalyan Thota .dspp = _dspp \ 50225fdd593SJeykumar Sankaran } 50325fdd593SJeykumar Sankaran 504abda0d92SStephen Boyd static const struct dpu_lm_cfg sdm845_lm[] = { 5057bdc0c4bSKalyan Thota LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK, 506e47616dfSKalyan Thota &sdm845_lm_sblk, PINGPONG_0, LM_1, 0), 5077bdc0c4bSKalyan Thota LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK, 508e47616dfSKalyan Thota &sdm845_lm_sblk, PINGPONG_1, LM_0, 0), 5097bdc0c4bSKalyan Thota LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK, 510e47616dfSKalyan Thota &sdm845_lm_sblk, PINGPONG_2, LM_5, 0), 5117bdc0c4bSKalyan Thota LM_BLK("lm_3", LM_3, 0x0, MIXER_SDM845_MASK, 512e47616dfSKalyan Thota &sdm845_lm_sblk, PINGPONG_MAX, 0, 0), 5137bdc0c4bSKalyan Thota LM_BLK("lm_4", LM_4, 0x0, MIXER_SDM845_MASK, 514e47616dfSKalyan Thota &sdm845_lm_sblk, PINGPONG_MAX, 0, 0), 5157bdc0c4bSKalyan Thota LM_BLK("lm_5", LM_5, 0x49000, MIXER_SDM845_MASK, 516e47616dfSKalyan Thota &sdm845_lm_sblk, PINGPONG_3, LM_2, 0), 5177bdc0c4bSKalyan Thota }; 5187bdc0c4bSKalyan Thota 5197bdc0c4bSKalyan Thota /* SC7180 */ 5207bdc0c4bSKalyan Thota 5217bdc0c4bSKalyan Thota static const struct dpu_lm_sub_blks sc7180_lm_sblk = { 5227bdc0c4bSKalyan Thota .maxwidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 5237bdc0c4bSKalyan Thota .maxblendstages = 7, /* excluding base layer */ 5247bdc0c4bSKalyan Thota .blendstage_base = { /* offsets relative to mixer base */ 5257bdc0c4bSKalyan Thota 0x20, 0x38, 0x50, 0x68, 0x80, 0x98, 0xb0 5267bdc0c4bSKalyan Thota }, 5277bdc0c4bSKalyan Thota }; 5287bdc0c4bSKalyan Thota 5297bdc0c4bSKalyan Thota static const struct dpu_lm_cfg sc7180_lm[] = { 5307bdc0c4bSKalyan Thota LM_BLK("lm_0", LM_0, 0x44000, MIXER_SC7180_MASK, 531e47616dfSKalyan Thota &sc7180_lm_sblk, PINGPONG_0, LM_1, DSPP_0), 5327bdc0c4bSKalyan Thota LM_BLK("lm_1", LM_1, 0x45000, MIXER_SC7180_MASK, 533e47616dfSKalyan Thota &sc7180_lm_sblk, PINGPONG_1, LM_0, 0), 53425fdd593SJeykumar Sankaran }; 53525fdd593SJeykumar Sankaran 536386fced3SJonathan Marek /* SM8150 */ 537386fced3SJonathan Marek 538386fced3SJonathan Marek static const struct dpu_lm_cfg sm8150_lm[] = { 539386fced3SJonathan Marek LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK, 54005ae91d9SDmitry Baryshkov &sdm845_lm_sblk, PINGPONG_0, LM_1, DSPP_0), 541386fced3SJonathan Marek LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK, 54205ae91d9SDmitry Baryshkov &sdm845_lm_sblk, PINGPONG_1, LM_0, DSPP_1), 543386fced3SJonathan Marek LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK, 544386fced3SJonathan Marek &sdm845_lm_sblk, PINGPONG_2, LM_3, 0), 545386fced3SJonathan Marek LM_BLK("lm_3", LM_3, 0x47000, MIXER_SDM845_MASK, 546386fced3SJonathan Marek &sdm845_lm_sblk, PINGPONG_3, LM_2, 0), 547386fced3SJonathan Marek LM_BLK("lm_4", LM_4, 0x48000, MIXER_SDM845_MASK, 548386fced3SJonathan Marek &sdm845_lm_sblk, PINGPONG_4, LM_5, 0), 549386fced3SJonathan Marek LM_BLK("lm_5", LM_5, 0x49000, MIXER_SDM845_MASK, 550386fced3SJonathan Marek &sdm845_lm_sblk, PINGPONG_5, LM_4, 0), 551386fced3SJonathan Marek }; 552386fced3SJonathan Marek 55325fdd593SJeykumar Sankaran /************************************************************* 554e47616dfSKalyan Thota * DSPP sub blocks config 555e47616dfSKalyan Thota *************************************************************/ 5564259ff7aSKalyan Thota static const struct dpu_dspp_sub_blks sc7180_dspp_sblk = { 5574259ff7aSKalyan Thota .pcc = {.id = DPU_DSPP_PCC, .base = 0x1700, 5584259ff7aSKalyan Thota .len = 0x90, .version = 0x10000}, 5594259ff7aSKalyan Thota }; 5604259ff7aSKalyan Thota 56105ae91d9SDmitry Baryshkov static const struct dpu_dspp_sub_blks sm8150_dspp_sblk = { 56205ae91d9SDmitry Baryshkov .pcc = {.id = DPU_DSPP_PCC, .base = 0x1700, 56305ae91d9SDmitry Baryshkov .len = 0x90, .version = 0x40000}, 56405ae91d9SDmitry Baryshkov }; 56505ae91d9SDmitry Baryshkov 566862314bcSAngeloGioacchino Del Regno #define DSPP_BLK(_name, _id, _base, _mask, _sblk) \ 567e47616dfSKalyan Thota {\ 568e47616dfSKalyan Thota .name = _name, .id = _id, \ 569e47616dfSKalyan Thota .base = _base, .len = 0x1800, \ 570862314bcSAngeloGioacchino Del Regno .features = _mask, \ 57105ae91d9SDmitry Baryshkov .sblk = _sblk \ 572e47616dfSKalyan Thota } 573e47616dfSKalyan Thota 574e47616dfSKalyan Thota static const struct dpu_dspp_cfg sc7180_dspp[] = { 575862314bcSAngeloGioacchino Del Regno DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, 576862314bcSAngeloGioacchino Del Regno &sc7180_dspp_sblk), 57705ae91d9SDmitry Baryshkov }; 57805ae91d9SDmitry Baryshkov 57905ae91d9SDmitry Baryshkov static const struct dpu_dspp_cfg sm8150_dspp[] = { 580862314bcSAngeloGioacchino Del Regno DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, 581862314bcSAngeloGioacchino Del Regno &sm8150_dspp_sblk), 582862314bcSAngeloGioacchino Del Regno DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK, 583862314bcSAngeloGioacchino Del Regno &sm8150_dspp_sblk), 584862314bcSAngeloGioacchino Del Regno DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK, 585862314bcSAngeloGioacchino Del Regno &sm8150_dspp_sblk), 586862314bcSAngeloGioacchino Del Regno DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK, 587862314bcSAngeloGioacchino Del Regno &sm8150_dspp_sblk), 588e47616dfSKalyan Thota }; 589386fced3SJonathan Marek 590e47616dfSKalyan Thota /************************************************************* 59125fdd593SJeykumar Sankaran * PINGPONG sub blocks config 59225fdd593SJeykumar Sankaran *************************************************************/ 59325fdd593SJeykumar Sankaran static const struct dpu_pingpong_sub_blks sdm845_pp_sblk_te = { 59425fdd593SJeykumar Sankaran .te2 = {.id = DPU_PINGPONG_TE2, .base = 0x2000, .len = 0x0, 59525fdd593SJeykumar Sankaran .version = 0x1}, 59625fdd593SJeykumar Sankaran .dither = {.id = DPU_PINGPONG_DITHER, .base = 0x30e0, 59725fdd593SJeykumar Sankaran .len = 0x20, .version = 0x10000}, 59825fdd593SJeykumar Sankaran }; 59925fdd593SJeykumar Sankaran 60025fdd593SJeykumar Sankaran static const struct dpu_pingpong_sub_blks sdm845_pp_sblk = { 60125fdd593SJeykumar Sankaran .dither = {.id = DPU_PINGPONG_DITHER, .base = 0x30e0, 60225fdd593SJeykumar Sankaran .len = 0x20, .version = 0x10000}, 60325fdd593SJeykumar Sankaran }; 60425fdd593SJeykumar Sankaran 6054369c93cSDmitry Baryshkov #define PP_BLK_TE(_name, _id, _base, _merge_3d) \ 60625fdd593SJeykumar Sankaran {\ 60725fdd593SJeykumar Sankaran .name = _name, .id = _id, \ 60825fdd593SJeykumar Sankaran .base = _base, .len = 0xd4, \ 60925fdd593SJeykumar Sankaran .features = PINGPONG_SDM845_SPLIT_MASK, \ 6104369c93cSDmitry Baryshkov .merge_3d = _merge_3d, \ 61125fdd593SJeykumar Sankaran .sblk = &sdm845_pp_sblk_te \ 61225fdd593SJeykumar Sankaran } 6134369c93cSDmitry Baryshkov #define PP_BLK(_name, _id, _base, _merge_3d) \ 61425fdd593SJeykumar Sankaran {\ 61525fdd593SJeykumar Sankaran .name = _name, .id = _id, \ 61625fdd593SJeykumar Sankaran .base = _base, .len = 0xd4, \ 61725fdd593SJeykumar Sankaran .features = PINGPONG_SDM845_MASK, \ 6184369c93cSDmitry Baryshkov .merge_3d = _merge_3d, \ 61925fdd593SJeykumar Sankaran .sblk = &sdm845_pp_sblk \ 62025fdd593SJeykumar Sankaran } 62125fdd593SJeykumar Sankaran 622abda0d92SStephen Boyd static const struct dpu_pingpong_cfg sdm845_pp[] = { 6234369c93cSDmitry Baryshkov PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000, 0), 6244369c93cSDmitry Baryshkov PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800, 0), 6254369c93cSDmitry Baryshkov PP_BLK("pingpong_2", PINGPONG_2, 0x71000, 0), 6264369c93cSDmitry Baryshkov PP_BLK("pingpong_3", PINGPONG_3, 0x71800, 0), 62725fdd593SJeykumar Sankaran }; 62825fdd593SJeykumar Sankaran 6297bdc0c4bSKalyan Thota static struct dpu_pingpong_cfg sc7180_pp[] = { 6304369c93cSDmitry Baryshkov PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000, 0), 6314369c93cSDmitry Baryshkov PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800, 0), 6327bdc0c4bSKalyan Thota }; 6337bdc0c4bSKalyan Thota 634386fced3SJonathan Marek static const struct dpu_pingpong_cfg sm8150_pp[] = { 6354369c93cSDmitry Baryshkov PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000, MERGE_3D_0), 6364369c93cSDmitry Baryshkov PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800, MERGE_3D_0), 6374369c93cSDmitry Baryshkov PP_BLK("pingpong_2", PINGPONG_2, 0x71000, MERGE_3D_1), 6384369c93cSDmitry Baryshkov PP_BLK("pingpong_3", PINGPONG_3, 0x71800, MERGE_3D_1), 6394369c93cSDmitry Baryshkov PP_BLK("pingpong_4", PINGPONG_4, 0x72000, MERGE_3D_2), 6404369c93cSDmitry Baryshkov PP_BLK("pingpong_5", PINGPONG_5, 0x72800, MERGE_3D_2), 6414369c93cSDmitry Baryshkov }; 6424369c93cSDmitry Baryshkov 6434369c93cSDmitry Baryshkov /************************************************************* 6444369c93cSDmitry Baryshkov * MERGE_3D sub blocks config 6454369c93cSDmitry Baryshkov *************************************************************/ 6464369c93cSDmitry Baryshkov #define MERGE_3D_BLK(_name, _id, _base) \ 6474369c93cSDmitry Baryshkov {\ 6484369c93cSDmitry Baryshkov .name = _name, .id = _id, \ 6494369c93cSDmitry Baryshkov .base = _base, .len = 0x100, \ 6504369c93cSDmitry Baryshkov .features = MERGE_3D_SM8150_MASK, \ 6514369c93cSDmitry Baryshkov .sblk = NULL \ 6524369c93cSDmitry Baryshkov } 6534369c93cSDmitry Baryshkov 6544369c93cSDmitry Baryshkov static const struct dpu_merge_3d_cfg sm8150_merge_3d[] = { 6554369c93cSDmitry Baryshkov MERGE_3D_BLK("merge_3d_0", MERGE_3D_0, 0x83000), 6564369c93cSDmitry Baryshkov MERGE_3D_BLK("merge_3d_1", MERGE_3D_1, 0x83100), 6574369c93cSDmitry Baryshkov MERGE_3D_BLK("merge_3d_2", MERGE_3D_2, 0x83200), 658386fced3SJonathan Marek }; 659386fced3SJonathan Marek 66025fdd593SJeykumar Sankaran /************************************************************* 66125fdd593SJeykumar Sankaran * INTF sub blocks config 66225fdd593SJeykumar Sankaran *************************************************************/ 663731806daSAngeloGioacchino Del Regno #define INTF_BLK(_name, _id, _base, _type, _ctrl_id, _progfetch, _features) \ 66425fdd593SJeykumar Sankaran {\ 66525fdd593SJeykumar Sankaran .name = _name, .id = _id, \ 66625fdd593SJeykumar Sankaran .base = _base, .len = 0x280, \ 667cace3ac4SJonathan Marek .features = _features, \ 66825fdd593SJeykumar Sankaran .type = _type, \ 66925fdd593SJeykumar Sankaran .controller_id = _ctrl_id, \ 670731806daSAngeloGioacchino Del Regno .prog_fetch_lines_worst_case = _progfetch \ 67125fdd593SJeykumar Sankaran } 67225fdd593SJeykumar Sankaran 673abda0d92SStephen Boyd static const struct dpu_intf_cfg sdm845_intf[] = { 674731806daSAngeloGioacchino Del Regno INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SDM845_MASK), 675731806daSAngeloGioacchino Del Regno INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SDM845_MASK), 676731806daSAngeloGioacchino Del Regno INTF_BLK("intf_2", INTF_2, 0x6B000, INTF_DSI, 1, 24, INTF_SDM845_MASK), 677731806daSAngeloGioacchino Del Regno INTF_BLK("intf_3", INTF_3, 0x6B800, INTF_DP, 1, 24, INTF_SDM845_MASK), 67825fdd593SJeykumar Sankaran }; 67925fdd593SJeykumar Sankaran 6807bdc0c4bSKalyan Thota static const struct dpu_intf_cfg sc7180_intf[] = { 681731806daSAngeloGioacchino Del Regno INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC7180_MASK), 682731806daSAngeloGioacchino Del Regno INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SC7180_MASK), 6837bdc0c4bSKalyan Thota }; 6847bdc0c4bSKalyan Thota 685386fced3SJonathan Marek static const struct dpu_intf_cfg sm8150_intf[] = { 686731806daSAngeloGioacchino Del Regno INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC7180_MASK), 687731806daSAngeloGioacchino Del Regno INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SC7180_MASK), 688731806daSAngeloGioacchino Del Regno INTF_BLK("intf_2", INTF_2, 0x6B000, INTF_DSI, 1, 24, INTF_SC7180_MASK), 689731806daSAngeloGioacchino Del Regno INTF_BLK("intf_3", INTF_3, 0x6B800, INTF_DP, 1, 24, INTF_SC7180_MASK), 690386fced3SJonathan Marek }; 691386fced3SJonathan Marek 69225fdd593SJeykumar Sankaran /************************************************************* 69325fdd593SJeykumar Sankaran * VBIF sub blocks config 69425fdd593SJeykumar Sankaran *************************************************************/ 69525fdd593SJeykumar Sankaran /* VBIF QOS remap */ 696abda0d92SStephen Boyd static const u32 sdm845_rt_pri_lvl[] = {3, 3, 4, 4, 5, 5, 6, 6}; 697abda0d92SStephen Boyd static const u32 sdm845_nrt_pri_lvl[] = {3, 3, 3, 3, 3, 3, 3, 3}; 69825fdd593SJeykumar Sankaran 699abda0d92SStephen Boyd static const struct dpu_vbif_cfg sdm845_vbif[] = { 70025fdd593SJeykumar Sankaran { 70125fdd593SJeykumar Sankaran .name = "vbif_0", .id = VBIF_0, 70225fdd593SJeykumar Sankaran .base = 0, .len = 0x1040, 70325fdd593SJeykumar Sankaran .features = BIT(DPU_VBIF_QOS_REMAP), 70425fdd593SJeykumar Sankaran .xin_halt_timeout = 0x4000, 70525fdd593SJeykumar Sankaran .qos_rt_tbl = { 70625fdd593SJeykumar Sankaran .npriority_lvl = ARRAY_SIZE(sdm845_rt_pri_lvl), 70725fdd593SJeykumar Sankaran .priority_lvl = sdm845_rt_pri_lvl, 70825fdd593SJeykumar Sankaran }, 70925fdd593SJeykumar Sankaran .qos_nrt_tbl = { 71025fdd593SJeykumar Sankaran .npriority_lvl = ARRAY_SIZE(sdm845_nrt_pri_lvl), 71125fdd593SJeykumar Sankaran .priority_lvl = sdm845_nrt_pri_lvl, 71225fdd593SJeykumar Sankaran }, 71325fdd593SJeykumar Sankaran .memtype_count = 14, 71425fdd593SJeykumar Sankaran .memtype = {3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3}, 71525fdd593SJeykumar Sankaran }, 71625fdd593SJeykumar Sankaran }; 71725fdd593SJeykumar Sankaran 718abda0d92SStephen Boyd static const struct dpu_reg_dma_cfg sdm845_regdma = { 71925fdd593SJeykumar Sankaran .base = 0x0, .version = 0x1, .trigger_sel_off = 0x119c 72025fdd593SJeykumar Sankaran }; 72125fdd593SJeykumar Sankaran 722386fced3SJonathan Marek static const struct dpu_reg_dma_cfg sm8150_regdma = { 723386fced3SJonathan Marek .base = 0x0, .version = 0x00010001, .trigger_sel_off = 0x119c 724386fced3SJonathan Marek }; 725386fced3SJonathan Marek 726af776a3eSJonathan Marek static const struct dpu_reg_dma_cfg sm8250_regdma = { 727af776a3eSJonathan Marek .base = 0x0, 728af776a3eSJonathan Marek .version = 0x00010002, 729af776a3eSJonathan Marek .trigger_sel_off = 0x119c, 730af776a3eSJonathan Marek .xin_id = 7, 731af776a3eSJonathan Marek .clk_ctrl = DPU_CLK_CTRL_REG_DMA, 732af776a3eSJonathan Marek }; 733af776a3eSJonathan Marek 73425fdd593SJeykumar Sankaran /************************************************************* 73525fdd593SJeykumar Sankaran * PERF data config 73625fdd593SJeykumar Sankaran *************************************************************/ 73725fdd593SJeykumar Sankaran 73825fdd593SJeykumar Sankaran /* SSPP QOS LUTs */ 739abda0d92SStephen Boyd static const struct dpu_qos_lut_entry sdm845_qos_linear[] = { 74025fdd593SJeykumar Sankaran {.fl = 4, .lut = 0x357}, 74125fdd593SJeykumar Sankaran {.fl = 5, .lut = 0x3357}, 74225fdd593SJeykumar Sankaran {.fl = 6, .lut = 0x23357}, 74325fdd593SJeykumar Sankaran {.fl = 7, .lut = 0x223357}, 74425fdd593SJeykumar Sankaran {.fl = 8, .lut = 0x2223357}, 74525fdd593SJeykumar Sankaran {.fl = 9, .lut = 0x22223357}, 74625fdd593SJeykumar Sankaran {.fl = 10, .lut = 0x222223357}, 74725fdd593SJeykumar Sankaran {.fl = 11, .lut = 0x2222223357}, 74825fdd593SJeykumar Sankaran {.fl = 12, .lut = 0x22222223357}, 74925fdd593SJeykumar Sankaran {.fl = 13, .lut = 0x222222223357}, 75025fdd593SJeykumar Sankaran {.fl = 14, .lut = 0x1222222223357}, 75125fdd593SJeykumar Sankaran {.fl = 0, .lut = 0x11222222223357} 75225fdd593SJeykumar Sankaran }; 75325fdd593SJeykumar Sankaran 7547bdc0c4bSKalyan Thota static const struct dpu_qos_lut_entry sc7180_qos_linear[] = { 7557bdc0c4bSKalyan Thota {.fl = 0, .lut = 0x0011222222335777}, 7567bdc0c4bSKalyan Thota }; 7577bdc0c4bSKalyan Thota 758386fced3SJonathan Marek static const struct dpu_qos_lut_entry sm8150_qos_linear[] = { 759386fced3SJonathan Marek {.fl = 0, .lut = 0x0011222222223357 }, 760386fced3SJonathan Marek }; 761386fced3SJonathan Marek 762abda0d92SStephen Boyd static const struct dpu_qos_lut_entry sdm845_qos_macrotile[] = { 76325fdd593SJeykumar Sankaran {.fl = 10, .lut = 0x344556677}, 76425fdd593SJeykumar Sankaran {.fl = 11, .lut = 0x3344556677}, 76525fdd593SJeykumar Sankaran {.fl = 12, .lut = 0x23344556677}, 76625fdd593SJeykumar Sankaran {.fl = 13, .lut = 0x223344556677}, 76725fdd593SJeykumar Sankaran {.fl = 14, .lut = 0x1223344556677}, 76825fdd593SJeykumar Sankaran {.fl = 0, .lut = 0x112233344556677}, 76925fdd593SJeykumar Sankaran }; 77025fdd593SJeykumar Sankaran 7717bdc0c4bSKalyan Thota static const struct dpu_qos_lut_entry sc7180_qos_macrotile[] = { 7727bdc0c4bSKalyan Thota {.fl = 0, .lut = 0x0011223344556677}, 7737bdc0c4bSKalyan Thota }; 7747bdc0c4bSKalyan Thota 775abda0d92SStephen Boyd static const struct dpu_qos_lut_entry sdm845_qos_nrt[] = { 77625fdd593SJeykumar Sankaran {.fl = 0, .lut = 0x0}, 77725fdd593SJeykumar Sankaran }; 77825fdd593SJeykumar Sankaran 7797bdc0c4bSKalyan Thota static const struct dpu_qos_lut_entry sc7180_qos_nrt[] = { 7807bdc0c4bSKalyan Thota {.fl = 0, .lut = 0x0}, 7817bdc0c4bSKalyan Thota }; 7827bdc0c4bSKalyan Thota 783abda0d92SStephen Boyd static const struct dpu_perf_cfg sdm845_perf_data = { 78425fdd593SJeykumar Sankaran .max_bw_low = 6800000, 78525fdd593SJeykumar Sankaran .max_bw_high = 6800000, 78625fdd593SJeykumar Sankaran .min_core_ib = 2400000, 78725fdd593SJeykumar Sankaran .min_llcc_ib = 800000, 78825fdd593SJeykumar Sankaran .min_dram_ib = 800000, 78925fdd593SJeykumar Sankaran .core_ib_ff = "6.0", 79025fdd593SJeykumar Sankaran .core_clk_ff = "1.0", 79125fdd593SJeykumar Sankaran .comp_ratio_rt = 79225fdd593SJeykumar Sankaran "NV12/5/1/1.23 AB24/5/1/1.23 XB24/5/1/1.23", 79325fdd593SJeykumar Sankaran .comp_ratio_nrt = 79425fdd593SJeykumar Sankaran "NV12/5/1/1.25 AB24/5/1/1.25 XB24/5/1/1.25", 79525fdd593SJeykumar Sankaran .undersized_prefill_lines = 2, 79625fdd593SJeykumar Sankaran .xtra_prefill_lines = 2, 79725fdd593SJeykumar Sankaran .dest_scale_prefill_lines = 3, 79825fdd593SJeykumar Sankaran .macrotile_prefill_lines = 4, 79925fdd593SJeykumar Sankaran .yuv_nv12_prefill_lines = 8, 80025fdd593SJeykumar Sankaran .linear_prefill_lines = 1, 80125fdd593SJeykumar Sankaran .downscaling_prefill_lines = 1, 80225fdd593SJeykumar Sankaran .amortizable_threshold = 25, 80325fdd593SJeykumar Sankaran .min_prefill_lines = 24, 80425fdd593SJeykumar Sankaran .danger_lut_tbl = {0xf, 0xffff, 0x0}, 80525fdd593SJeykumar Sankaran .qos_lut_tbl = { 80625fdd593SJeykumar Sankaran {.nentry = ARRAY_SIZE(sdm845_qos_linear), 80725fdd593SJeykumar Sankaran .entries = sdm845_qos_linear 80825fdd593SJeykumar Sankaran }, 80925fdd593SJeykumar Sankaran {.nentry = ARRAY_SIZE(sdm845_qos_macrotile), 81025fdd593SJeykumar Sankaran .entries = sdm845_qos_macrotile 81125fdd593SJeykumar Sankaran }, 81225fdd593SJeykumar Sankaran {.nentry = ARRAY_SIZE(sdm845_qos_nrt), 81325fdd593SJeykumar Sankaran .entries = sdm845_qos_nrt 81425fdd593SJeykumar Sankaran }, 81525fdd593SJeykumar Sankaran }, 81625fdd593SJeykumar Sankaran .cdp_cfg = { 81725fdd593SJeykumar Sankaran {.rd_enable = 1, .wr_enable = 1}, 81825fdd593SJeykumar Sankaran {.rd_enable = 1, .wr_enable = 0} 81925fdd593SJeykumar Sankaran }, 820*4f2c9838SDmitry Baryshkov .clk_inefficiency_factor = 105, 821*4f2c9838SDmitry Baryshkov .bw_inefficiency_factor = 120, 82225fdd593SJeykumar Sankaran }; 82325fdd593SJeykumar Sankaran 8247bdc0c4bSKalyan Thota static const struct dpu_perf_cfg sc7180_perf_data = { 82571dc6c08SKrishna Manikandan .max_bw_low = 6800000, 82671dc6c08SKrishna Manikandan .max_bw_high = 6800000, 8277bdc0c4bSKalyan Thota .min_core_ib = 2400000, 8287bdc0c4bSKalyan Thota .min_llcc_ib = 800000, 829c33b7c03SKalyan Thota .min_dram_ib = 1600000, 830c33b7c03SKalyan Thota .min_prefill_lines = 24, 8317bdc0c4bSKalyan Thota .danger_lut_tbl = {0xff, 0xffff, 0x0}, 8327bdc0c4bSKalyan Thota .qos_lut_tbl = { 8337bdc0c4bSKalyan Thota {.nentry = ARRAY_SIZE(sc7180_qos_linear), 8347bdc0c4bSKalyan Thota .entries = sc7180_qos_linear 8357bdc0c4bSKalyan Thota }, 8367bdc0c4bSKalyan Thota {.nentry = ARRAY_SIZE(sc7180_qos_macrotile), 8377bdc0c4bSKalyan Thota .entries = sc7180_qos_macrotile 8387bdc0c4bSKalyan Thota }, 8397bdc0c4bSKalyan Thota {.nentry = ARRAY_SIZE(sc7180_qos_nrt), 8407bdc0c4bSKalyan Thota .entries = sc7180_qos_nrt 8417bdc0c4bSKalyan Thota }, 8427bdc0c4bSKalyan Thota }, 8437bdc0c4bSKalyan Thota .cdp_cfg = { 8447bdc0c4bSKalyan Thota {.rd_enable = 1, .wr_enable = 1}, 8457bdc0c4bSKalyan Thota {.rd_enable = 1, .wr_enable = 0} 8467bdc0c4bSKalyan Thota }, 847c33b7c03SKalyan Thota .clk_inefficiency_factor = 105, 848c33b7c03SKalyan Thota .bw_inefficiency_factor = 120, 8497bdc0c4bSKalyan Thota }; 8507bdc0c4bSKalyan Thota 851386fced3SJonathan Marek static const struct dpu_perf_cfg sm8150_perf_data = { 852386fced3SJonathan Marek .max_bw_low = 12800000, 853386fced3SJonathan Marek .max_bw_high = 12800000, 854386fced3SJonathan Marek .min_core_ib = 2400000, 855386fced3SJonathan Marek .min_llcc_ib = 800000, 856386fced3SJonathan Marek .min_dram_ib = 800000, 857*4f2c9838SDmitry Baryshkov .min_prefill_lines = 24, 858386fced3SJonathan Marek .danger_lut_tbl = {0xf, 0xffff, 0x0}, 859386fced3SJonathan Marek .qos_lut_tbl = { 860386fced3SJonathan Marek {.nentry = ARRAY_SIZE(sm8150_qos_linear), 861386fced3SJonathan Marek .entries = sm8150_qos_linear 862386fced3SJonathan Marek }, 863386fced3SJonathan Marek {.nentry = ARRAY_SIZE(sc7180_qos_macrotile), 864386fced3SJonathan Marek .entries = sc7180_qos_macrotile 865386fced3SJonathan Marek }, 866386fced3SJonathan Marek {.nentry = ARRAY_SIZE(sc7180_qos_nrt), 867386fced3SJonathan Marek .entries = sc7180_qos_nrt 868386fced3SJonathan Marek }, 869386fced3SJonathan Marek /* TODO: macrotile-qseed is different from macrotile */ 870386fced3SJonathan Marek }, 871386fced3SJonathan Marek .cdp_cfg = { 872386fced3SJonathan Marek {.rd_enable = 1, .wr_enable = 1}, 873386fced3SJonathan Marek {.rd_enable = 1, .wr_enable = 0} 874386fced3SJonathan Marek }, 875*4f2c9838SDmitry Baryshkov .clk_inefficiency_factor = 105, 876*4f2c9838SDmitry Baryshkov .bw_inefficiency_factor = 120, 877386fced3SJonathan Marek }; 878386fced3SJonathan Marek 879af776a3eSJonathan Marek static const struct dpu_perf_cfg sm8250_perf_data = { 880af776a3eSJonathan Marek .max_bw_low = 13700000, 881af776a3eSJonathan Marek .max_bw_high = 16600000, 882af776a3eSJonathan Marek .min_core_ib = 4800000, 883af776a3eSJonathan Marek .min_llcc_ib = 0, 884af776a3eSJonathan Marek .min_dram_ib = 800000, 885*4f2c9838SDmitry Baryshkov .min_prefill_lines = 35, 886af776a3eSJonathan Marek .danger_lut_tbl = {0xf, 0xffff, 0x0}, 887af776a3eSJonathan Marek .qos_lut_tbl = { 888af776a3eSJonathan Marek {.nentry = ARRAY_SIZE(sc7180_qos_linear), 889af776a3eSJonathan Marek .entries = sc7180_qos_linear 890af776a3eSJonathan Marek }, 891af776a3eSJonathan Marek {.nentry = ARRAY_SIZE(sc7180_qos_macrotile), 892af776a3eSJonathan Marek .entries = sc7180_qos_macrotile 893af776a3eSJonathan Marek }, 894af776a3eSJonathan Marek {.nentry = ARRAY_SIZE(sc7180_qos_nrt), 895af776a3eSJonathan Marek .entries = sc7180_qos_nrt 896af776a3eSJonathan Marek }, 897af776a3eSJonathan Marek /* TODO: macrotile-qseed is different from macrotile */ 898af776a3eSJonathan Marek }, 899af776a3eSJonathan Marek .cdp_cfg = { 900af776a3eSJonathan Marek {.rd_enable = 1, .wr_enable = 1}, 901af776a3eSJonathan Marek {.rd_enable = 1, .wr_enable = 0} 902af776a3eSJonathan Marek }, 903*4f2c9838SDmitry Baryshkov .clk_inefficiency_factor = 105, 904*4f2c9838SDmitry Baryshkov .bw_inefficiency_factor = 120, 905af776a3eSJonathan Marek }; 906af776a3eSJonathan Marek 90725fdd593SJeykumar Sankaran /************************************************************* 90825fdd593SJeykumar Sankaran * Hardware catalog init 90925fdd593SJeykumar Sankaran *************************************************************/ 91025fdd593SJeykumar Sankaran 91125fdd593SJeykumar Sankaran /* 91225fdd593SJeykumar Sankaran * sdm845_cfg_init(): populate sdm845 dpu sub-blocks reg offsets 91325fdd593SJeykumar Sankaran * and instance counts. 91425fdd593SJeykumar Sankaran */ 915fba33caeSJordan Crouse static void sdm845_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 91625fdd593SJeykumar Sankaran { 91725fdd593SJeykumar Sankaran *dpu_cfg = (struct dpu_mdss_cfg){ 91825fdd593SJeykumar Sankaran .caps = &sdm845_dpu_caps, 91925fdd593SJeykumar Sankaran .mdp_count = ARRAY_SIZE(sdm845_mdp), 92025fdd593SJeykumar Sankaran .mdp = sdm845_mdp, 92125fdd593SJeykumar Sankaran .ctl_count = ARRAY_SIZE(sdm845_ctl), 92225fdd593SJeykumar Sankaran .ctl = sdm845_ctl, 92325fdd593SJeykumar Sankaran .sspp_count = ARRAY_SIZE(sdm845_sspp), 92425fdd593SJeykumar Sankaran .sspp = sdm845_sspp, 92525fdd593SJeykumar Sankaran .mixer_count = ARRAY_SIZE(sdm845_lm), 92625fdd593SJeykumar Sankaran .mixer = sdm845_lm, 92725fdd593SJeykumar Sankaran .pingpong_count = ARRAY_SIZE(sdm845_pp), 92825fdd593SJeykumar Sankaran .pingpong = sdm845_pp, 92925fdd593SJeykumar Sankaran .intf_count = ARRAY_SIZE(sdm845_intf), 93025fdd593SJeykumar Sankaran .intf = sdm845_intf, 93125fdd593SJeykumar Sankaran .vbif_count = ARRAY_SIZE(sdm845_vbif), 93225fdd593SJeykumar Sankaran .vbif = sdm845_vbif, 93325fdd593SJeykumar Sankaran .reg_dma_count = 1, 93425fdd593SJeykumar Sankaran .dma_cfg = sdm845_regdma, 93525fdd593SJeykumar Sankaran .perf = sdm845_perf_data, 9360846cca3SShubhashree Dhar .mdss_irqs = 0x3ff, 93725fdd593SJeykumar Sankaran }; 93825fdd593SJeykumar Sankaran } 93925fdd593SJeykumar Sankaran 9407bdc0c4bSKalyan Thota /* 9417bdc0c4bSKalyan Thota * sc7180_cfg_init(): populate sc7180 dpu sub-blocks reg offsets 9427bdc0c4bSKalyan Thota * and instance counts. 9437bdc0c4bSKalyan Thota */ 9447bdc0c4bSKalyan Thota static void sc7180_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 9457bdc0c4bSKalyan Thota { 9467bdc0c4bSKalyan Thota *dpu_cfg = (struct dpu_mdss_cfg){ 9477bdc0c4bSKalyan Thota .caps = &sc7180_dpu_caps, 9487bdc0c4bSKalyan Thota .mdp_count = ARRAY_SIZE(sc7180_mdp), 9497bdc0c4bSKalyan Thota .mdp = sc7180_mdp, 9507bdc0c4bSKalyan Thota .ctl_count = ARRAY_SIZE(sc7180_ctl), 9517bdc0c4bSKalyan Thota .ctl = sc7180_ctl, 9527bdc0c4bSKalyan Thota .sspp_count = ARRAY_SIZE(sc7180_sspp), 9537bdc0c4bSKalyan Thota .sspp = sc7180_sspp, 9547bdc0c4bSKalyan Thota .mixer_count = ARRAY_SIZE(sc7180_lm), 9557bdc0c4bSKalyan Thota .mixer = sc7180_lm, 956e47616dfSKalyan Thota .dspp_count = ARRAY_SIZE(sc7180_dspp), 957e47616dfSKalyan Thota .dspp = sc7180_dspp, 9587bdc0c4bSKalyan Thota .pingpong_count = ARRAY_SIZE(sc7180_pp), 9597bdc0c4bSKalyan Thota .pingpong = sc7180_pp, 9607bdc0c4bSKalyan Thota .intf_count = ARRAY_SIZE(sc7180_intf), 9617bdc0c4bSKalyan Thota .intf = sc7180_intf, 9627bdc0c4bSKalyan Thota .vbif_count = ARRAY_SIZE(sdm845_vbif), 9637bdc0c4bSKalyan Thota .vbif = sdm845_vbif, 9647bdc0c4bSKalyan Thota .reg_dma_count = 1, 9657bdc0c4bSKalyan Thota .dma_cfg = sdm845_regdma, 9667bdc0c4bSKalyan Thota .perf = sc7180_perf_data, 9677bdc0c4bSKalyan Thota .mdss_irqs = 0x3f, 9687bdc0c4bSKalyan Thota }; 9697bdc0c4bSKalyan Thota } 9707bdc0c4bSKalyan Thota 971386fced3SJonathan Marek /* 972386fced3SJonathan Marek * sm8150_cfg_init(): populate sm8150 dpu sub-blocks reg offsets 973386fced3SJonathan Marek * and instance counts. 974386fced3SJonathan Marek */ 975386fced3SJonathan Marek static void sm8150_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 976386fced3SJonathan Marek { 977386fced3SJonathan Marek *dpu_cfg = (struct dpu_mdss_cfg){ 978386fced3SJonathan Marek .caps = &sm8150_dpu_caps, 979386fced3SJonathan Marek .mdp_count = ARRAY_SIZE(sdm845_mdp), 980386fced3SJonathan Marek .mdp = sdm845_mdp, 981386fced3SJonathan Marek .ctl_count = ARRAY_SIZE(sm8150_ctl), 982386fced3SJonathan Marek .ctl = sm8150_ctl, 983386fced3SJonathan Marek .sspp_count = ARRAY_SIZE(sdm845_sspp), 984386fced3SJonathan Marek .sspp = sdm845_sspp, 985386fced3SJonathan Marek .mixer_count = ARRAY_SIZE(sm8150_lm), 986386fced3SJonathan Marek .mixer = sm8150_lm, 98705ae91d9SDmitry Baryshkov .dspp_count = ARRAY_SIZE(sm8150_dspp), 98805ae91d9SDmitry Baryshkov .dspp = sm8150_dspp, 989386fced3SJonathan Marek .pingpong_count = ARRAY_SIZE(sm8150_pp), 990386fced3SJonathan Marek .pingpong = sm8150_pp, 9914369c93cSDmitry Baryshkov .merge_3d_count = ARRAY_SIZE(sm8150_merge_3d), 9924369c93cSDmitry Baryshkov .merge_3d = sm8150_merge_3d, 993386fced3SJonathan Marek .intf_count = ARRAY_SIZE(sm8150_intf), 994386fced3SJonathan Marek .intf = sm8150_intf, 995386fced3SJonathan Marek .vbif_count = ARRAY_SIZE(sdm845_vbif), 996386fced3SJonathan Marek .vbif = sdm845_vbif, 997386fced3SJonathan Marek .reg_dma_count = 1, 998386fced3SJonathan Marek .dma_cfg = sm8150_regdma, 999386fced3SJonathan Marek .perf = sm8150_perf_data, 1000386fced3SJonathan Marek .mdss_irqs = 0x3ff, 1001386fced3SJonathan Marek }; 1002386fced3SJonathan Marek } 1003386fced3SJonathan Marek 1004af776a3eSJonathan Marek /* 1005af776a3eSJonathan Marek * sm8250_cfg_init(): populate sm8250 dpu sub-blocks reg offsets 1006af776a3eSJonathan Marek * and instance counts. 1007af776a3eSJonathan Marek */ 1008af776a3eSJonathan Marek static void sm8250_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 1009af776a3eSJonathan Marek { 1010af776a3eSJonathan Marek *dpu_cfg = (struct dpu_mdss_cfg){ 1011af776a3eSJonathan Marek .caps = &sm8250_dpu_caps, 1012af776a3eSJonathan Marek .mdp_count = ARRAY_SIZE(sm8250_mdp), 1013af776a3eSJonathan Marek .mdp = sm8250_mdp, 1014af776a3eSJonathan Marek .ctl_count = ARRAY_SIZE(sm8150_ctl), 1015af776a3eSJonathan Marek .ctl = sm8150_ctl, 1016d21fc5dfSDmitry Baryshkov .sspp_count = ARRAY_SIZE(sm8250_sspp), 1017d21fc5dfSDmitry Baryshkov .sspp = sm8250_sspp, 1018af776a3eSJonathan Marek .mixer_count = ARRAY_SIZE(sm8150_lm), 1019af776a3eSJonathan Marek .mixer = sm8150_lm, 102005ae91d9SDmitry Baryshkov .dspp_count = ARRAY_SIZE(sm8150_dspp), 102105ae91d9SDmitry Baryshkov .dspp = sm8150_dspp, 1022af776a3eSJonathan Marek .pingpong_count = ARRAY_SIZE(sm8150_pp), 1023af776a3eSJonathan Marek .pingpong = sm8150_pp, 10244369c93cSDmitry Baryshkov .merge_3d_count = ARRAY_SIZE(sm8150_merge_3d), 10254369c93cSDmitry Baryshkov .merge_3d = sm8150_merge_3d, 1026af776a3eSJonathan Marek .intf_count = ARRAY_SIZE(sm8150_intf), 1027af776a3eSJonathan Marek .intf = sm8150_intf, 1028af776a3eSJonathan Marek .vbif_count = ARRAY_SIZE(sdm845_vbif), 1029af776a3eSJonathan Marek .vbif = sdm845_vbif, 1030af776a3eSJonathan Marek .reg_dma_count = 1, 1031af776a3eSJonathan Marek .dma_cfg = sm8250_regdma, 1032af776a3eSJonathan Marek .perf = sm8250_perf_data, 1033af776a3eSJonathan Marek .mdss_irqs = 0xff, 1034af776a3eSJonathan Marek }; 1035af776a3eSJonathan Marek } 1036af776a3eSJonathan Marek 1037abda0d92SStephen Boyd static const struct dpu_mdss_hw_cfg_handler cfg_handler[] = { 103825fdd593SJeykumar Sankaran { .hw_rev = DPU_HW_VER_400, .cfg_init = sdm845_cfg_init}, 103925fdd593SJeykumar Sankaran { .hw_rev = DPU_HW_VER_401, .cfg_init = sdm845_cfg_init}, 1040386fced3SJonathan Marek { .hw_rev = DPU_HW_VER_500, .cfg_init = sm8150_cfg_init}, 1041386fced3SJonathan Marek { .hw_rev = DPU_HW_VER_501, .cfg_init = sm8150_cfg_init}, 1042af776a3eSJonathan Marek { .hw_rev = DPU_HW_VER_600, .cfg_init = sm8250_cfg_init}, 10437bdc0c4bSKalyan Thota { .hw_rev = DPU_HW_VER_620, .cfg_init = sc7180_cfg_init}, 104425fdd593SJeykumar Sankaran }; 104525fdd593SJeykumar Sankaran 104625fdd593SJeykumar Sankaran void dpu_hw_catalog_deinit(struct dpu_mdss_cfg *dpu_cfg) 104725fdd593SJeykumar Sankaran { 104825fdd593SJeykumar Sankaran kfree(dpu_cfg); 104925fdd593SJeykumar Sankaran } 105025fdd593SJeykumar Sankaran 105125fdd593SJeykumar Sankaran struct dpu_mdss_cfg *dpu_hw_catalog_init(u32 hw_rev) 105225fdd593SJeykumar Sankaran { 105325fdd593SJeykumar Sankaran int i; 105425fdd593SJeykumar Sankaran struct dpu_mdss_cfg *dpu_cfg; 105525fdd593SJeykumar Sankaran 105625fdd593SJeykumar Sankaran dpu_cfg = kzalloc(sizeof(*dpu_cfg), GFP_KERNEL); 105725fdd593SJeykumar Sankaran if (!dpu_cfg) 105825fdd593SJeykumar Sankaran return ERR_PTR(-ENOMEM); 105925fdd593SJeykumar Sankaran 106025fdd593SJeykumar Sankaran for (i = 0; i < ARRAY_SIZE(cfg_handler); i++) { 106125fdd593SJeykumar Sankaran if (cfg_handler[i].hw_rev == hw_rev) { 106225fdd593SJeykumar Sankaran cfg_handler[i].cfg_init(dpu_cfg); 106325fdd593SJeykumar Sankaran dpu_cfg->hwversion = hw_rev; 106425fdd593SJeykumar Sankaran return dpu_cfg; 106525fdd593SJeykumar Sankaran } 106625fdd593SJeykumar Sankaran } 106725fdd593SJeykumar Sankaran 106825fdd593SJeykumar Sankaran DPU_ERROR("unsupported chipset id:%X\n", hw_rev); 106925fdd593SJeykumar Sankaran dpu_hw_catalog_deinit(dpu_cfg); 107025fdd593SJeykumar Sankaran return ERR_PTR(-ENODEV); 107125fdd593SJeykumar Sankaran } 107225fdd593SJeykumar Sankaran 1073