1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 4 * Copyright (C) 2013 Red Hat 5 * Author: Rob Clark <robdclark@gmail.com> 6 */ 7 8 #ifndef __DPU_ENCODER_H__ 9 #define __DPU_ENCODER_H__ 10 11 #include <drm/drm_crtc.h> 12 #include "dpu_hw_mdss.h" 13 14 #define DPU_ENCODER_FRAME_EVENT_DONE BIT(0) 15 #define DPU_ENCODER_FRAME_EVENT_ERROR BIT(1) 16 #define DPU_ENCODER_FRAME_EVENT_PANEL_DEAD BIT(2) 17 #define DPU_ENCODER_FRAME_EVENT_IDLE BIT(3) 18 19 #define IDLE_TIMEOUT (66 - 16/2) 20 21 /** 22 * struct msm_display_info - defines display properties 23 * @intf_type: DRM_MODE_ENCODER_ type 24 * @capabilities: Bitmask of display flags 25 * @num_of_h_tiles: Number of horizontal tiles in case of split interface 26 * @h_tile_instance: Controller instance used per tile. Number of elements is 27 * based on num_of_h_tiles 28 * @is_te_using_watchdog_timer: Boolean to indicate watchdog TE is 29 * used instead of panel TE in cmd mode panels 30 * @dsc: DSC configuration data for DSC-enabled displays 31 */ 32 struct msm_display_info { 33 int intf_type; 34 uint32_t capabilities; 35 uint32_t num_of_h_tiles; 36 uint32_t h_tile_instance[MAX_H_TILES_PER_DISPLAY]; 37 bool is_te_using_watchdog_timer; 38 struct msm_display_dsc_config *dsc; 39 }; 40 41 /** 42 * dpu_encoder_assign_crtc - Link the encoder to the crtc it's assigned to 43 * @encoder: encoder pointer 44 * @crtc: crtc pointer 45 */ 46 void dpu_encoder_assign_crtc(struct drm_encoder *encoder, 47 struct drm_crtc *crtc); 48 49 /** 50 * dpu_encoder_toggle_vblank_for_crtc - Toggles vblank interrupts on or off if 51 * the encoder is assigned to the given crtc 52 * @encoder: encoder pointer 53 * @crtc: crtc pointer 54 * @enable: true if vblank should be enabled 55 */ 56 void dpu_encoder_toggle_vblank_for_crtc(struct drm_encoder *encoder, 57 struct drm_crtc *crtc, bool enable); 58 59 /** 60 * dpu_encoder_register_frame_event_callback - provide callback to encoder that 61 * will be called after the request is complete, or other events. 62 * @encoder: encoder pointer 63 * @cb: callback pointer, provide NULL to deregister 64 * @data: user data provided to callback 65 */ 66 void dpu_encoder_register_frame_event_callback(struct drm_encoder *encoder, 67 void (*cb)(void *, u32), void *data); 68 69 /** 70 * dpu_encoder_prepare_for_kickoff - schedule double buffer flip of the ctl 71 * path (i.e. ctl flush and start) at next appropriate time. 72 * Immediately: if no previous commit is outstanding. 73 * Delayed: Block until next trigger can be issued. 74 * @encoder: encoder pointer 75 */ 76 void dpu_encoder_prepare_for_kickoff(struct drm_encoder *encoder); 77 78 /** 79 * dpu_encoder_trigger_kickoff_pending - Clear the flush bits from previous 80 * kickoff and trigger the ctl prepare progress for command mode display. 81 * @encoder: encoder pointer 82 */ 83 void dpu_encoder_trigger_kickoff_pending(struct drm_encoder *encoder); 84 85 /** 86 * dpu_encoder_kickoff - trigger a double buffer flip of the ctl path 87 * (i.e. ctl flush and start) immediately. 88 * @encoder: encoder pointer 89 */ 90 void dpu_encoder_kickoff(struct drm_encoder *encoder); 91 92 /** 93 * dpu_encoder_wakeup_time - get the time of the next vsync 94 */ 95 int dpu_encoder_vsync_time(struct drm_encoder *drm_enc, ktime_t *wakeup_time); 96 97 /** 98 * dpu_encoder_wait_for_event - Waits for encoder events 99 * @encoder: encoder pointer 100 * @event: event to wait for 101 * MSM_ENC_COMMIT_DONE - Wait for hardware to have flushed the current pending 102 * frames to hardware at a vblank or ctl_start 103 * Encoders will map this differently depending on the 104 * panel type. 105 * vid mode -> vsync_irq 106 * cmd mode -> ctl_start 107 * MSM_ENC_TX_COMPLETE - Wait for the hardware to transfer all the pixels to 108 * the panel. Encoders will map this differently 109 * depending on the panel type. 110 * vid mode -> vsync_irq 111 * cmd mode -> pp_done 112 * Returns: 0 on success, -EWOULDBLOCK if already signaled, error otherwise 113 */ 114 int dpu_encoder_wait_for_event(struct drm_encoder *drm_encoder, 115 enum msm_event_wait event); 116 117 /* 118 * dpu_encoder_get_intf_mode - get interface mode of the given encoder 119 * @encoder: Pointer to drm encoder object 120 */ 121 enum dpu_intf_mode dpu_encoder_get_intf_mode(struct drm_encoder *encoder); 122 123 /** 124 * dpu_encoder_virt_runtime_resume - pm runtime resume the encoder configs 125 * @encoder: encoder pointer 126 */ 127 void dpu_encoder_virt_runtime_resume(struct drm_encoder *encoder); 128 129 /** 130 * dpu_encoder_init - initialize virtual encoder object 131 * @dev: Pointer to drm device structure 132 * @disp_info: Pointer to display information structure 133 * Returns: Pointer to newly created drm encoder 134 */ 135 struct drm_encoder *dpu_encoder_init( 136 struct drm_device *dev, 137 int drm_enc_mode); 138 139 /** 140 * dpu_encoder_setup - setup dpu_encoder for the display probed 141 * @dev: Pointer to drm device structure 142 * @enc: Pointer to the drm_encoder 143 * @disp_info: Pointer to the display info 144 */ 145 int dpu_encoder_setup(struct drm_device *dev, struct drm_encoder *enc, 146 struct msm_display_info *disp_info); 147 148 /** 149 * dpu_encoder_prepare_commit - prepare encoder at the very beginning of an 150 * atomic commit, before any registers are written 151 * @drm_enc: Pointer to previously created drm encoder structure 152 */ 153 void dpu_encoder_prepare_commit(struct drm_encoder *drm_enc); 154 155 /** 156 * dpu_encoder_set_idle_timeout - set the idle timeout for video 157 * and command mode encoders. 158 * @drm_enc: Pointer to previously created drm encoder structure 159 * @idle_timeout: idle timeout duration in milliseconds 160 */ 161 void dpu_encoder_set_idle_timeout(struct drm_encoder *drm_enc, 162 u32 idle_timeout); 163 /** 164 * dpu_encoder_get_linecount - get interface line count for the encoder. 165 * @drm_enc: Pointer to previously created drm encoder structure 166 */ 167 int dpu_encoder_get_linecount(struct drm_encoder *drm_enc); 168 169 /** 170 * dpu_encoder_get_vsync_count - get vsync count for the encoder. 171 * @drm_enc: Pointer to previously created drm encoder structure 172 */ 173 int dpu_encoder_get_vsync_count(struct drm_encoder *drm_enc); 174 175 bool dpu_encoder_is_widebus_enabled(const struct drm_encoder *drm_enc); 176 177 /** 178 * dpu_encoder_use_dsc_merge - returns true if the encoder uses DSC merge topology. 179 * @drm_enc: Pointer to previously created drm encoder structure 180 */ 181 bool dpu_encoder_use_dsc_merge(struct drm_encoder *drm_enc); 182 183 /** 184 * dpu_encoder_prepare_wb_job - prepare writeback job for the encoder. 185 * @drm_enc: Pointer to previously created drm encoder structure 186 * @job: Pointer to the current drm writeback job 187 */ 188 void dpu_encoder_prepare_wb_job(struct drm_encoder *drm_enc, 189 struct drm_writeback_job *job); 190 191 /** 192 * dpu_encoder_cleanup_wb_job - cleanup writeback job for the encoder. 193 * @drm_enc: Pointer to previously created drm encoder structure 194 * @job: Pointer to the current drm writeback job 195 */ 196 void dpu_encoder_cleanup_wb_job(struct drm_encoder *drm_enc, 197 struct drm_writeback_job *job); 198 199 /** 200 * dpu_encoder_is_valid_for_commit - check if encode has valid parameters for commit. 201 * @drm_enc: Pointer to drm encoder structure 202 */ 203 bool dpu_encoder_is_valid_for_commit(struct drm_encoder *drm_enc); 204 205 #endif /* __DPU_ENCODER_H__ */ 206