1 /*
2  * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
3  * Copyright (C) 2013 Red Hat
4  * Author: Rob Clark <robdclark@gmail.com>
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms of the GNU General Public License version 2 as published by
8  * the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along with
16  * this program.  If not, see <http://www.gnu.org/licenses/>.
17  */
18 
19 #ifndef __DPU_ENCODER_H__
20 #define __DPU_ENCODER_H__
21 
22 #include <drm/drm_crtc.h>
23 #include "dpu_hw_mdss.h"
24 
25 #define DPU_ENCODER_FRAME_EVENT_DONE			BIT(0)
26 #define DPU_ENCODER_FRAME_EVENT_ERROR			BIT(1)
27 #define DPU_ENCODER_FRAME_EVENT_PANEL_DEAD		BIT(2)
28 #define DPU_ENCODER_FRAME_EVENT_IDLE			BIT(3)
29 
30 #define IDLE_TIMEOUT	(66 - 16/2)
31 
32 /**
33  * Encoder functions and data types
34  * @intfs:	Interfaces this encoder is using, INTF_MODE_NONE if unused
35  * @needs_cdm:	Encoder requests a CDM based on pixel format conversion needs
36  * @display_num_of_h_tiles: Number of horizontal tiles in case of split
37  *                          interface
38  * @topology:   Topology of the display
39  */
40 struct dpu_encoder_hw_resources {
41 	enum dpu_intf_mode intfs[INTF_MAX];
42 	bool needs_cdm;
43 	u32 display_num_of_h_tiles;
44 };
45 
46 /**
47  * dpu_encoder_kickoff_params - info encoder requires at kickoff
48  * @affected_displays:  bitmask, bit set means the ROI of the commit lies within
49  *                      the bounds of the physical display at the bit index
50  */
51 struct dpu_encoder_kickoff_params {
52 	unsigned long affected_displays;
53 };
54 
55 /**
56  * dpu_encoder_get_hw_resources - Populate table of required hardware resources
57  * @encoder:	encoder pointer
58  * @hw_res:	resource table to populate with encoder required resources
59  * @conn_state:	report hw reqs based on this proposed connector state
60  */
61 void dpu_encoder_get_hw_resources(struct drm_encoder *encoder,
62 		struct dpu_encoder_hw_resources *hw_res,
63 		struct drm_connector_state *conn_state);
64 
65 /**
66  * dpu_encoder_register_vblank_callback - provide callback to encoder that
67  *	will be called on the next vblank.
68  * @encoder:	encoder pointer
69  * @cb:		callback pointer, provide NULL to deregister and disable IRQs
70  * @data:	user data provided to callback
71  */
72 void dpu_encoder_register_vblank_callback(struct drm_encoder *encoder,
73 		void (*cb)(void *), void *data);
74 
75 /**
76  * dpu_encoder_register_frame_event_callback - provide callback to encoder that
77  *	will be called after the request is complete, or other events.
78  * @encoder:	encoder pointer
79  * @cb:		callback pointer, provide NULL to deregister
80  * @data:	user data provided to callback
81  */
82 void dpu_encoder_register_frame_event_callback(struct drm_encoder *encoder,
83 		void (*cb)(void *, u32), void *data);
84 
85 /**
86  * dpu_encoder_prepare_for_kickoff - schedule double buffer flip of the ctl
87  *	path (i.e. ctl flush and start) at next appropriate time.
88  *	Immediately: if no previous commit is outstanding.
89  *	Delayed: Block until next trigger can be issued.
90  * @encoder:	encoder pointer
91  * @params:	kickoff time parameters
92  */
93 void dpu_encoder_prepare_for_kickoff(struct drm_encoder *encoder,
94 		struct dpu_encoder_kickoff_params *params);
95 
96 /**
97  * dpu_encoder_trigger_kickoff_pending - Clear the flush bits from previous
98  *        kickoff and trigger the ctl prepare progress for command mode display.
99  * @encoder:	encoder pointer
100  */
101 void dpu_encoder_trigger_kickoff_pending(struct drm_encoder *encoder);
102 
103 /**
104  * dpu_encoder_kickoff - trigger a double buffer flip of the ctl path
105  *	(i.e. ctl flush and start) immediately.
106  * @encoder:	encoder pointer
107  */
108 void dpu_encoder_kickoff(struct drm_encoder *encoder);
109 
110 /**
111  * dpu_encoder_wait_for_event - Waits for encoder events
112  * @encoder:	encoder pointer
113  * @event:      event to wait for
114  * MSM_ENC_COMMIT_DONE -  Wait for hardware to have flushed the current pending
115  *                        frames to hardware at a vblank or ctl_start
116  *                        Encoders will map this differently depending on the
117  *                        panel type.
118  *	                  vid mode -> vsync_irq
119  *                        cmd mode -> ctl_start
120  * MSM_ENC_TX_COMPLETE -  Wait for the hardware to transfer all the pixels to
121  *                        the panel. Encoders will map this differently
122  *                        depending on the panel type.
123  *                        vid mode -> vsync_irq
124  *                        cmd mode -> pp_done
125  * Returns: 0 on success, -EWOULDBLOCK if already signaled, error otherwise
126  */
127 int dpu_encoder_wait_for_event(struct drm_encoder *drm_encoder,
128 						enum msm_event_wait event);
129 
130 /*
131  * dpu_encoder_get_intf_mode - get interface mode of the given encoder
132  * @encoder: Pointer to drm encoder object
133  */
134 enum dpu_intf_mode dpu_encoder_get_intf_mode(struct drm_encoder *encoder);
135 
136 /**
137  * dpu_encoder_virt_restore - restore the encoder configs
138  * @encoder:	encoder pointer
139  */
140 void dpu_encoder_virt_restore(struct drm_encoder *encoder);
141 
142 /**
143  * dpu_encoder_init - initialize virtual encoder object
144  * @dev:        Pointer to drm device structure
145  * @disp_info:  Pointer to display information structure
146  * Returns:     Pointer to newly created drm encoder
147  */
148 struct drm_encoder *dpu_encoder_init(
149 		struct drm_device *dev,
150 		int drm_enc_mode);
151 
152 /**
153  * dpu_encoder_setup - setup dpu_encoder for the display probed
154  * @dev:		Pointer to drm device structure
155  * @enc:		Pointer to the drm_encoder
156  * @disp_info:	Pointer to the display info
157  */
158 int dpu_encoder_setup(struct drm_device *dev, struct drm_encoder *enc,
159 		struct msm_display_info *disp_info);
160 
161 /**
162  * dpu_encoder_prepare_commit - prepare encoder at the very beginning of an
163  *	atomic commit, before any registers are written
164  * @drm_enc:    Pointer to previously created drm encoder structure
165  */
166 void dpu_encoder_prepare_commit(struct drm_encoder *drm_enc);
167 
168 /**
169  * dpu_encoder_set_idle_timeout - set the idle timeout for video
170  *                    and command mode encoders.
171  * @drm_enc:    Pointer to previously created drm encoder structure
172  * @idle_timeout:    idle timeout duration in milliseconds
173  */
174 void dpu_encoder_set_idle_timeout(struct drm_encoder *drm_enc,
175 							u32 idle_timeout);
176 
177 #endif /* __DPU_ENCODER_H__ */
178