1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2015-2018 The Linux Foundation. All rights reserved. 4 * Copyright (C) 2013 Red Hat 5 * Author: Rob Clark <robdclark@gmail.com> 6 */ 7 8 #ifndef _DPU_CRTC_H_ 9 #define _DPU_CRTC_H_ 10 11 #include <linux/kthread.h> 12 #include <drm/drm_crtc.h> 13 #include "dpu_kms.h" 14 #include "dpu_core_perf.h" 15 #include "dpu_hw_blk.h" 16 17 #define DPU_CRTC_NAME_SIZE 12 18 19 /* define the maximum number of in-flight frame events */ 20 #define DPU_CRTC_FRAME_EVENT_SIZE 4 21 22 /** 23 * enum dpu_crtc_client_type: crtc client type 24 * @RT_CLIENT: RealTime client like video/cmd mode display 25 * voting through apps rsc 26 * @NRT_CLIENT: Non-RealTime client like WB display 27 * voting through apps rsc 28 */ 29 enum dpu_crtc_client_type { 30 RT_CLIENT, 31 NRT_CLIENT, 32 }; 33 34 /** 35 * enum dpu_crtc_smmu_state: smmu state 36 * @ATTACHED: all the context banks are attached. 37 * @DETACHED: all the context banks are detached. 38 * @ATTACH_ALL_REQ: transient state of attaching context banks. 39 * @DETACH_ALL_REQ: transient state of detaching context banks. 40 */ 41 enum dpu_crtc_smmu_state { 42 ATTACHED = 0, 43 DETACHED, 44 ATTACH_ALL_REQ, 45 DETACH_ALL_REQ, 46 }; 47 48 /** 49 * enum dpu_crtc_smmu_state_transition_type: state transition type 50 * @NONE: no pending state transitions 51 * @PRE_COMMIT: state transitions should be done before processing the commit 52 * @POST_COMMIT: state transitions to be done after processing the commit. 53 */ 54 enum dpu_crtc_smmu_state_transition_type { 55 NONE, 56 PRE_COMMIT, 57 POST_COMMIT 58 }; 59 60 /** 61 * struct dpu_crtc_smmu_state_data: stores the smmu state and transition type 62 * @state: current state of smmu context banks 63 * @transition_type: transition request type 64 * @transition_error: whether there is error while transitioning the state 65 */ 66 struct dpu_crtc_smmu_state_data { 67 uint32_t state; 68 uint32_t transition_type; 69 uint32_t transition_error; 70 }; 71 72 /** 73 * struct dpu_crtc_mixer: stores the map for each virtual pipeline in the CRTC 74 * @hw_lm: LM HW Driver context 75 * @lm_ctl: CTL Path HW driver context 76 * @lm_dspp: DSPP HW driver context 77 * @mixer_op_mode: mixer blending operation mode 78 * @flush_mask: mixer flush mask for ctl, mixer and pipe 79 */ 80 struct dpu_crtc_mixer { 81 struct dpu_hw_mixer *hw_lm; 82 struct dpu_hw_ctl *lm_ctl; 83 struct dpu_hw_dspp *hw_dspp; 84 u32 mixer_op_mode; 85 u32 flush_mask; 86 }; 87 88 /** 89 * struct dpu_crtc_frame_event: stores crtc frame event for crtc processing 90 * @work: base work structure 91 * @crtc: Pointer to crtc handling this event 92 * @list: event list 93 * @ts: timestamp at queue entry 94 * @event: event identifier 95 */ 96 struct dpu_crtc_frame_event { 97 struct kthread_work work; 98 struct drm_crtc *crtc; 99 struct list_head list; 100 ktime_t ts; 101 u32 event; 102 }; 103 104 /* 105 * Maximum number of free event structures to cache 106 */ 107 #define DPU_CRTC_MAX_EVENT_COUNT 16 108 109 /** 110 * struct dpu_crtc - virtualized CRTC data structure 111 * @base : Base drm crtc structure 112 * @name : ASCII description of this crtc 113 * @event : Pointer to last received drm vblank event. If there is a 114 * pending vblank event, this will be non-null. 115 * @vsync_count : Running count of received vsync events 116 * @drm_requested_vblank : Whether vblanks have been enabled in the encoder 117 * @property_info : Opaque structure for generic property support 118 * @property_defaults : Array of default values for generic property support 119 * @stage_cfg : H/w mixer stage configuration 120 * @debugfs_root : Parent of debugfs node 121 * @vblank_cb_count : count of vblank callback since last reset 122 * @play_count : frame count between crtc enable and disable 123 * @vblank_cb_time : ktime at vblank count reset 124 * @enabled : whether the DPU CRTC is currently enabled. updated in the 125 * commit-thread, not state-swap time which is earlier, so 126 * safe to make decisions on during VBLANK on/off work 127 * @feature_list : list of color processing features supported on a crtc 128 * @active_list : list of color processing features are active 129 * @dirty_list : list of color processing features are dirty 130 * @ad_dirty: list containing ad properties that are dirty 131 * @ad_active: list containing ad properties that are active 132 * @frame_pending : Whether or not an update is pending 133 * @frame_events : static allocation of in-flight frame events 134 * @frame_event_list : available frame event list 135 * @spin_lock : spin lock for frame event, transaction status, etc... 136 * @frame_done_comp : for frame_event_done synchronization 137 * @event_thread : Pointer to event handler thread 138 * @event_worker : Event worker queue 139 * @event_lock : Spinlock around event handling code 140 * @phandle: Pointer to power handler 141 * @cur_perf : current performance committed to clock/bandwidth driver 142 */ 143 struct dpu_crtc { 144 struct drm_crtc base; 145 char name[DPU_CRTC_NAME_SIZE]; 146 147 struct drm_pending_vblank_event *event; 148 u32 vsync_count; 149 150 struct dpu_hw_stage_cfg stage_cfg; 151 struct dentry *debugfs_root; 152 153 u32 vblank_cb_count; 154 u64 play_count; 155 ktime_t vblank_cb_time; 156 bool enabled; 157 158 struct list_head feature_list; 159 struct list_head active_list; 160 struct list_head dirty_list; 161 struct list_head ad_dirty; 162 struct list_head ad_active; 163 164 atomic_t frame_pending; 165 struct dpu_crtc_frame_event frame_events[DPU_CRTC_FRAME_EVENT_SIZE]; 166 struct list_head frame_event_list; 167 spinlock_t spin_lock; 168 struct completion frame_done_comp; 169 170 /* for handling internal event thread */ 171 spinlock_t event_lock; 172 173 struct dpu_core_perf_params cur_perf; 174 175 struct dpu_crtc_smmu_state_data smmu_state; 176 }; 177 178 #define to_dpu_crtc(x) container_of(x, struct dpu_crtc, base) 179 180 /** 181 * struct dpu_crtc_state - dpu container for atomic crtc state 182 * @base: Base drm crtc state structure 183 * @bw_control : true if bw/clk controlled by core bw/clk properties 184 * @bw_split_vote : true if bw controlled by llcc/dram bw properties 185 * @lm_bounds : LM boundaries based on current mode full resolution, no ROI. 186 * Origin top left of CRTC. 187 * @property_state: Local storage for msm_prop properties 188 * @property_values: Current crtc property values 189 * @input_fence_timeout_ns : Cached input fence timeout, in ns 190 * @new_perf: new performance state being requested 191 * @num_mixers : Number of mixers in use 192 * @mixers : List of active mixers 193 * @num_ctls : Number of ctl paths in use 194 * @hw_ctls : List of active ctl paths 195 */ 196 struct dpu_crtc_state { 197 struct drm_crtc_state base; 198 199 bool bw_control; 200 bool bw_split_vote; 201 struct drm_rect lm_bounds[CRTC_DUAL_MIXERS]; 202 203 uint64_t input_fence_timeout_ns; 204 205 struct dpu_core_perf_params new_perf; 206 207 /* HW Resources reserved for the crtc */ 208 u32 num_mixers; 209 struct dpu_crtc_mixer mixers[CRTC_DUAL_MIXERS]; 210 211 u32 num_ctls; 212 struct dpu_hw_ctl *hw_ctls[CRTC_DUAL_MIXERS]; 213 }; 214 215 #define to_dpu_crtc_state(x) \ 216 container_of(x, struct dpu_crtc_state, base) 217 218 /** 219 * dpu_crtc_frame_pending - retun the number of pending frames 220 * @crtc: Pointer to drm crtc object 221 */ 222 static inline int dpu_crtc_frame_pending(struct drm_crtc *crtc) 223 { 224 return crtc ? atomic_read(&to_dpu_crtc(crtc)->frame_pending) : -EINVAL; 225 } 226 227 /** 228 * dpu_crtc_vblank - enable or disable vblanks for this crtc 229 * @crtc: Pointer to drm crtc object 230 * @en: true to enable vblanks, false to disable 231 */ 232 int dpu_crtc_vblank(struct drm_crtc *crtc, bool en); 233 234 /** 235 * dpu_crtc_vblank_callback - called on vblank irq, issues completion events 236 * @crtc: Pointer to drm crtc object 237 */ 238 void dpu_crtc_vblank_callback(struct drm_crtc *crtc); 239 240 /** 241 * dpu_crtc_commit_kickoff - trigger kickoff of the commit for this crtc 242 * @crtc: Pointer to drm crtc object 243 */ 244 void dpu_crtc_commit_kickoff(struct drm_crtc *crtc); 245 246 /** 247 * dpu_crtc_complete_commit - callback signalling completion of current commit 248 * @crtc: Pointer to drm crtc object 249 */ 250 void dpu_crtc_complete_commit(struct drm_crtc *crtc); 251 252 /** 253 * dpu_crtc_init - create a new crtc object 254 * @dev: dpu device 255 * @plane: base plane 256 * @cursor: cursor plane 257 * @Return: new crtc object or error 258 */ 259 struct drm_crtc *dpu_crtc_init(struct drm_device *dev, struct drm_plane *plane, 260 struct drm_plane *cursor); 261 262 /** 263 * dpu_crtc_register_custom_event - api for enabling/disabling crtc event 264 * @kms: Pointer to dpu_kms 265 * @crtc_drm: Pointer to crtc object 266 * @event: Event that client is interested 267 * @en: Flag to enable/disable the event 268 */ 269 int dpu_crtc_register_custom_event(struct dpu_kms *kms, 270 struct drm_crtc *crtc_drm, u32 event, bool en); 271 272 /** 273 * dpu_crtc_get_intf_mode - get interface mode of the given crtc 274 * @crtc: Pointert to crtc 275 */ 276 enum dpu_intf_mode dpu_crtc_get_intf_mode(struct drm_crtc *crtc); 277 278 /** 279 * dpu_crtc_get_client_type - check the crtc type- rt, nrt etc. 280 * @crtc: Pointer to crtc 281 */ 282 static inline enum dpu_crtc_client_type dpu_crtc_get_client_type( 283 struct drm_crtc *crtc) 284 { 285 return crtc && crtc->state ? RT_CLIENT : NRT_CLIENT; 286 } 287 288 #endif /* _DPU_CRTC_H_ */ 289