1 /* 2 * Copyright (c) 2015-2018 The Linux Foundation. All rights reserved. 3 * Copyright (C) 2013 Red Hat 4 * Author: Rob Clark <robdclark@gmail.com> 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 as published by 8 * the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along with 16 * this program. If not, see <http://www.gnu.org/licenses/>. 17 */ 18 19 #ifndef _DPU_CRTC_H_ 20 #define _DPU_CRTC_H_ 21 22 #include <linux/kthread.h> 23 #include <drm/drm_crtc.h> 24 #include "dpu_kms.h" 25 #include "dpu_core_perf.h" 26 #include "dpu_hw_blk.h" 27 28 #define DPU_CRTC_NAME_SIZE 12 29 30 /* define the maximum number of in-flight frame events */ 31 #define DPU_CRTC_FRAME_EVENT_SIZE 4 32 33 /** 34 * enum dpu_crtc_client_type: crtc client type 35 * @RT_CLIENT: RealTime client like video/cmd mode display 36 * voting through apps rsc 37 * @NRT_CLIENT: Non-RealTime client like WB display 38 * voting through apps rsc 39 */ 40 enum dpu_crtc_client_type { 41 RT_CLIENT, 42 NRT_CLIENT, 43 }; 44 45 /** 46 * enum dpu_crtc_smmu_state: smmu state 47 * @ATTACHED: all the context banks are attached. 48 * @DETACHED: all the context banks are detached. 49 * @ATTACH_ALL_REQ: transient state of attaching context banks. 50 * @DETACH_ALL_REQ: transient state of detaching context banks. 51 */ 52 enum dpu_crtc_smmu_state { 53 ATTACHED = 0, 54 DETACHED, 55 ATTACH_ALL_REQ, 56 DETACH_ALL_REQ, 57 }; 58 59 /** 60 * enum dpu_crtc_smmu_state_transition_type: state transition type 61 * @NONE: no pending state transitions 62 * @PRE_COMMIT: state transitions should be done before processing the commit 63 * @POST_COMMIT: state transitions to be done after processing the commit. 64 */ 65 enum dpu_crtc_smmu_state_transition_type { 66 NONE, 67 PRE_COMMIT, 68 POST_COMMIT 69 }; 70 71 /** 72 * struct dpu_crtc_smmu_state_data: stores the smmu state and transition type 73 * @state: current state of smmu context banks 74 * @transition_type: transition request type 75 * @transition_error: whether there is error while transitioning the state 76 */ 77 struct dpu_crtc_smmu_state_data { 78 uint32_t state; 79 uint32_t transition_type; 80 uint32_t transition_error; 81 }; 82 83 /** 84 * struct dpu_crtc_mixer: stores the map for each virtual pipeline in the CRTC 85 * @hw_lm: LM HW Driver context 86 * @lm_ctl: CTL Path HW driver context 87 * @encoder: Encoder attached to this lm & ctl 88 * @mixer_op_mode: mixer blending operation mode 89 * @flush_mask: mixer flush mask for ctl, mixer and pipe 90 */ 91 struct dpu_crtc_mixer { 92 struct dpu_hw_mixer *hw_lm; 93 struct dpu_hw_ctl *lm_ctl; 94 struct drm_encoder *encoder; 95 u32 mixer_op_mode; 96 u32 flush_mask; 97 }; 98 99 /** 100 * struct dpu_crtc_frame_event: stores crtc frame event for crtc processing 101 * @work: base work structure 102 * @crtc: Pointer to crtc handling this event 103 * @list: event list 104 * @ts: timestamp at queue entry 105 * @event: event identifier 106 */ 107 struct dpu_crtc_frame_event { 108 struct kthread_work work; 109 struct drm_crtc *crtc; 110 struct list_head list; 111 ktime_t ts; 112 u32 event; 113 }; 114 115 /* 116 * Maximum number of free event structures to cache 117 */ 118 #define DPU_CRTC_MAX_EVENT_COUNT 16 119 120 /** 121 * struct dpu_crtc - virtualized CRTC data structure 122 * @base : Base drm crtc structure 123 * @name : ASCII description of this crtc 124 * @event : Pointer to last received drm vblank event. If there is a 125 * pending vblank event, this will be non-null. 126 * @vsync_count : Running count of received vsync events 127 * @drm_requested_vblank : Whether vblanks have been enabled in the encoder 128 * @property_info : Opaque structure for generic property support 129 * @property_defaults : Array of default values for generic property support 130 * @stage_cfg : H/w mixer stage configuration 131 * @debugfs_root : Parent of debugfs node 132 * @vblank_cb_count : count of vblank callback since last reset 133 * @play_count : frame count between crtc enable and disable 134 * @vblank_cb_time : ktime at vblank count reset 135 * @enabled : whether the DPU CRTC is currently enabled. updated in the 136 * commit-thread, not state-swap time which is earlier, so 137 * safe to make decisions on during VBLANK on/off work 138 * @feature_list : list of color processing features supported on a crtc 139 * @active_list : list of color processing features are active 140 * @dirty_list : list of color processing features are dirty 141 * @ad_dirty: list containing ad properties that are dirty 142 * @ad_active: list containing ad properties that are active 143 * @frame_pending : Whether or not an update is pending 144 * @frame_events : static allocation of in-flight frame events 145 * @frame_event_list : available frame event list 146 * @spin_lock : spin lock for frame event, transaction status, etc... 147 * @frame_done_comp : for frame_event_done synchronization 148 * @event_thread : Pointer to event handler thread 149 * @event_worker : Event worker queue 150 * @event_lock : Spinlock around event handling code 151 * @phandle: Pointer to power handler 152 * @cur_perf : current performance committed to clock/bandwidth driver 153 */ 154 struct dpu_crtc { 155 struct drm_crtc base; 156 char name[DPU_CRTC_NAME_SIZE]; 157 158 struct drm_pending_vblank_event *event; 159 u32 vsync_count; 160 161 struct dpu_hw_stage_cfg stage_cfg; 162 struct dentry *debugfs_root; 163 164 u32 vblank_cb_count; 165 u64 play_count; 166 ktime_t vblank_cb_time; 167 bool enabled; 168 169 struct list_head feature_list; 170 struct list_head active_list; 171 struct list_head dirty_list; 172 struct list_head ad_dirty; 173 struct list_head ad_active; 174 175 atomic_t frame_pending; 176 struct dpu_crtc_frame_event frame_events[DPU_CRTC_FRAME_EVENT_SIZE]; 177 struct list_head frame_event_list; 178 spinlock_t spin_lock; 179 struct completion frame_done_comp; 180 181 /* for handling internal event thread */ 182 spinlock_t event_lock; 183 184 struct dpu_core_perf_params cur_perf; 185 186 struct dpu_crtc_smmu_state_data smmu_state; 187 }; 188 189 #define to_dpu_crtc(x) container_of(x, struct dpu_crtc, base) 190 191 /** 192 * struct dpu_crtc_state - dpu container for atomic crtc state 193 * @base: Base drm crtc state structure 194 * @bw_control : true if bw/clk controlled by core bw/clk properties 195 * @bw_split_vote : true if bw controlled by llcc/dram bw properties 196 * @lm_bounds : LM boundaries based on current mode full resolution, no ROI. 197 * Origin top left of CRTC. 198 * @property_state: Local storage for msm_prop properties 199 * @property_values: Current crtc property values 200 * @input_fence_timeout_ns : Cached input fence timeout, in ns 201 * @new_perf: new performance state being requested 202 * @num_mixers : Number of mixers in use 203 * @mixers : List of active mixers 204 * @num_ctls : Number of ctl paths in use 205 * @hw_ctls : List of active ctl paths 206 */ 207 struct dpu_crtc_state { 208 struct drm_crtc_state base; 209 210 bool bw_control; 211 bool bw_split_vote; 212 struct drm_rect lm_bounds[CRTC_DUAL_MIXERS]; 213 214 uint64_t input_fence_timeout_ns; 215 216 struct dpu_core_perf_params new_perf; 217 218 /* HW Resources reserved for the crtc */ 219 u32 num_mixers; 220 struct dpu_crtc_mixer mixers[CRTC_DUAL_MIXERS]; 221 222 u32 num_ctls; 223 struct dpu_hw_ctl *hw_ctls[CRTC_DUAL_MIXERS]; 224 }; 225 226 #define to_dpu_crtc_state(x) \ 227 container_of(x, struct dpu_crtc_state, base) 228 229 /** 230 * dpu_crtc_frame_pending - retun the number of pending frames 231 * @crtc: Pointer to drm crtc object 232 */ 233 static inline int dpu_crtc_frame_pending(struct drm_crtc *crtc) 234 { 235 return crtc ? atomic_read(&to_dpu_crtc(crtc)->frame_pending) : -EINVAL; 236 } 237 238 /** 239 * dpu_crtc_vblank - enable or disable vblanks for this crtc 240 * @crtc: Pointer to drm crtc object 241 * @en: true to enable vblanks, false to disable 242 */ 243 int dpu_crtc_vblank(struct drm_crtc *crtc, bool en); 244 245 /** 246 * dpu_crtc_vblank_callback - called on vblank irq, issues completion events 247 * @crtc: Pointer to drm crtc object 248 */ 249 void dpu_crtc_vblank_callback(struct drm_crtc *crtc); 250 251 /** 252 * dpu_crtc_commit_kickoff - trigger kickoff of the commit for this crtc 253 * @crtc: Pointer to drm crtc object 254 * @async: true if the commit is asynchronous, false otherwise 255 */ 256 void dpu_crtc_commit_kickoff(struct drm_crtc *crtc, bool async); 257 258 /** 259 * dpu_crtc_complete_commit - callback signalling completion of current commit 260 * @crtc: Pointer to drm crtc object 261 * @old_state: Pointer to drm crtc old state object 262 */ 263 void dpu_crtc_complete_commit(struct drm_crtc *crtc, 264 struct drm_crtc_state *old_state); 265 266 /** 267 * dpu_crtc_init - create a new crtc object 268 * @dev: dpu device 269 * @plane: base plane 270 * @cursor: cursor plane 271 * @Return: new crtc object or error 272 */ 273 struct drm_crtc *dpu_crtc_init(struct drm_device *dev, struct drm_plane *plane, 274 struct drm_plane *cursor); 275 276 /** 277 * dpu_crtc_register_custom_event - api for enabling/disabling crtc event 278 * @kms: Pointer to dpu_kms 279 * @crtc_drm: Pointer to crtc object 280 * @event: Event that client is interested 281 * @en: Flag to enable/disable the event 282 */ 283 int dpu_crtc_register_custom_event(struct dpu_kms *kms, 284 struct drm_crtc *crtc_drm, u32 event, bool en); 285 286 /** 287 * dpu_crtc_get_intf_mode - get interface mode of the given crtc 288 * @crtc: Pointert to crtc 289 */ 290 enum dpu_intf_mode dpu_crtc_get_intf_mode(struct drm_crtc *crtc); 291 292 /** 293 * dpu_crtc_get_client_type - check the crtc type- rt, nrt etc. 294 * @crtc: Pointer to crtc 295 */ 296 static inline enum dpu_crtc_client_type dpu_crtc_get_client_type( 297 struct drm_crtc *crtc) 298 { 299 return crtc && crtc->state ? RT_CLIENT : NRT_CLIENT; 300 } 301 302 #endif /* _DPU_CRTC_H_ */ 303