1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2015-2021 The Linux Foundation. All rights reserved. 4 * Copyright (C) 2013 Red Hat 5 * Author: Rob Clark <robdclark@gmail.com> 6 */ 7 8 #ifndef _DPU_CRTC_H_ 9 #define _DPU_CRTC_H_ 10 11 #include <linux/kthread.h> 12 #include <drm/drm_crtc.h> 13 #include "dpu_kms.h" 14 #include "dpu_core_perf.h" 15 #include "dpu_hw_blk.h" 16 17 #define DPU_CRTC_NAME_SIZE 12 18 19 /* define the maximum number of in-flight frame events */ 20 #define DPU_CRTC_FRAME_EVENT_SIZE 4 21 22 /** 23 * enum dpu_crtc_client_type: crtc client type 24 * @RT_CLIENT: RealTime client like video/cmd mode display 25 * voting through apps rsc 26 * @NRT_CLIENT: Non-RealTime client like WB display 27 * voting through apps rsc 28 */ 29 enum dpu_crtc_client_type { 30 RT_CLIENT, 31 NRT_CLIENT, 32 }; 33 34 /** 35 * enum dpu_crtc_smmu_state: smmu state 36 * @ATTACHED: all the context banks are attached. 37 * @DETACHED: all the context banks are detached. 38 * @ATTACH_ALL_REQ: transient state of attaching context banks. 39 * @DETACH_ALL_REQ: transient state of detaching context banks. 40 */ 41 enum dpu_crtc_smmu_state { 42 ATTACHED = 0, 43 DETACHED, 44 ATTACH_ALL_REQ, 45 DETACH_ALL_REQ, 46 }; 47 48 /** 49 * enum dpu_crtc_smmu_state_transition_type: state transition type 50 * @NONE: no pending state transitions 51 * @PRE_COMMIT: state transitions should be done before processing the commit 52 * @POST_COMMIT: state transitions to be done after processing the commit. 53 */ 54 enum dpu_crtc_smmu_state_transition_type { 55 NONE, 56 PRE_COMMIT, 57 POST_COMMIT 58 }; 59 60 /** 61 * struct dpu_crtc_smmu_state_data: stores the smmu state and transition type 62 * @state: current state of smmu context banks 63 * @transition_type: transition request type 64 * @transition_error: whether there is error while transitioning the state 65 */ 66 struct dpu_crtc_smmu_state_data { 67 uint32_t state; 68 uint32_t transition_type; 69 uint32_t transition_error; 70 }; 71 72 /** 73 * enum dpu_crtc_crc_source: CRC source 74 * @DPU_CRTC_CRC_SOURCE_NONE: no source set 75 * @DPU_CRTC_CRC_SOURCE_LAYER_MIXER: CRC in layer mixer 76 * @DPU_CRTC_CRC_SOURCE_INVALID: Invalid source 77 */ 78 enum dpu_crtc_crc_source { 79 DPU_CRTC_CRC_SOURCE_NONE = 0, 80 DPU_CRTC_CRC_SOURCE_LAYER_MIXER, 81 DPU_CRTC_CRC_SOURCE_MAX, 82 DPU_CRTC_CRC_SOURCE_INVALID = -1 83 }; 84 85 /** 86 * struct dpu_crtc_mixer: stores the map for each virtual pipeline in the CRTC 87 * @hw_lm: LM HW Driver context 88 * @lm_ctl: CTL Path HW driver context 89 * @lm_dspp: DSPP HW driver context 90 * @mixer_op_mode: mixer blending operation mode 91 * @flush_mask: mixer flush mask for ctl, mixer and pipe 92 */ 93 struct dpu_crtc_mixer { 94 struct dpu_hw_mixer *hw_lm; 95 struct dpu_hw_ctl *lm_ctl; 96 struct dpu_hw_dspp *hw_dspp; 97 u32 mixer_op_mode; 98 u32 flush_mask; 99 }; 100 101 /** 102 * struct dpu_crtc_frame_event: stores crtc frame event for crtc processing 103 * @work: base work structure 104 * @crtc: Pointer to crtc handling this event 105 * @list: event list 106 * @ts: timestamp at queue entry 107 * @event: event identifier 108 */ 109 struct dpu_crtc_frame_event { 110 struct kthread_work work; 111 struct drm_crtc *crtc; 112 struct list_head list; 113 ktime_t ts; 114 u32 event; 115 }; 116 117 /* 118 * Maximum number of free event structures to cache 119 */ 120 #define DPU_CRTC_MAX_EVENT_COUNT 16 121 122 /** 123 * struct dpu_crtc - virtualized CRTC data structure 124 * @base : Base drm crtc structure 125 * @name : ASCII description of this crtc 126 * @event : Pointer to last received drm vblank event. If there is a 127 * pending vblank event, this will be non-null. 128 * @vsync_count : Running count of received vsync events 129 * @drm_requested_vblank : Whether vblanks have been enabled in the encoder 130 * @property_info : Opaque structure for generic property support 131 * @property_defaults : Array of default values for generic property support 132 * @vblank_cb_count : count of vblank callback since last reset 133 * @play_count : frame count between crtc enable and disable 134 * @vblank_cb_time : ktime at vblank count reset 135 * @enabled : whether the DPU CRTC is currently enabled. updated in the 136 * commit-thread, not state-swap time which is earlier, so 137 * safe to make decisions on during VBLANK on/off work 138 * @feature_list : list of color processing features supported on a crtc 139 * @active_list : list of color processing features are active 140 * @dirty_list : list of color processing features are dirty 141 * @ad_dirty: list containing ad properties that are dirty 142 * @ad_active: list containing ad properties that are active 143 * @frame_pending : Whether or not an update is pending 144 * @frame_events : static allocation of in-flight frame events 145 * @frame_event_list : available frame event list 146 * @spin_lock : spin lock for frame event, transaction status, etc... 147 * @frame_done_comp : for frame_event_done synchronization 148 * @event_thread : Pointer to event handler thread 149 * @event_worker : Event worker queue 150 * @event_lock : Spinlock around event handling code 151 * @phandle: Pointer to power handler 152 * @cur_perf : current performance committed to clock/bandwidth driver 153 * @crc_source : CRC source 154 */ 155 struct dpu_crtc { 156 struct drm_crtc base; 157 char name[DPU_CRTC_NAME_SIZE]; 158 159 struct drm_pending_vblank_event *event; 160 u32 vsync_count; 161 162 u32 vblank_cb_count; 163 u64 play_count; 164 ktime_t vblank_cb_time; 165 bool enabled; 166 167 struct list_head feature_list; 168 struct list_head active_list; 169 struct list_head dirty_list; 170 struct list_head ad_dirty; 171 struct list_head ad_active; 172 173 atomic_t frame_pending; 174 struct dpu_crtc_frame_event frame_events[DPU_CRTC_FRAME_EVENT_SIZE]; 175 struct list_head frame_event_list; 176 spinlock_t spin_lock; 177 struct completion frame_done_comp; 178 179 /* for handling internal event thread */ 180 spinlock_t event_lock; 181 182 struct dpu_core_perf_params cur_perf; 183 184 struct dpu_crtc_smmu_state_data smmu_state; 185 }; 186 187 #define to_dpu_crtc(x) container_of(x, struct dpu_crtc, base) 188 189 /** 190 * struct dpu_crtc_state - dpu container for atomic crtc state 191 * @base: Base drm crtc state structure 192 * @bw_control : true if bw/clk controlled by core bw/clk properties 193 * @bw_split_vote : true if bw controlled by llcc/dram bw properties 194 * @lm_bounds : LM boundaries based on current mode full resolution, no ROI. 195 * Origin top left of CRTC. 196 * @property_state: Local storage for msm_prop properties 197 * @property_values: Current crtc property values 198 * @input_fence_timeout_ns : Cached input fence timeout, in ns 199 * @new_perf: new performance state being requested 200 * @num_mixers : Number of mixers in use 201 * @mixers : List of active mixers 202 * @num_ctls : Number of ctl paths in use 203 * @hw_ctls : List of active ctl paths 204 */ 205 struct dpu_crtc_state { 206 struct drm_crtc_state base; 207 208 bool bw_control; 209 bool bw_split_vote; 210 struct drm_rect lm_bounds[CRTC_DUAL_MIXERS]; 211 212 uint64_t input_fence_timeout_ns; 213 214 struct dpu_core_perf_params new_perf; 215 216 /* HW Resources reserved for the crtc */ 217 u32 num_mixers; 218 struct dpu_crtc_mixer mixers[CRTC_DUAL_MIXERS]; 219 220 u32 num_ctls; 221 struct dpu_hw_ctl *hw_ctls[CRTC_DUAL_MIXERS]; 222 223 enum dpu_crtc_crc_source crc_source; 224 int crc_frame_skip_count; 225 }; 226 227 #define to_dpu_crtc_state(x) \ 228 container_of(x, struct dpu_crtc_state, base) 229 230 /** 231 * dpu_crtc_frame_pending - retun the number of pending frames 232 * @crtc: Pointer to drm crtc object 233 */ 234 static inline int dpu_crtc_frame_pending(struct drm_crtc *crtc) 235 { 236 return crtc ? atomic_read(&to_dpu_crtc(crtc)->frame_pending) : -EINVAL; 237 } 238 239 /** 240 * dpu_crtc_vblank - enable or disable vblanks for this crtc 241 * @crtc: Pointer to drm crtc object 242 * @en: true to enable vblanks, false to disable 243 */ 244 int dpu_crtc_vblank(struct drm_crtc *crtc, bool en); 245 246 /** 247 * dpu_crtc_vblank_callback - called on vblank irq, issues completion events 248 * @crtc: Pointer to drm crtc object 249 */ 250 void dpu_crtc_vblank_callback(struct drm_crtc *crtc); 251 252 /** 253 * dpu_crtc_commit_kickoff - trigger kickoff of the commit for this crtc 254 * @crtc: Pointer to drm crtc object 255 */ 256 void dpu_crtc_commit_kickoff(struct drm_crtc *crtc); 257 258 /** 259 * dpu_crtc_complete_commit - callback signalling completion of current commit 260 * @crtc: Pointer to drm crtc object 261 */ 262 void dpu_crtc_complete_commit(struct drm_crtc *crtc); 263 264 /** 265 * dpu_crtc_init - create a new crtc object 266 * @dev: dpu device 267 * @plane: base plane 268 * @cursor: cursor plane 269 * @Return: new crtc object or error 270 */ 271 struct drm_crtc *dpu_crtc_init(struct drm_device *dev, struct drm_plane *plane, 272 struct drm_plane *cursor); 273 274 /** 275 * dpu_crtc_register_custom_event - api for enabling/disabling crtc event 276 * @kms: Pointer to dpu_kms 277 * @crtc_drm: Pointer to crtc object 278 * @event: Event that client is interested 279 * @en: Flag to enable/disable the event 280 */ 281 int dpu_crtc_register_custom_event(struct dpu_kms *kms, 282 struct drm_crtc *crtc_drm, u32 event, bool en); 283 284 /** 285 * dpu_crtc_get_intf_mode - get interface mode of the given crtc 286 * @crtc: Pointert to crtc 287 */ 288 enum dpu_intf_mode dpu_crtc_get_intf_mode(struct drm_crtc *crtc); 289 290 /** 291 * dpu_crtc_get_client_type - check the crtc type- rt, nrt etc. 292 * @crtc: Pointer to crtc 293 */ 294 static inline enum dpu_crtc_client_type dpu_crtc_get_client_type( 295 struct drm_crtc *crtc) 296 { 297 return crtc && crtc->state ? RT_CLIENT : NRT_CLIENT; 298 } 299 300 #endif /* _DPU_CRTC_H_ */ 301