1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2015-2018 The Linux Foundation. All rights reserved.
4  * Copyright (C) 2013 Red Hat
5  * Author: Rob Clark <robdclark@gmail.com>
6  */
7 
8 #ifndef _DPU_CRTC_H_
9 #define _DPU_CRTC_H_
10 
11 #include <linux/kthread.h>
12 #include <drm/drm_crtc.h>
13 #include "dpu_kms.h"
14 #include "dpu_core_perf.h"
15 #include "dpu_hw_blk.h"
16 
17 #define DPU_CRTC_NAME_SIZE	12
18 
19 /* define the maximum number of in-flight frame events */
20 #define DPU_CRTC_FRAME_EVENT_SIZE	4
21 
22 /**
23  * enum dpu_crtc_client_type: crtc client type
24  * @RT_CLIENT:	RealTime client like video/cmd mode display
25  *              voting through apps rsc
26  * @NRT_CLIENT:	Non-RealTime client like WB display
27  *              voting through apps rsc
28  */
29 enum dpu_crtc_client_type {
30 	RT_CLIENT,
31 	NRT_CLIENT,
32 };
33 
34 /**
35  * enum dpu_crtc_smmu_state:	smmu state
36  * @ATTACHED:	 all the context banks are attached.
37  * @DETACHED:	 all the context banks are detached.
38  * @ATTACH_ALL_REQ:	 transient state of attaching context banks.
39  * @DETACH_ALL_REQ:	 transient state of detaching context banks.
40  */
41 enum dpu_crtc_smmu_state {
42 	ATTACHED = 0,
43 	DETACHED,
44 	ATTACH_ALL_REQ,
45 	DETACH_ALL_REQ,
46 };
47 
48 /**
49  * enum dpu_crtc_smmu_state_transition_type: state transition type
50  * @NONE: no pending state transitions
51  * @PRE_COMMIT: state transitions should be done before processing the commit
52  * @POST_COMMIT: state transitions to be done after processing the commit.
53  */
54 enum dpu_crtc_smmu_state_transition_type {
55 	NONE,
56 	PRE_COMMIT,
57 	POST_COMMIT
58 };
59 
60 /**
61  * struct dpu_crtc_smmu_state_data: stores the smmu state and transition type
62  * @state: current state of smmu context banks
63  * @transition_type: transition request type
64  * @transition_error: whether there is error while transitioning the state
65  */
66 struct dpu_crtc_smmu_state_data {
67 	uint32_t state;
68 	uint32_t transition_type;
69 	uint32_t transition_error;
70 };
71 
72 /**
73  * struct dpu_crtc_mixer: stores the map for each virtual pipeline in the CRTC
74  * @hw_lm:	LM HW Driver context
75  * @lm_ctl:	CTL Path HW driver context
76  * @mixer_op_mode:	mixer blending operation mode
77  * @flush_mask:	mixer flush mask for ctl, mixer and pipe
78  */
79 struct dpu_crtc_mixer {
80 	struct dpu_hw_mixer *hw_lm;
81 	struct dpu_hw_ctl *lm_ctl;
82 	u32 mixer_op_mode;
83 	u32 flush_mask;
84 };
85 
86 /**
87  * struct dpu_crtc_frame_event: stores crtc frame event for crtc processing
88  * @work:	base work structure
89  * @crtc:	Pointer to crtc handling this event
90  * @list:	event list
91  * @ts:		timestamp at queue entry
92  * @event:	event identifier
93  */
94 struct dpu_crtc_frame_event {
95 	struct kthread_work work;
96 	struct drm_crtc *crtc;
97 	struct list_head list;
98 	ktime_t ts;
99 	u32 event;
100 };
101 
102 /*
103  * Maximum number of free event structures to cache
104  */
105 #define DPU_CRTC_MAX_EVENT_COUNT	16
106 
107 /**
108  * struct dpu_crtc - virtualized CRTC data structure
109  * @base          : Base drm crtc structure
110  * @name          : ASCII description of this crtc
111  * @event         : Pointer to last received drm vblank event. If there is a
112  *                  pending vblank event, this will be non-null.
113  * @vsync_count   : Running count of received vsync events
114  * @drm_requested_vblank : Whether vblanks have been enabled in the encoder
115  * @property_info : Opaque structure for generic property support
116  * @property_defaults : Array of default values for generic property support
117  * @stage_cfg     : H/w mixer stage configuration
118  * @debugfs_root  : Parent of debugfs node
119  * @vblank_cb_count : count of vblank callback since last reset
120  * @play_count    : frame count between crtc enable and disable
121  * @vblank_cb_time  : ktime at vblank count reset
122  * @enabled       : whether the DPU CRTC is currently enabled. updated in the
123  *                  commit-thread, not state-swap time which is earlier, so
124  *                  safe to make decisions on during VBLANK on/off work
125  * @feature_list  : list of color processing features supported on a crtc
126  * @active_list   : list of color processing features are active
127  * @dirty_list    : list of color processing features are dirty
128  * @ad_dirty: list containing ad properties that are dirty
129  * @ad_active: list containing ad properties that are active
130  * @frame_pending : Whether or not an update is pending
131  * @frame_events  : static allocation of in-flight frame events
132  * @frame_event_list : available frame event list
133  * @spin_lock     : spin lock for frame event, transaction status, etc...
134  * @frame_done_comp    : for frame_event_done synchronization
135  * @event_thread  : Pointer to event handler thread
136  * @event_worker  : Event worker queue
137  * @event_lock    : Spinlock around event handling code
138  * @phandle: Pointer to power handler
139  * @cur_perf      : current performance committed to clock/bandwidth driver
140  */
141 struct dpu_crtc {
142 	struct drm_crtc base;
143 	char name[DPU_CRTC_NAME_SIZE];
144 
145 	struct drm_pending_vblank_event *event;
146 	u32 vsync_count;
147 
148 	struct dpu_hw_stage_cfg stage_cfg;
149 	struct dentry *debugfs_root;
150 
151 	u32 vblank_cb_count;
152 	u64 play_count;
153 	ktime_t vblank_cb_time;
154 	bool enabled;
155 
156 	struct list_head feature_list;
157 	struct list_head active_list;
158 	struct list_head dirty_list;
159 	struct list_head ad_dirty;
160 	struct list_head ad_active;
161 
162 	atomic_t frame_pending;
163 	struct dpu_crtc_frame_event frame_events[DPU_CRTC_FRAME_EVENT_SIZE];
164 	struct list_head frame_event_list;
165 	spinlock_t spin_lock;
166 	struct completion frame_done_comp;
167 
168 	/* for handling internal event thread */
169 	spinlock_t event_lock;
170 
171 	struct dpu_core_perf_params cur_perf;
172 
173 	struct dpu_crtc_smmu_state_data smmu_state;
174 };
175 
176 #define to_dpu_crtc(x) container_of(x, struct dpu_crtc, base)
177 
178 /**
179  * struct dpu_crtc_state - dpu container for atomic crtc state
180  * @base: Base drm crtc state structure
181  * @bw_control    : true if bw/clk controlled by core bw/clk properties
182  * @bw_split_vote : true if bw controlled by llcc/dram bw properties
183  * @lm_bounds     : LM boundaries based on current mode full resolution, no ROI.
184  *                  Origin top left of CRTC.
185  * @property_state: Local storage for msm_prop properties
186  * @property_values: Current crtc property values
187  * @input_fence_timeout_ns : Cached input fence timeout, in ns
188  * @new_perf: new performance state being requested
189  * @num_mixers    : Number of mixers in use
190  * @mixers        : List of active mixers
191  * @num_ctls      : Number of ctl paths in use
192  * @hw_ctls       : List of active ctl paths
193  */
194 struct dpu_crtc_state {
195 	struct drm_crtc_state base;
196 
197 	bool bw_control;
198 	bool bw_split_vote;
199 	struct drm_rect lm_bounds[CRTC_DUAL_MIXERS];
200 
201 	uint64_t input_fence_timeout_ns;
202 
203 	struct dpu_core_perf_params new_perf;
204 
205 	/* HW Resources reserved for the crtc */
206 	u32 num_mixers;
207 	struct dpu_crtc_mixer mixers[CRTC_DUAL_MIXERS];
208 
209 	u32 num_ctls;
210 	struct dpu_hw_ctl *hw_ctls[CRTC_DUAL_MIXERS];
211 };
212 
213 #define to_dpu_crtc_state(x) \
214 	container_of(x, struct dpu_crtc_state, base)
215 
216 /**
217  * dpu_crtc_frame_pending - retun the number of pending frames
218  * @crtc: Pointer to drm crtc object
219  */
220 static inline int dpu_crtc_frame_pending(struct drm_crtc *crtc)
221 {
222 	return crtc ? atomic_read(&to_dpu_crtc(crtc)->frame_pending) : -EINVAL;
223 }
224 
225 /**
226  * dpu_crtc_vblank - enable or disable vblanks for this crtc
227  * @crtc: Pointer to drm crtc object
228  * @en: true to enable vblanks, false to disable
229  */
230 int dpu_crtc_vblank(struct drm_crtc *crtc, bool en);
231 
232 /**
233  * dpu_crtc_vblank_callback - called on vblank irq, issues completion events
234  * @crtc: Pointer to drm crtc object
235  */
236 void dpu_crtc_vblank_callback(struct drm_crtc *crtc);
237 
238 /**
239  * dpu_crtc_commit_kickoff - trigger kickoff of the commit for this crtc
240  * @crtc: Pointer to drm crtc object
241  * @async: true if the commit is asynchronous, false otherwise
242  */
243 void dpu_crtc_commit_kickoff(struct drm_crtc *crtc, bool async);
244 
245 /**
246  * dpu_crtc_complete_commit - callback signalling completion of current commit
247  * @crtc: Pointer to drm crtc object
248  * @old_state: Pointer to drm crtc old state object
249  */
250 void dpu_crtc_complete_commit(struct drm_crtc *crtc,
251 		struct drm_crtc_state *old_state);
252 
253 /**
254  * dpu_crtc_init - create a new crtc object
255  * @dev: dpu device
256  * @plane: base plane
257  * @cursor: cursor plane
258  * @Return: new crtc object or error
259  */
260 struct drm_crtc *dpu_crtc_init(struct drm_device *dev, struct drm_plane *plane,
261 			       struct drm_plane *cursor);
262 
263 /**
264  * dpu_crtc_register_custom_event - api for enabling/disabling crtc event
265  * @kms: Pointer to dpu_kms
266  * @crtc_drm: Pointer to crtc object
267  * @event: Event that client is interested
268  * @en: Flag to enable/disable the event
269  */
270 int dpu_crtc_register_custom_event(struct dpu_kms *kms,
271 		struct drm_crtc *crtc_drm, u32 event, bool en);
272 
273 /**
274  * dpu_crtc_get_intf_mode - get interface mode of the given crtc
275  * @crtc: Pointert to crtc
276  */
277 enum dpu_intf_mode dpu_crtc_get_intf_mode(struct drm_crtc *crtc);
278 
279 /**
280  * dpu_crtc_get_client_type - check the crtc type- rt, nrt etc.
281  * @crtc: Pointer to crtc
282  */
283 static inline enum dpu_crtc_client_type dpu_crtc_get_client_type(
284 						struct drm_crtc *crtc)
285 {
286 	return crtc && crtc->state ? RT_CLIENT : NRT_CLIENT;
287 }
288 
289 #endif /* _DPU_CRTC_H_ */
290