1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. 4 * Copyright (c) 2015-2021 The Linux Foundation. All rights reserved. 5 * Copyright (C) 2013 Red Hat 6 * Author: Rob Clark <robdclark@gmail.com> 7 */ 8 9 #ifndef _DPU_CRTC_H_ 10 #define _DPU_CRTC_H_ 11 12 #include <linux/kthread.h> 13 #include <drm/drm_crtc.h> 14 #include "dpu_kms.h" 15 #include "dpu_core_perf.h" 16 17 #define DPU_CRTC_NAME_SIZE 12 18 19 /* define the maximum number of in-flight frame events */ 20 #define DPU_CRTC_FRAME_EVENT_SIZE 4 21 22 /** 23 * enum dpu_crtc_client_type: crtc client type 24 * @RT_CLIENT: RealTime client like video/cmd mode display 25 * voting through apps rsc 26 * @NRT_CLIENT: Non-RealTime client like WB display 27 * voting through apps rsc 28 */ 29 enum dpu_crtc_client_type { 30 RT_CLIENT, 31 NRT_CLIENT, 32 }; 33 34 /** 35 * enum dpu_crtc_smmu_state: smmu state 36 * @ATTACHED: all the context banks are attached. 37 * @DETACHED: all the context banks are detached. 38 * @ATTACH_ALL_REQ: transient state of attaching context banks. 39 * @DETACH_ALL_REQ: transient state of detaching context banks. 40 */ 41 enum dpu_crtc_smmu_state { 42 ATTACHED = 0, 43 DETACHED, 44 ATTACH_ALL_REQ, 45 DETACH_ALL_REQ, 46 }; 47 48 /** 49 * enum dpu_crtc_smmu_state_transition_type: state transition type 50 * @NONE: no pending state transitions 51 * @PRE_COMMIT: state transitions should be done before processing the commit 52 * @POST_COMMIT: state transitions to be done after processing the commit. 53 */ 54 enum dpu_crtc_smmu_state_transition_type { 55 NONE, 56 PRE_COMMIT, 57 POST_COMMIT 58 }; 59 60 /** 61 * struct dpu_crtc_smmu_state_data: stores the smmu state and transition type 62 * @state: current state of smmu context banks 63 * @transition_type: transition request type 64 * @transition_error: whether there is error while transitioning the state 65 */ 66 struct dpu_crtc_smmu_state_data { 67 uint32_t state; 68 uint32_t transition_type; 69 uint32_t transition_error; 70 }; 71 72 /** 73 * enum dpu_crtc_crc_source: CRC source 74 * @DPU_CRTC_CRC_SOURCE_NONE: no source set 75 * @DPU_CRTC_CRC_SOURCE_LAYER_MIXER: CRC in layer mixer 76 * @DPU_CRTC_CRC_SOURCE_ENCODER: CRC in encoder 77 * @DPU_CRTC_CRC_SOURCE_INVALID: Invalid source 78 */ 79 enum dpu_crtc_crc_source { 80 DPU_CRTC_CRC_SOURCE_NONE = 0, 81 DPU_CRTC_CRC_SOURCE_LAYER_MIXER, 82 DPU_CRTC_CRC_SOURCE_ENCODER, 83 DPU_CRTC_CRC_SOURCE_MAX, 84 DPU_CRTC_CRC_SOURCE_INVALID = -1 85 }; 86 87 /** 88 * struct dpu_crtc_mixer: stores the map for each virtual pipeline in the CRTC 89 * @hw_lm: LM HW Driver context 90 * @lm_ctl: CTL Path HW driver context 91 * @lm_dspp: DSPP HW driver context 92 * @mixer_op_mode: mixer blending operation mode 93 * @flush_mask: mixer flush mask for ctl, mixer and pipe 94 */ 95 struct dpu_crtc_mixer { 96 struct dpu_hw_mixer *hw_lm; 97 struct dpu_hw_ctl *lm_ctl; 98 struct dpu_hw_dspp *hw_dspp; 99 u32 mixer_op_mode; 100 u32 flush_mask; 101 }; 102 103 /** 104 * struct dpu_crtc_frame_event: stores crtc frame event for crtc processing 105 * @work: base work structure 106 * @crtc: Pointer to crtc handling this event 107 * @list: event list 108 * @ts: timestamp at queue entry 109 * @event: event identifier 110 */ 111 struct dpu_crtc_frame_event { 112 struct kthread_work work; 113 struct drm_crtc *crtc; 114 struct list_head list; 115 ktime_t ts; 116 u32 event; 117 }; 118 119 /* 120 * Maximum number of free event structures to cache 121 */ 122 #define DPU_CRTC_MAX_EVENT_COUNT 16 123 124 /** 125 * struct dpu_crtc - virtualized CRTC data structure 126 * @base : Base drm crtc structure 127 * @name : ASCII description of this crtc 128 * @event : Pointer to last received drm vblank event. If there is a 129 * pending vblank event, this will be non-null. 130 * @vsync_count : Running count of received vsync events 131 * @drm_requested_vblank : Whether vblanks have been enabled in the encoder 132 * @property_info : Opaque structure for generic property support 133 * @property_defaults : Array of default values for generic property support 134 * @vblank_cb_count : count of vblank callback since last reset 135 * @play_count : frame count between crtc enable and disable 136 * @vblank_cb_time : ktime at vblank count reset 137 * @enabled : whether the DPU CRTC is currently enabled. updated in the 138 * commit-thread, not state-swap time which is earlier, so 139 * safe to make decisions on during VBLANK on/off work 140 * @feature_list : list of color processing features supported on a crtc 141 * @active_list : list of color processing features are active 142 * @dirty_list : list of color processing features are dirty 143 * @ad_dirty: list containing ad properties that are dirty 144 * @ad_active: list containing ad properties that are active 145 * @frame_pending : Whether or not an update is pending 146 * @frame_events : static allocation of in-flight frame events 147 * @frame_event_list : available frame event list 148 * @spin_lock : spin lock for frame event, transaction status, etc... 149 * @frame_done_comp : for frame_event_done synchronization 150 * @event_thread : Pointer to event handler thread 151 * @event_worker : Event worker queue 152 * @event_lock : Spinlock around event handling code 153 * @phandle: Pointer to power handler 154 * @cur_perf : current performance committed to clock/bandwidth driver 155 * @crc_source : CRC source 156 */ 157 struct dpu_crtc { 158 struct drm_crtc base; 159 char name[DPU_CRTC_NAME_SIZE]; 160 161 struct drm_pending_vblank_event *event; 162 u32 vsync_count; 163 164 u32 vblank_cb_count; 165 u64 play_count; 166 ktime_t vblank_cb_time; 167 bool enabled; 168 169 struct list_head feature_list; 170 struct list_head active_list; 171 struct list_head dirty_list; 172 struct list_head ad_dirty; 173 struct list_head ad_active; 174 175 atomic_t frame_pending; 176 struct dpu_crtc_frame_event frame_events[DPU_CRTC_FRAME_EVENT_SIZE]; 177 struct list_head frame_event_list; 178 spinlock_t spin_lock; 179 struct completion frame_done_comp; 180 181 /* for handling internal event thread */ 182 spinlock_t event_lock; 183 184 struct dpu_core_perf_params cur_perf; 185 186 struct dpu_crtc_smmu_state_data smmu_state; 187 }; 188 189 #define to_dpu_crtc(x) container_of(x, struct dpu_crtc, base) 190 191 /** 192 * struct dpu_crtc_state - dpu container for atomic crtc state 193 * @base: Base drm crtc state structure 194 * @bw_control : true if bw/clk controlled by core bw/clk properties 195 * @bw_split_vote : true if bw controlled by llcc/dram bw properties 196 * @lm_bounds : LM boundaries based on current mode full resolution, no ROI. 197 * Origin top left of CRTC. 198 * @property_state: Local storage for msm_prop properties 199 * @property_values: Current crtc property values 200 * @input_fence_timeout_ns : Cached input fence timeout, in ns 201 * @new_perf: new performance state being requested 202 * @num_mixers : Number of mixers in use 203 * @mixers : List of active mixers 204 * @num_ctls : Number of ctl paths in use 205 * @hw_ctls : List of active ctl paths 206 * @crc_source : CRC source 207 * @crc_frame_skip_count: Number of frames skipped before getting CRC 208 */ 209 struct dpu_crtc_state { 210 struct drm_crtc_state base; 211 212 bool bw_control; 213 bool bw_split_vote; 214 struct drm_rect lm_bounds[CRTC_DUAL_MIXERS]; 215 216 uint64_t input_fence_timeout_ns; 217 218 struct dpu_core_perf_params new_perf; 219 220 /* HW Resources reserved for the crtc */ 221 u32 num_mixers; 222 struct dpu_crtc_mixer mixers[CRTC_DUAL_MIXERS]; 223 224 u32 num_ctls; 225 struct dpu_hw_ctl *hw_ctls[CRTC_DUAL_MIXERS]; 226 227 enum dpu_crtc_crc_source crc_source; 228 int crc_frame_skip_count; 229 }; 230 231 #define to_dpu_crtc_state(x) \ 232 container_of(x, struct dpu_crtc_state, base) 233 234 /** 235 * dpu_crtc_frame_pending - retun the number of pending frames 236 * @crtc: Pointer to drm crtc object 237 */ 238 static inline int dpu_crtc_frame_pending(struct drm_crtc *crtc) 239 { 240 return crtc ? atomic_read(&to_dpu_crtc(crtc)->frame_pending) : -EINVAL; 241 } 242 243 /** 244 * dpu_crtc_vblank - enable or disable vblanks for this crtc 245 * @crtc: Pointer to drm crtc object 246 * @en: true to enable vblanks, false to disable 247 */ 248 int dpu_crtc_vblank(struct drm_crtc *crtc, bool en); 249 250 /** 251 * dpu_crtc_vblank_callback - called on vblank irq, issues completion events 252 * @crtc: Pointer to drm crtc object 253 */ 254 void dpu_crtc_vblank_callback(struct drm_crtc *crtc); 255 256 /** 257 * dpu_crtc_commit_kickoff - trigger kickoff of the commit for this crtc 258 * @crtc: Pointer to drm crtc object 259 */ 260 void dpu_crtc_commit_kickoff(struct drm_crtc *crtc); 261 262 /** 263 * dpu_crtc_complete_commit - callback signalling completion of current commit 264 * @crtc: Pointer to drm crtc object 265 */ 266 void dpu_crtc_complete_commit(struct drm_crtc *crtc); 267 268 /** 269 * dpu_crtc_init - create a new crtc object 270 * @dev: dpu device 271 * @plane: base plane 272 * @cursor: cursor plane 273 * @Return: new crtc object or error 274 */ 275 struct drm_crtc *dpu_crtc_init(struct drm_device *dev, struct drm_plane *plane, 276 struct drm_plane *cursor); 277 278 /** 279 * dpu_crtc_register_custom_event - api for enabling/disabling crtc event 280 * @kms: Pointer to dpu_kms 281 * @crtc_drm: Pointer to crtc object 282 * @event: Event that client is interested 283 * @en: Flag to enable/disable the event 284 */ 285 int dpu_crtc_register_custom_event(struct dpu_kms *kms, 286 struct drm_crtc *crtc_drm, u32 event, bool en); 287 288 /** 289 * dpu_crtc_get_intf_mode - get interface mode of the given crtc 290 * @crtc: Pointert to crtc 291 */ 292 enum dpu_intf_mode dpu_crtc_get_intf_mode(struct drm_crtc *crtc); 293 294 /** 295 * dpu_crtc_get_client_type - check the crtc type- rt, nrt etc. 296 * @crtc: Pointer to crtc 297 */ 298 static inline enum dpu_crtc_client_type dpu_crtc_get_client_type( 299 struct drm_crtc *crtc) 300 { 301 return crtc && crtc->state ? RT_CLIENT : NRT_CLIENT; 302 } 303 304 #endif /* _DPU_CRTC_H_ */ 305