1 /* 2 * Copyright (c) 2015-2018 The Linux Foundation. All rights reserved. 3 * Copyright (C) 2013 Red Hat 4 * Author: Rob Clark <robdclark@gmail.com> 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 as published by 8 * the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along with 16 * this program. If not, see <http://www.gnu.org/licenses/>. 17 */ 18 19 #ifndef _DPU_CRTC_H_ 20 #define _DPU_CRTC_H_ 21 22 #include <linux/kthread.h> 23 #include <drm/drm_crtc.h> 24 #include "dpu_kms.h" 25 #include "dpu_core_perf.h" 26 #include "dpu_hw_blk.h" 27 28 #define DPU_CRTC_NAME_SIZE 12 29 30 /* define the maximum number of in-flight frame events */ 31 #define DPU_CRTC_FRAME_EVENT_SIZE 4 32 33 /** 34 * enum dpu_crtc_client_type: crtc client type 35 * @RT_CLIENT: RealTime client like video/cmd mode display 36 * voting through apps rsc 37 * @NRT_CLIENT: Non-RealTime client like WB display 38 * voting through apps rsc 39 */ 40 enum dpu_crtc_client_type { 41 RT_CLIENT, 42 NRT_CLIENT, 43 }; 44 45 /** 46 * enum dpu_crtc_smmu_state: smmu state 47 * @ATTACHED: all the context banks are attached. 48 * @DETACHED: all the context banks are detached. 49 * @ATTACH_ALL_REQ: transient state of attaching context banks. 50 * @DETACH_ALL_REQ: transient state of detaching context banks. 51 */ 52 enum dpu_crtc_smmu_state { 53 ATTACHED = 0, 54 DETACHED, 55 ATTACH_ALL_REQ, 56 DETACH_ALL_REQ, 57 }; 58 59 /** 60 * enum dpu_crtc_smmu_state_transition_type: state transition type 61 * @NONE: no pending state transitions 62 * @PRE_COMMIT: state transitions should be done before processing the commit 63 * @POST_COMMIT: state transitions to be done after processing the commit. 64 */ 65 enum dpu_crtc_smmu_state_transition_type { 66 NONE, 67 PRE_COMMIT, 68 POST_COMMIT 69 }; 70 71 /** 72 * struct dpu_crtc_smmu_state_data: stores the smmu state and transition type 73 * @state: current state of smmu context banks 74 * @transition_type: transition request type 75 * @transition_error: whether there is error while transitioning the state 76 */ 77 struct dpu_crtc_smmu_state_data { 78 uint32_t state; 79 uint32_t transition_type; 80 uint32_t transition_error; 81 }; 82 83 /** 84 * struct dpu_crtc_mixer: stores the map for each virtual pipeline in the CRTC 85 * @hw_lm: LM HW Driver context 86 * @lm_ctl: CTL Path HW driver context 87 * @encoder: Encoder attached to this lm & ctl 88 * @mixer_op_mode: mixer blending operation mode 89 * @flush_mask: mixer flush mask for ctl, mixer and pipe 90 */ 91 struct dpu_crtc_mixer { 92 struct dpu_hw_mixer *hw_lm; 93 struct dpu_hw_ctl *lm_ctl; 94 struct drm_encoder *encoder; 95 u32 mixer_op_mode; 96 u32 flush_mask; 97 }; 98 99 /** 100 * struct dpu_crtc_frame_event: stores crtc frame event for crtc processing 101 * @work: base work structure 102 * @crtc: Pointer to crtc handling this event 103 * @list: event list 104 * @ts: timestamp at queue entry 105 * @event: event identifier 106 */ 107 struct dpu_crtc_frame_event { 108 struct kthread_work work; 109 struct drm_crtc *crtc; 110 struct list_head list; 111 ktime_t ts; 112 u32 event; 113 }; 114 115 /* 116 * Maximum number of free event structures to cache 117 */ 118 #define DPU_CRTC_MAX_EVENT_COUNT 16 119 120 /** 121 * struct dpu_crtc - virtualized CRTC data structure 122 * @base : Base drm crtc structure 123 * @name : ASCII description of this crtc 124 * @event : Pointer to last received drm vblank event. If there is a 125 * pending vblank event, this will be non-null. 126 * @vsync_count : Running count of received vsync events 127 * @drm_requested_vblank : Whether vblanks have been enabled in the encoder 128 * @property_info : Opaque structure for generic property support 129 * @property_defaults : Array of default values for generic property support 130 * @stage_cfg : H/w mixer stage configuration 131 * @debugfs_root : Parent of debugfs node 132 * @vblank_cb_count : count of vblank callback since last reset 133 * @play_count : frame count between crtc enable and disable 134 * @vblank_cb_time : ktime at vblank count reset 135 * @vblank_requested : whether the user has requested vblank events 136 * @suspend : whether or not a suspend operation is in progress 137 * @enabled : whether the DPU CRTC is currently enabled. updated in the 138 * commit-thread, not state-swap time which is earlier, so 139 * safe to make decisions on during VBLANK on/off work 140 * @feature_list : list of color processing features supported on a crtc 141 * @active_list : list of color processing features are active 142 * @dirty_list : list of color processing features are dirty 143 * @ad_dirty: list containing ad properties that are dirty 144 * @ad_active: list containing ad properties that are active 145 * @crtc_lock : crtc lock around create, destroy and access. 146 * @frame_pending : Whether or not an update is pending 147 * @frame_events : static allocation of in-flight frame events 148 * @frame_event_list : available frame event list 149 * @spin_lock : spin lock for frame event, transaction status, etc... 150 * @frame_done_comp : for frame_event_done synchronization 151 * @event_thread : Pointer to event handler thread 152 * @event_worker : Event worker queue 153 * @event_lock : Spinlock around event handling code 154 * @phandle: Pointer to power handler 155 * @power_event : registered power event handle 156 * @cur_perf : current performance committed to clock/bandwidth driver 157 */ 158 struct dpu_crtc { 159 struct drm_crtc base; 160 char name[DPU_CRTC_NAME_SIZE]; 161 162 struct drm_pending_vblank_event *event; 163 u32 vsync_count; 164 165 struct dpu_hw_stage_cfg stage_cfg; 166 struct dentry *debugfs_root; 167 168 u32 vblank_cb_count; 169 u64 play_count; 170 ktime_t vblank_cb_time; 171 bool vblank_requested; 172 bool suspend; 173 bool enabled; 174 175 struct list_head feature_list; 176 struct list_head active_list; 177 struct list_head dirty_list; 178 struct list_head ad_dirty; 179 struct list_head ad_active; 180 181 struct mutex crtc_lock; 182 183 atomic_t frame_pending; 184 struct dpu_crtc_frame_event frame_events[DPU_CRTC_FRAME_EVENT_SIZE]; 185 struct list_head frame_event_list; 186 spinlock_t spin_lock; 187 struct completion frame_done_comp; 188 189 /* for handling internal event thread */ 190 spinlock_t event_lock; 191 192 struct dpu_power_handle *phandle; 193 struct dpu_power_event *power_event; 194 195 struct dpu_core_perf_params cur_perf; 196 197 struct dpu_crtc_smmu_state_data smmu_state; 198 }; 199 200 #define to_dpu_crtc(x) container_of(x, struct dpu_crtc, base) 201 202 /** 203 * struct dpu_crtc_state - dpu container for atomic crtc state 204 * @base: Base drm crtc state structure 205 * @bw_control : true if bw/clk controlled by core bw/clk properties 206 * @bw_split_vote : true if bw controlled by llcc/dram bw properties 207 * @lm_bounds : LM boundaries based on current mode full resolution, no ROI. 208 * Origin top left of CRTC. 209 * @property_state: Local storage for msm_prop properties 210 * @property_values: Current crtc property values 211 * @input_fence_timeout_ns : Cached input fence timeout, in ns 212 * @new_perf: new performance state being requested 213 * @num_mixers : Number of mixers in use 214 * @mixers : List of active mixers 215 * @num_ctls : Number of ctl paths in use 216 * @hw_ctls : List of active ctl paths 217 */ 218 struct dpu_crtc_state { 219 struct drm_crtc_state base; 220 221 bool bw_control; 222 bool bw_split_vote; 223 struct drm_rect lm_bounds[CRTC_DUAL_MIXERS]; 224 225 uint64_t input_fence_timeout_ns; 226 227 struct dpu_core_perf_params new_perf; 228 229 /* HW Resources reserved for the crtc */ 230 u32 num_mixers; 231 struct dpu_crtc_mixer mixers[CRTC_DUAL_MIXERS]; 232 233 u32 num_ctls; 234 struct dpu_hw_ctl *hw_ctls[CRTC_DUAL_MIXERS]; 235 }; 236 237 #define to_dpu_crtc_state(x) \ 238 container_of(x, struct dpu_crtc_state, base) 239 240 /** 241 * dpu_crtc_state_is_stereo - Is crtc virtualized with two mixers? 242 * @cstate: Pointer to dpu crtc state 243 * @Return: true - has two mixers, false - has one mixer 244 */ 245 static inline bool dpu_crtc_state_is_stereo(struct dpu_crtc_state *cstate) 246 { 247 return cstate->num_mixers == CRTC_DUAL_MIXERS; 248 } 249 250 /** 251 * dpu_crtc_get_mixer_height - get the mixer height 252 * Mixer height will be same as panel height 253 */ 254 static inline int dpu_crtc_get_mixer_height(struct dpu_crtc *dpu_crtc, 255 struct dpu_crtc_state *cstate, struct drm_display_mode *mode) 256 { 257 if (!dpu_crtc || !cstate || !mode) 258 return 0; 259 260 return mode->vdisplay; 261 } 262 263 /** 264 * dpu_crtc_frame_pending - retun the number of pending frames 265 * @crtc: Pointer to drm crtc object 266 */ 267 static inline int dpu_crtc_frame_pending(struct drm_crtc *crtc) 268 { 269 struct dpu_crtc *dpu_crtc; 270 271 if (!crtc) 272 return -EINVAL; 273 274 dpu_crtc = to_dpu_crtc(crtc); 275 return atomic_read(&dpu_crtc->frame_pending); 276 } 277 278 /** 279 * dpu_crtc_vblank - enable or disable vblanks for this crtc 280 * @crtc: Pointer to drm crtc object 281 * @en: true to enable vblanks, false to disable 282 */ 283 int dpu_crtc_vblank(struct drm_crtc *crtc, bool en); 284 285 /** 286 * dpu_crtc_commit_kickoff - trigger kickoff of the commit for this crtc 287 * @crtc: Pointer to drm crtc object 288 */ 289 void dpu_crtc_commit_kickoff(struct drm_crtc *crtc); 290 291 /** 292 * dpu_crtc_complete_commit - callback signalling completion of current commit 293 * @crtc: Pointer to drm crtc object 294 * @old_state: Pointer to drm crtc old state object 295 */ 296 void dpu_crtc_complete_commit(struct drm_crtc *crtc, 297 struct drm_crtc_state *old_state); 298 299 /** 300 * dpu_crtc_init - create a new crtc object 301 * @dev: dpu device 302 * @plane: base plane 303 * @cursor: cursor plane 304 * @Return: new crtc object or error 305 */ 306 struct drm_crtc *dpu_crtc_init(struct drm_device *dev, struct drm_plane *plane, 307 struct drm_plane *cursor); 308 309 /** 310 * dpu_crtc_register_custom_event - api for enabling/disabling crtc event 311 * @kms: Pointer to dpu_kms 312 * @crtc_drm: Pointer to crtc object 313 * @event: Event that client is interested 314 * @en: Flag to enable/disable the event 315 */ 316 int dpu_crtc_register_custom_event(struct dpu_kms *kms, 317 struct drm_crtc *crtc_drm, u32 event, bool en); 318 319 /** 320 * dpu_crtc_get_intf_mode - get interface mode of the given crtc 321 * @crtc: Pointert to crtc 322 */ 323 enum dpu_intf_mode dpu_crtc_get_intf_mode(struct drm_crtc *crtc); 324 325 /** 326 * dpu_crtc_get_client_type - check the crtc type- rt, nrt etc. 327 * @crtc: Pointer to crtc 328 */ 329 static inline enum dpu_crtc_client_type dpu_crtc_get_client_type( 330 struct drm_crtc *crtc) 331 { 332 struct dpu_crtc_state *cstate = 333 crtc ? to_dpu_crtc_state(crtc->state) : NULL; 334 335 if (!cstate) 336 return NRT_CLIENT; 337 338 return RT_CLIENT; 339 } 340 341 /** 342 * dpu_crtc_is_enabled - check if dpu crtc is enabled or not 343 * @crtc: Pointer to crtc 344 */ 345 static inline bool dpu_crtc_is_enabled(struct drm_crtc *crtc) 346 { 347 return crtc ? crtc->enabled : false; 348 } 349 350 #endif /* _DPU_CRTC_H_ */ 351