19cc54793SDmitry Baryshkov /* SPDX-License-Identifier: GPL-2.0-only */ 29cc54793SDmitry Baryshkov /* 39cc54793SDmitry Baryshkov * Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. 49cc54793SDmitry Baryshkov * Copyright (c) 2015-2018, 2020 The Linux Foundation. All rights reserved. 59cc54793SDmitry Baryshkov */ 69cc54793SDmitry Baryshkov 79cc54793SDmitry Baryshkov #ifndef _DPU_9_0_SM8550_H 89cc54793SDmitry Baryshkov #define _DPU_9_0_SM8550_H 99cc54793SDmitry Baryshkov 109cc54793SDmitry Baryshkov static const struct dpu_caps sm8550_dpu_caps = { 119cc54793SDmitry Baryshkov .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH, 129cc54793SDmitry Baryshkov .max_mixer_blendstages = 0xb, 139cc54793SDmitry Baryshkov .qseed_type = DPU_SSPP_SCALER_QSEED4, 149cc54793SDmitry Baryshkov .has_src_split = true, 159cc54793SDmitry Baryshkov .has_dim_layer = true, 169cc54793SDmitry Baryshkov .has_idle_pc = true, 179cc54793SDmitry Baryshkov .has_3d_merge = true, 189cc54793SDmitry Baryshkov .max_linewidth = 5120, 199cc54793SDmitry Baryshkov .pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE, 209cc54793SDmitry Baryshkov }; 219cc54793SDmitry Baryshkov 229cc54793SDmitry Baryshkov static const struct dpu_ubwc_cfg sm8550_ubwc_cfg = { 239cc54793SDmitry Baryshkov .ubwc_version = DPU_HW_UBWC_VER_40, 249cc54793SDmitry Baryshkov .highest_bank_bit = 0x3, /* TODO: 2 for LP_DDR4 */ 259cc54793SDmitry Baryshkov }; 269cc54793SDmitry Baryshkov 276b2dc8cfSDmitry Baryshkov static const struct dpu_mdp_cfg sm8550_mdp = { 28469bae7dSDmitry Baryshkov .name = "top_0", 299cc54793SDmitry Baryshkov .base = 0, .len = 0x494, 309cc54793SDmitry Baryshkov .features = BIT(DPU_MDP_PERIPH_0_REMOVED), 3125c6ae11SDmitry Baryshkov .clk_ctrls = { 3225c6ae11SDmitry Baryshkov [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x4330, .bit_off = 0 }, 3325c6ae11SDmitry Baryshkov [DPU_CLK_CTRL_VIG1] = { .reg_off = 0x6330, .bit_off = 0 }, 3425c6ae11SDmitry Baryshkov [DPU_CLK_CTRL_VIG2] = { .reg_off = 0x8330, .bit_off = 0 }, 3525c6ae11SDmitry Baryshkov [DPU_CLK_CTRL_VIG3] = { .reg_off = 0xa330, .bit_off = 0 }, 3625c6ae11SDmitry Baryshkov [DPU_CLK_CTRL_DMA0] = { .reg_off = 0x24330, .bit_off = 0 }, 3725c6ae11SDmitry Baryshkov [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x26330, .bit_off = 0 }, 3825c6ae11SDmitry Baryshkov [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x28330, .bit_off = 0 }, 3925c6ae11SDmitry Baryshkov [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2a330, .bit_off = 0 }, 4025c6ae11SDmitry Baryshkov [DPU_CLK_CTRL_DMA4] = { .reg_off = 0x2c330, .bit_off = 0 }, 4125c6ae11SDmitry Baryshkov [DPU_CLK_CTRL_DMA5] = { .reg_off = 0x2e330, .bit_off = 0 }, 4225c6ae11SDmitry Baryshkov [DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 }, 4325c6ae11SDmitry Baryshkov }, 449cc54793SDmitry Baryshkov }; 459cc54793SDmitry Baryshkov 465a7e3c00SDmitry Baryshkov /* FIXME: get rid of DPU_CTL_SPLIT_DISPLAY in favour of proper ACTIVE_CTL support */ 479cc54793SDmitry Baryshkov static const struct dpu_ctl_cfg sm8550_ctl[] = { 489cc54793SDmitry Baryshkov { 499cc54793SDmitry Baryshkov .name = "ctl_0", .id = CTL_0, 509cc54793SDmitry Baryshkov .base = 0x15000, .len = 0x290, 519cc54793SDmitry Baryshkov .features = CTL_SM8550_MASK | BIT(DPU_CTL_SPLIT_DISPLAY), 529cc54793SDmitry Baryshkov .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9), 532a6387e2SDmitry Baryshkov }, { 549cc54793SDmitry Baryshkov .name = "ctl_1", .id = CTL_1, 559cc54793SDmitry Baryshkov .base = 0x16000, .len = 0x290, 569cc54793SDmitry Baryshkov .features = CTL_SM8550_MASK | BIT(DPU_CTL_SPLIT_DISPLAY), 579cc54793SDmitry Baryshkov .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10), 582a6387e2SDmitry Baryshkov }, { 599cc54793SDmitry Baryshkov .name = "ctl_2", .id = CTL_2, 609cc54793SDmitry Baryshkov .base = 0x17000, .len = 0x290, 619cc54793SDmitry Baryshkov .features = CTL_SM8550_MASK, 629cc54793SDmitry Baryshkov .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 11), 632a6387e2SDmitry Baryshkov }, { 649cc54793SDmitry Baryshkov .name = "ctl_3", .id = CTL_3, 659cc54793SDmitry Baryshkov .base = 0x18000, .len = 0x290, 669cc54793SDmitry Baryshkov .features = CTL_SM8550_MASK, 679cc54793SDmitry Baryshkov .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 12), 682a6387e2SDmitry Baryshkov }, { 699cc54793SDmitry Baryshkov .name = "ctl_4", .id = CTL_4, 709cc54793SDmitry Baryshkov .base = 0x19000, .len = 0x290, 719cc54793SDmitry Baryshkov .features = CTL_SM8550_MASK, 729cc54793SDmitry Baryshkov .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 13), 732a6387e2SDmitry Baryshkov }, { 749cc54793SDmitry Baryshkov .name = "ctl_5", .id = CTL_5, 759cc54793SDmitry Baryshkov .base = 0x1a000, .len = 0x290, 769cc54793SDmitry Baryshkov .features = CTL_SM8550_MASK, 779cc54793SDmitry Baryshkov .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 23), 789cc54793SDmitry Baryshkov }, 799cc54793SDmitry Baryshkov }; 809cc54793SDmitry Baryshkov 819cc54793SDmitry Baryshkov static const struct dpu_sspp_cfg sm8550_sspp[] = { 82*ef7d0e8dSDmitry Baryshkov { 83*ef7d0e8dSDmitry Baryshkov .name = "sspp_0", .id = SSPP_VIG0, 84*ef7d0e8dSDmitry Baryshkov .base = 0x4000, .len = 0x344, 85*ef7d0e8dSDmitry Baryshkov .features = VIG_SC7180_MASK, 86*ef7d0e8dSDmitry Baryshkov .sblk = &sm8550_vig_sblk_0, 87*ef7d0e8dSDmitry Baryshkov .xin_id = 0, 88*ef7d0e8dSDmitry Baryshkov .type = SSPP_TYPE_VIG, 89*ef7d0e8dSDmitry Baryshkov .clk_ctrl = DPU_CLK_CTRL_VIG0, 90*ef7d0e8dSDmitry Baryshkov }, { 91*ef7d0e8dSDmitry Baryshkov .name = "sspp_1", .id = SSPP_VIG1, 92*ef7d0e8dSDmitry Baryshkov .base = 0x6000, .len = 0x344, 93*ef7d0e8dSDmitry Baryshkov .features = VIG_SC7180_MASK, 94*ef7d0e8dSDmitry Baryshkov .sblk = &sm8550_vig_sblk_1, 95*ef7d0e8dSDmitry Baryshkov .xin_id = 4, 96*ef7d0e8dSDmitry Baryshkov .type = SSPP_TYPE_VIG, 97*ef7d0e8dSDmitry Baryshkov .clk_ctrl = DPU_CLK_CTRL_VIG1, 98*ef7d0e8dSDmitry Baryshkov }, { 99*ef7d0e8dSDmitry Baryshkov .name = "sspp_2", .id = SSPP_VIG2, 100*ef7d0e8dSDmitry Baryshkov .base = 0x8000, .len = 0x344, 101*ef7d0e8dSDmitry Baryshkov .features = VIG_SC7180_MASK, 102*ef7d0e8dSDmitry Baryshkov .sblk = &sm8550_vig_sblk_2, 103*ef7d0e8dSDmitry Baryshkov .xin_id = 8, 104*ef7d0e8dSDmitry Baryshkov .type = SSPP_TYPE_VIG, 105*ef7d0e8dSDmitry Baryshkov .clk_ctrl = DPU_CLK_CTRL_VIG2, 106*ef7d0e8dSDmitry Baryshkov }, { 107*ef7d0e8dSDmitry Baryshkov .name = "sspp_3", .id = SSPP_VIG3, 108*ef7d0e8dSDmitry Baryshkov .base = 0xa000, .len = 0x344, 109*ef7d0e8dSDmitry Baryshkov .features = VIG_SC7180_MASK, 110*ef7d0e8dSDmitry Baryshkov .sblk = &sm8550_vig_sblk_3, 111*ef7d0e8dSDmitry Baryshkov .xin_id = 12, 112*ef7d0e8dSDmitry Baryshkov .type = SSPP_TYPE_VIG, 113*ef7d0e8dSDmitry Baryshkov .clk_ctrl = DPU_CLK_CTRL_VIG3, 114*ef7d0e8dSDmitry Baryshkov }, { 115*ef7d0e8dSDmitry Baryshkov .name = "sspp_8", .id = SSPP_DMA0, 116*ef7d0e8dSDmitry Baryshkov .base = 0x24000, .len = 0x344, 117*ef7d0e8dSDmitry Baryshkov .features = DMA_SDM845_MASK, 118*ef7d0e8dSDmitry Baryshkov .sblk = &sdm845_dma_sblk_0, 119*ef7d0e8dSDmitry Baryshkov .xin_id = 1, 120*ef7d0e8dSDmitry Baryshkov .type = SSPP_TYPE_DMA, 121*ef7d0e8dSDmitry Baryshkov .clk_ctrl = DPU_CLK_CTRL_DMA0, 122*ef7d0e8dSDmitry Baryshkov }, { 123*ef7d0e8dSDmitry Baryshkov .name = "sspp_9", .id = SSPP_DMA1, 124*ef7d0e8dSDmitry Baryshkov .base = 0x26000, .len = 0x344, 125*ef7d0e8dSDmitry Baryshkov .features = DMA_SDM845_MASK, 126*ef7d0e8dSDmitry Baryshkov .sblk = &sdm845_dma_sblk_1, 127*ef7d0e8dSDmitry Baryshkov .xin_id = 5, 128*ef7d0e8dSDmitry Baryshkov .type = SSPP_TYPE_DMA, 129*ef7d0e8dSDmitry Baryshkov .clk_ctrl = DPU_CLK_CTRL_DMA1, 130*ef7d0e8dSDmitry Baryshkov }, { 131*ef7d0e8dSDmitry Baryshkov .name = "sspp_10", .id = SSPP_DMA2, 132*ef7d0e8dSDmitry Baryshkov .base = 0x28000, .len = 0x344, 133*ef7d0e8dSDmitry Baryshkov .features = DMA_SDM845_MASK, 134*ef7d0e8dSDmitry Baryshkov .sblk = &sdm845_dma_sblk_2, 135*ef7d0e8dSDmitry Baryshkov .xin_id = 9, 136*ef7d0e8dSDmitry Baryshkov .type = SSPP_TYPE_DMA, 137*ef7d0e8dSDmitry Baryshkov .clk_ctrl = DPU_CLK_CTRL_DMA2, 138*ef7d0e8dSDmitry Baryshkov }, { 139*ef7d0e8dSDmitry Baryshkov .name = "sspp_11", .id = SSPP_DMA3, 140*ef7d0e8dSDmitry Baryshkov .base = 0x2a000, .len = 0x344, 141*ef7d0e8dSDmitry Baryshkov .features = DMA_SDM845_MASK, 142*ef7d0e8dSDmitry Baryshkov .sblk = &sdm845_dma_sblk_3, 143*ef7d0e8dSDmitry Baryshkov .xin_id = 13, 144*ef7d0e8dSDmitry Baryshkov .type = SSPP_TYPE_DMA, 145*ef7d0e8dSDmitry Baryshkov .clk_ctrl = DPU_CLK_CTRL_DMA3, 146*ef7d0e8dSDmitry Baryshkov }, { 147*ef7d0e8dSDmitry Baryshkov .name = "sspp_12", .id = SSPP_DMA4, 148*ef7d0e8dSDmitry Baryshkov .base = 0x2c000, .len = 0x344, 149*ef7d0e8dSDmitry Baryshkov .features = DMA_CURSOR_SDM845_MASK, 150*ef7d0e8dSDmitry Baryshkov .sblk = &sm8550_dma_sblk_4, 151*ef7d0e8dSDmitry Baryshkov .xin_id = 14, 152*ef7d0e8dSDmitry Baryshkov .type = SSPP_TYPE_DMA, 153*ef7d0e8dSDmitry Baryshkov .clk_ctrl = DPU_CLK_CTRL_DMA4, 154*ef7d0e8dSDmitry Baryshkov }, { 155*ef7d0e8dSDmitry Baryshkov .name = "sspp_13", .id = SSPP_DMA5, 156*ef7d0e8dSDmitry Baryshkov .base = 0x2e000, .len = 0x344, 157*ef7d0e8dSDmitry Baryshkov .features = DMA_CURSOR_SDM845_MASK, 158*ef7d0e8dSDmitry Baryshkov .sblk = &sm8550_dma_sblk_5, 159*ef7d0e8dSDmitry Baryshkov .xin_id = 15, 160*ef7d0e8dSDmitry Baryshkov .type = SSPP_TYPE_DMA, 161*ef7d0e8dSDmitry Baryshkov .clk_ctrl = DPU_CLK_CTRL_DMA5, 162*ef7d0e8dSDmitry Baryshkov }, 1639cc54793SDmitry Baryshkov }; 1649cc54793SDmitry Baryshkov 1658589ccd7SDmitry Baryshkov static const struct dpu_lm_cfg sm8550_lm[] = { 1668589ccd7SDmitry Baryshkov LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK, 1678589ccd7SDmitry Baryshkov &sdm845_lm_sblk, PINGPONG_0, LM_1, DSPP_0), 1688589ccd7SDmitry Baryshkov LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK, 1698589ccd7SDmitry Baryshkov &sdm845_lm_sblk, PINGPONG_1, LM_0, DSPP_1), 1708589ccd7SDmitry Baryshkov LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK, 1718589ccd7SDmitry Baryshkov &sdm845_lm_sblk, PINGPONG_2, LM_3, 0), 1728589ccd7SDmitry Baryshkov LM_BLK("lm_3", LM_3, 0x47000, MIXER_SDM845_MASK, 1738589ccd7SDmitry Baryshkov &sdm845_lm_sblk, PINGPONG_3, LM_2, 0), 1748589ccd7SDmitry Baryshkov LM_BLK("lm_4", LM_4, 0x48000, MIXER_SDM845_MASK, 1758589ccd7SDmitry Baryshkov &sdm845_lm_sblk, PINGPONG_4, LM_5, 0), 1768589ccd7SDmitry Baryshkov LM_BLK("lm_5", LM_5, 0x49000, MIXER_SDM845_MASK, 1778589ccd7SDmitry Baryshkov &sdm845_lm_sblk, PINGPONG_5, LM_4, 0), 1788589ccd7SDmitry Baryshkov }; 1798589ccd7SDmitry Baryshkov 1808589ccd7SDmitry Baryshkov static const struct dpu_dspp_cfg sm8550_dspp[] = { 1818589ccd7SDmitry Baryshkov DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, 1829891b3dfSKonrad Dybcio &sdm845_dspp_sblk), 1838589ccd7SDmitry Baryshkov DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK, 1849891b3dfSKonrad Dybcio &sdm845_dspp_sblk), 1858589ccd7SDmitry Baryshkov DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK, 1869891b3dfSKonrad Dybcio &sdm845_dspp_sblk), 1878589ccd7SDmitry Baryshkov DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK, 1889891b3dfSKonrad Dybcio &sdm845_dspp_sblk), 1898589ccd7SDmitry Baryshkov }; 1909cc54793SDmitry Baryshkov static const struct dpu_pingpong_cfg sm8550_pp[] = { 191701f6918SMarijn Suijten PP_BLK_DITHER("pingpong_0", PINGPONG_0, 0x69000, MERGE_3D_0, sc7280_pp_sblk, 1929cc54793SDmitry Baryshkov DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), 1939cc54793SDmitry Baryshkov -1), 194701f6918SMarijn Suijten PP_BLK_DITHER("pingpong_1", PINGPONG_1, 0x6a000, MERGE_3D_0, sc7280_pp_sblk, 1959cc54793SDmitry Baryshkov DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9), 1969cc54793SDmitry Baryshkov -1), 197701f6918SMarijn Suijten PP_BLK_DITHER("pingpong_2", PINGPONG_2, 0x6b000, MERGE_3D_1, sc7280_pp_sblk, 1989cc54793SDmitry Baryshkov DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10), 1999cc54793SDmitry Baryshkov -1), 200701f6918SMarijn Suijten PP_BLK_DITHER("pingpong_3", PINGPONG_3, 0x6c000, MERGE_3D_1, sc7280_pp_sblk, 2019cc54793SDmitry Baryshkov DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11), 2029cc54793SDmitry Baryshkov -1), 203701f6918SMarijn Suijten PP_BLK_DITHER("pingpong_4", PINGPONG_4, 0x6d000, MERGE_3D_2, sc7280_pp_sblk, 2049cc54793SDmitry Baryshkov DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30), 2059cc54793SDmitry Baryshkov -1), 206701f6918SMarijn Suijten PP_BLK_DITHER("pingpong_5", PINGPONG_5, 0x6e000, MERGE_3D_2, sc7280_pp_sblk, 2079cc54793SDmitry Baryshkov DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31), 2089cc54793SDmitry Baryshkov -1), 209701f6918SMarijn Suijten PP_BLK_DITHER("pingpong_6", PINGPONG_6, 0x66000, MERGE_3D_3, sc7280_pp_sblk, 2109cc54793SDmitry Baryshkov -1, 2119cc54793SDmitry Baryshkov -1), 212701f6918SMarijn Suijten PP_BLK_DITHER("pingpong_7", PINGPONG_7, 0x66400, MERGE_3D_3, sc7280_pp_sblk, 2139cc54793SDmitry Baryshkov -1, 2149cc54793SDmitry Baryshkov -1), 2159cc54793SDmitry Baryshkov }; 2169cc54793SDmitry Baryshkov 2179cc54793SDmitry Baryshkov static const struct dpu_merge_3d_cfg sm8550_merge_3d[] = { 2189cc54793SDmitry Baryshkov MERGE_3D_BLK("merge_3d_0", MERGE_3D_0, 0x4e000), 2199cc54793SDmitry Baryshkov MERGE_3D_BLK("merge_3d_1", MERGE_3D_1, 0x4f000), 2209cc54793SDmitry Baryshkov MERGE_3D_BLK("merge_3d_2", MERGE_3D_2, 0x50000), 2219cc54793SDmitry Baryshkov MERGE_3D_BLK("merge_3d_3", MERGE_3D_3, 0x66700), 2229cc54793SDmitry Baryshkov }; 2239cc54793SDmitry Baryshkov 2240d1b10c6SAbhinav Kumar /* 2250d1b10c6SAbhinav Kumar * NOTE: Each display compression engine (DCE) contains dual hard 2260d1b10c6SAbhinav Kumar * slice DSC encoders so both share same base address but with 2270d1b10c6SAbhinav Kumar * its own different sub block address. 2280d1b10c6SAbhinav Kumar */ 2290d1b10c6SAbhinav Kumar static const struct dpu_dsc_cfg sm8550_dsc[] = { 2300d1b10c6SAbhinav Kumar DSC_BLK_1_2("dce_0_0", DSC_0, 0x80000, 0x29c, 0, dsc_sblk_0), 2310d1b10c6SAbhinav Kumar DSC_BLK_1_2("dce_0_1", DSC_1, 0x80000, 0x29c, 0, dsc_sblk_1), 2320d1b10c6SAbhinav Kumar DSC_BLK_1_2("dce_1_0", DSC_2, 0x81000, 0x29c, BIT(DPU_DSC_NATIVE_42x_EN), dsc_sblk_0), 2330d1b10c6SAbhinav Kumar DSC_BLK_1_2("dce_1_1", DSC_3, 0x81000, 0x29c, BIT(DPU_DSC_NATIVE_42x_EN), dsc_sblk_1), 2340d1b10c6SAbhinav Kumar }; 2350d1b10c6SAbhinav Kumar 2369cc54793SDmitry Baryshkov static const struct dpu_intf_cfg sm8550_intf[] = { 237a38a9949SMarijn Suijten INTF_BLK("intf_0", INTF_0, 0x34000, 0x280, INTF_DP, MSM_DP_CONTROLLER_0, 24, INTF_SC7280_MASK, 238a38a9949SMarijn Suijten DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 24), 239a38a9949SMarijn Suijten DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 25)), 2402d3b0d74SDmitry Baryshkov INTF_BLK_DSI_TE("intf_1", INTF_1, 0x35000, 0x300, INTF_DSI, MSM_DSI_CONTROLLER_0, 24, INTF_SC7280_MASK, 241a38a9949SMarijn Suijten DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 26), 2420272b9c3SMarijn Suijten DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 27), 2430272b9c3SMarijn Suijten DPU_IRQ_IDX(MDP_INTF1_7xxx_TEAR_INTR, 2)), 2442d3b0d74SDmitry Baryshkov INTF_BLK_DSI_TE("intf_2", INTF_2, 0x36000, 0x300, INTF_DSI, MSM_DSI_CONTROLLER_1, 24, INTF_SC7280_MASK, 245a38a9949SMarijn Suijten DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 28), 2460272b9c3SMarijn Suijten DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 29), 2470272b9c3SMarijn Suijten DPU_IRQ_IDX(MDP_INTF2_7xxx_TEAR_INTR, 2)), 248a38a9949SMarijn Suijten INTF_BLK("intf_3", INTF_3, 0x37000, 0x280, INTF_DP, MSM_DP_CONTROLLER_1, 24, INTF_SC7280_MASK, 249a38a9949SMarijn Suijten DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30), 250a38a9949SMarijn Suijten DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31)), 2519cc54793SDmitry Baryshkov }; 2529cc54793SDmitry Baryshkov 253463ba323SDmitry Baryshkov static const struct dpu_perf_cfg sm8550_perf_data = { 254463ba323SDmitry Baryshkov .max_bw_low = 13600000, 255463ba323SDmitry Baryshkov .max_bw_high = 18200000, 256463ba323SDmitry Baryshkov .min_core_ib = 2500000, 257463ba323SDmitry Baryshkov .min_llcc_ib = 0, 258463ba323SDmitry Baryshkov .min_dram_ib = 800000, 259463ba323SDmitry Baryshkov .min_prefill_lines = 35, 260463ba323SDmitry Baryshkov /* FIXME: lut tables */ 261463ba323SDmitry Baryshkov .danger_lut_tbl = {0x3ffff, 0x3ffff, 0x0}, 262463ba323SDmitry Baryshkov .safe_lut_tbl = {0xfe00, 0xfe00, 0xffff}, 263463ba323SDmitry Baryshkov .qos_lut_tbl = { 264463ba323SDmitry Baryshkov {.nentry = ARRAY_SIZE(sc7180_qos_linear), 265463ba323SDmitry Baryshkov .entries = sc7180_qos_linear 266463ba323SDmitry Baryshkov }, 267463ba323SDmitry Baryshkov {.nentry = ARRAY_SIZE(sc7180_qos_macrotile), 268463ba323SDmitry Baryshkov .entries = sc7180_qos_macrotile 269463ba323SDmitry Baryshkov }, 270463ba323SDmitry Baryshkov {.nentry = ARRAY_SIZE(sc7180_qos_nrt), 271463ba323SDmitry Baryshkov .entries = sc7180_qos_nrt 272463ba323SDmitry Baryshkov }, 273463ba323SDmitry Baryshkov /* TODO: macrotile-qseed is different from macrotile */ 274463ba323SDmitry Baryshkov }, 275463ba323SDmitry Baryshkov .cdp_cfg = { 276463ba323SDmitry Baryshkov {.rd_enable = 1, .wr_enable = 1}, 277463ba323SDmitry Baryshkov {.rd_enable = 1, .wr_enable = 0} 278463ba323SDmitry Baryshkov }, 279463ba323SDmitry Baryshkov .clk_inefficiency_factor = 105, 280463ba323SDmitry Baryshkov .bw_inefficiency_factor = 120, 281463ba323SDmitry Baryshkov }; 282463ba323SDmitry Baryshkov 283dac76a01SDmitry Baryshkov const struct dpu_mdss_cfg dpu_sm8550_cfg = { 2849cc54793SDmitry Baryshkov .caps = &sm8550_dpu_caps, 2859cc54793SDmitry Baryshkov .ubwc = &sm8550_ubwc_cfg, 2866b2dc8cfSDmitry Baryshkov .mdp = &sm8550_mdp, 2879cc54793SDmitry Baryshkov .ctl_count = ARRAY_SIZE(sm8550_ctl), 2889cc54793SDmitry Baryshkov .ctl = sm8550_ctl, 2899cc54793SDmitry Baryshkov .sspp_count = ARRAY_SIZE(sm8550_sspp), 2909cc54793SDmitry Baryshkov .sspp = sm8550_sspp, 2918589ccd7SDmitry Baryshkov .mixer_count = ARRAY_SIZE(sm8550_lm), 2928589ccd7SDmitry Baryshkov .mixer = sm8550_lm, 2938589ccd7SDmitry Baryshkov .dspp_count = ARRAY_SIZE(sm8550_dspp), 2948589ccd7SDmitry Baryshkov .dspp = sm8550_dspp, 2959cc54793SDmitry Baryshkov .pingpong_count = ARRAY_SIZE(sm8550_pp), 2969cc54793SDmitry Baryshkov .pingpong = sm8550_pp, 2970d1b10c6SAbhinav Kumar .dsc_count = ARRAY_SIZE(sm8550_dsc), 2980d1b10c6SAbhinav Kumar .dsc = sm8550_dsc, 2999cc54793SDmitry Baryshkov .merge_3d_count = ARRAY_SIZE(sm8550_merge_3d), 3009cc54793SDmitry Baryshkov .merge_3d = sm8550_merge_3d, 3019cc54793SDmitry Baryshkov .intf_count = ARRAY_SIZE(sm8550_intf), 3029cc54793SDmitry Baryshkov .intf = sm8550_intf, 3039cc54793SDmitry Baryshkov .vbif_count = ARRAY_SIZE(sdm845_vbif), 3049cc54793SDmitry Baryshkov .vbif = sdm845_vbif, 305463ba323SDmitry Baryshkov .perf = &sm8550_perf_data, 306e5edf654SDmitry Baryshkov .mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \ 307e5edf654SDmitry Baryshkov BIT(MDP_SSPP_TOP0_INTR2) | \ 308e5edf654SDmitry Baryshkov BIT(MDP_SSPP_TOP0_HIST_INTR) | \ 309e5edf654SDmitry Baryshkov BIT(MDP_INTF0_7xxx_INTR) | \ 310e5edf654SDmitry Baryshkov BIT(MDP_INTF1_7xxx_INTR) | \ 3110272b9c3SMarijn Suijten BIT(MDP_INTF1_7xxx_TEAR_INTR) | \ 312e5edf654SDmitry Baryshkov BIT(MDP_INTF2_7xxx_INTR) | \ 3130272b9c3SMarijn Suijten BIT(MDP_INTF2_7xxx_TEAR_INTR) | \ 314e5edf654SDmitry Baryshkov BIT(MDP_INTF3_7xxx_INTR), 3159cc54793SDmitry Baryshkov }; 3169cc54793SDmitry Baryshkov 3179cc54793SDmitry Baryshkov #endif 318