1 /* 2 * Copyright (C) 2013-2014 Red Hat 3 * Author: Rob Clark <robdclark@gmail.com> 4 * 5 * Copyright (c) 2014 The Linux Foundation. All rights reserved. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License version 2 as published by 9 * the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14 * more details. 15 * 16 * You should have received a copy of the GNU General Public License along with 17 * this program. If not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "adreno_gpu.h" 21 22 #define ANY_ID 0xff 23 24 bool hang_debug = false; 25 MODULE_PARM_DESC(hang_debug, "Dump registers when hang is detected (can be slow!)"); 26 module_param_named(hang_debug, hang_debug, bool, 0600); 27 28 static const struct adreno_info gpulist[] = { 29 { 30 .rev = ADRENO_REV(3, 0, 5, ANY_ID), 31 .revn = 305, 32 .name = "A305", 33 .pm4fw = "a300_pm4.fw", 34 .pfpfw = "a300_pfp.fw", 35 .gmem = SZ_256K, 36 .init = a3xx_gpu_init, 37 }, { 38 .rev = ADRENO_REV(3, 0, 6, 0), 39 .revn = 307, /* because a305c is revn==306 */ 40 .name = "A306", 41 .pm4fw = "a300_pm4.fw", 42 .pfpfw = "a300_pfp.fw", 43 .gmem = SZ_128K, 44 .init = a3xx_gpu_init, 45 }, { 46 .rev = ADRENO_REV(3, 2, ANY_ID, ANY_ID), 47 .revn = 320, 48 .name = "A320", 49 .pm4fw = "a300_pm4.fw", 50 .pfpfw = "a300_pfp.fw", 51 .gmem = SZ_512K, 52 .init = a3xx_gpu_init, 53 }, { 54 .rev = ADRENO_REV(3, 3, 0, ANY_ID), 55 .revn = 330, 56 .name = "A330", 57 .pm4fw = "a330_pm4.fw", 58 .pfpfw = "a330_pfp.fw", 59 .gmem = SZ_1M, 60 .init = a3xx_gpu_init, 61 }, { 62 .rev = ADRENO_REV(4, 2, 0, ANY_ID), 63 .revn = 420, 64 .name = "A420", 65 .pm4fw = "a420_pm4.fw", 66 .pfpfw = "a420_pfp.fw", 67 .gmem = (SZ_1M + SZ_512K), 68 .init = a4xx_gpu_init, 69 }, { 70 .rev = ADRENO_REV(4, 3, 0, ANY_ID), 71 .revn = 430, 72 .name = "A430", 73 .pm4fw = "a420_pm4.fw", 74 .pfpfw = "a420_pfp.fw", 75 .gmem = (SZ_1M + SZ_512K), 76 .init = a4xx_gpu_init, 77 }, { 78 .rev = ADRENO_REV(5, 3, 0, 2), 79 .revn = 530, 80 .name = "A530", 81 .pm4fw = "a530_pm4.fw", 82 .pfpfw = "a530_pfp.fw", 83 .gmem = SZ_1M, 84 .quirks = ADRENO_QUIRK_TWO_PASS_USE_WFI | 85 ADRENO_QUIRK_FAULT_DETECT_MASK, 86 .init = a5xx_gpu_init, 87 .gpmufw = "a530v3_gpmu.fw2", 88 }, 89 }; 90 91 MODULE_FIRMWARE("a300_pm4.fw"); 92 MODULE_FIRMWARE("a300_pfp.fw"); 93 MODULE_FIRMWARE("a330_pm4.fw"); 94 MODULE_FIRMWARE("a330_pfp.fw"); 95 MODULE_FIRMWARE("a420_pm4.fw"); 96 MODULE_FIRMWARE("a420_pfp.fw"); 97 MODULE_FIRMWARE("a530_fm4.fw"); 98 MODULE_FIRMWARE("a530_pfp.fw"); 99 100 static inline bool _rev_match(uint8_t entry, uint8_t id) 101 { 102 return (entry == ANY_ID) || (entry == id); 103 } 104 105 const struct adreno_info *adreno_info(struct adreno_rev rev) 106 { 107 int i; 108 109 /* identify gpu: */ 110 for (i = 0; i < ARRAY_SIZE(gpulist); i++) { 111 const struct adreno_info *info = &gpulist[i]; 112 if (_rev_match(info->rev.core, rev.core) && 113 _rev_match(info->rev.major, rev.major) && 114 _rev_match(info->rev.minor, rev.minor) && 115 _rev_match(info->rev.patchid, rev.patchid)) 116 return info; 117 } 118 119 return NULL; 120 } 121 122 struct msm_gpu *adreno_load_gpu(struct drm_device *dev) 123 { 124 struct msm_drm_private *priv = dev->dev_private; 125 struct platform_device *pdev = priv->gpu_pdev; 126 struct adreno_platform_config *config; 127 struct adreno_rev rev; 128 const struct adreno_info *info; 129 struct msm_gpu *gpu = NULL; 130 131 if (!pdev) { 132 dev_err(dev->dev, "no adreno device\n"); 133 return NULL; 134 } 135 136 config = pdev->dev.platform_data; 137 rev = config->rev; 138 info = adreno_info(config->rev); 139 140 if (!info) { 141 dev_warn(dev->dev, "Unknown GPU revision: %u.%u.%u.%u\n", 142 rev.core, rev.major, rev.minor, rev.patchid); 143 return NULL; 144 } 145 146 DBG("Found GPU: %u.%u.%u.%u", rev.core, rev.major, 147 rev.minor, rev.patchid); 148 149 gpu = info->init(dev); 150 if (IS_ERR(gpu)) { 151 dev_warn(dev->dev, "failed to load adreno gpu\n"); 152 gpu = NULL; 153 /* not fatal */ 154 } 155 156 if (gpu) { 157 int ret; 158 mutex_lock(&dev->struct_mutex); 159 gpu->funcs->pm_resume(gpu); 160 mutex_unlock(&dev->struct_mutex); 161 162 disable_irq(gpu->irq); 163 164 ret = gpu->funcs->hw_init(gpu); 165 if (ret) { 166 dev_err(dev->dev, "gpu hw init failed: %d\n", ret); 167 gpu->funcs->destroy(gpu); 168 gpu = NULL; 169 } else { 170 enable_irq(gpu->irq); 171 /* give inactive pm a chance to kick in: */ 172 msm_gpu_retire(gpu); 173 } 174 } 175 176 return gpu; 177 } 178 179 static void set_gpu_pdev(struct drm_device *dev, 180 struct platform_device *pdev) 181 { 182 struct msm_drm_private *priv = dev->dev_private; 183 priv->gpu_pdev = pdev; 184 } 185 186 static int find_chipid(struct device *dev, u32 *chipid) 187 { 188 struct device_node *node = dev->of_node; 189 const char *compat; 190 int ret; 191 192 /* first search the compat strings for qcom,adreno-XYZ.W: */ 193 ret = of_property_read_string_index(node, "compatible", 0, &compat); 194 if (ret == 0) { 195 unsigned rev, patch; 196 197 if (sscanf(compat, "qcom,adreno-%u.%u", &rev, &patch) == 2) { 198 *chipid = 0; 199 *chipid |= (rev / 100) << 24; /* core */ 200 rev %= 100; 201 *chipid |= (rev / 10) << 16; /* major */ 202 rev %= 10; 203 *chipid |= rev << 8; /* minor */ 204 *chipid |= patch; 205 206 return 0; 207 } 208 } 209 210 /* and if that fails, fall back to legacy "qcom,chipid" property: */ 211 ret = of_property_read_u32(node, "qcom,chipid", chipid); 212 if (ret) 213 return ret; 214 215 dev_warn(dev, "Using legacy qcom,chipid binding!\n"); 216 dev_warn(dev, "Use compatible qcom,adreno-%u%u%u.%u instead.\n", 217 (*chipid >> 24) & 0xff, (*chipid >> 16) & 0xff, 218 (*chipid >> 8) & 0xff, *chipid & 0xff); 219 220 return 0; 221 } 222 223 static int adreno_bind(struct device *dev, struct device *master, void *data) 224 { 225 static struct adreno_platform_config config = {}; 226 struct device_node *child, *node = dev->of_node; 227 u32 val; 228 int ret; 229 230 ret = find_chipid(dev, &val); 231 if (ret) { 232 dev_err(dev, "could not find chipid: %d\n", ret); 233 return ret; 234 } 235 236 config.rev = ADRENO_REV((val >> 24) & 0xff, 237 (val >> 16) & 0xff, (val >> 8) & 0xff, val & 0xff); 238 239 /* find clock rates: */ 240 config.fast_rate = 0; 241 config.slow_rate = ~0; 242 for_each_child_of_node(node, child) { 243 if (of_device_is_compatible(child, "qcom,gpu-pwrlevels")) { 244 struct device_node *pwrlvl; 245 for_each_child_of_node(child, pwrlvl) { 246 ret = of_property_read_u32(pwrlvl, "qcom,gpu-freq", &val); 247 if (ret) { 248 dev_err(dev, "could not find gpu-freq: %d\n", ret); 249 return ret; 250 } 251 config.fast_rate = max(config.fast_rate, val); 252 config.slow_rate = min(config.slow_rate, val); 253 } 254 } 255 } 256 257 if (!config.fast_rate) { 258 dev_warn(dev, "could not find clk rates\n"); 259 /* This is a safe low speed for all devices: */ 260 config.fast_rate = 200000000; 261 config.slow_rate = 27000000; 262 } 263 264 dev->platform_data = &config; 265 set_gpu_pdev(dev_get_drvdata(master), to_platform_device(dev)); 266 return 0; 267 } 268 269 static void adreno_unbind(struct device *dev, struct device *master, 270 void *data) 271 { 272 set_gpu_pdev(dev_get_drvdata(master), NULL); 273 } 274 275 static const struct component_ops a3xx_ops = { 276 .bind = adreno_bind, 277 .unbind = adreno_unbind, 278 }; 279 280 static int adreno_probe(struct platform_device *pdev) 281 { 282 return component_add(&pdev->dev, &a3xx_ops); 283 } 284 285 static int adreno_remove(struct platform_device *pdev) 286 { 287 component_del(&pdev->dev, &a3xx_ops); 288 return 0; 289 } 290 291 static const struct of_device_id dt_match[] = { 292 { .compatible = "qcom,adreno" }, 293 { .compatible = "qcom,adreno-3xx" }, 294 /* for backwards compat w/ downstream kgsl DT files: */ 295 { .compatible = "qcom,kgsl-3d0" }, 296 {} 297 }; 298 299 static struct platform_driver adreno_driver = { 300 .probe = adreno_probe, 301 .remove = adreno_remove, 302 .driver = { 303 .name = "adreno", 304 .of_match_table = dt_match, 305 }, 306 }; 307 308 void __init adreno_register(void) 309 { 310 platform_driver_register(&adreno_driver); 311 } 312 313 void __exit adreno_unregister(void) 314 { 315 platform_driver_unregister(&adreno_driver); 316 } 317