1# SPDX-License-Identifier: GPL-2.0 2ccflags-y := -I $(srctree)/$(src) 3ccflags-y += -I $(srctree)/$(src)/disp/dpu1 4ccflags-$(CONFIG_DRM_MSM_DSI) += -I $(srctree)/$(src)/dsi 5ccflags-$(CONFIG_DRM_MSM_DP) += -I $(srctree)/$(src)/dp 6 7msm-y := \ 8 adreno/adreno_device.o \ 9 adreno/adreno_gpu.o \ 10 adreno/a2xx_gpu.o \ 11 adreno/a3xx_gpu.o \ 12 adreno/a4xx_gpu.o \ 13 adreno/a5xx_gpu.o \ 14 adreno/a5xx_power.o \ 15 adreno/a5xx_preempt.o \ 16 adreno/a6xx_gpu.o \ 17 adreno/a6xx_gmu.o \ 18 adreno/a6xx_hfi.o \ 19 hdmi/hdmi.o \ 20 hdmi/hdmi_audio.o \ 21 hdmi/hdmi_bridge.o \ 22 hdmi/hdmi_connector.o \ 23 hdmi/hdmi_i2c.o \ 24 hdmi/hdmi_phy.o \ 25 hdmi/hdmi_phy_8960.o \ 26 hdmi/hdmi_phy_8x60.o \ 27 hdmi/hdmi_phy_8x74.o \ 28 edp/edp.o \ 29 edp/edp_aux.o \ 30 edp/edp_bridge.o \ 31 edp/edp_connector.o \ 32 edp/edp_ctrl.o \ 33 edp/edp_phy.o \ 34 disp/mdp_format.o \ 35 disp/mdp_kms.o \ 36 disp/mdp4/mdp4_crtc.o \ 37 disp/mdp4/mdp4_dtv_encoder.o \ 38 disp/mdp4/mdp4_lcdc_encoder.o \ 39 disp/mdp4/mdp4_lvds_connector.o \ 40 disp/mdp4/mdp4_irq.o \ 41 disp/mdp4/mdp4_kms.o \ 42 disp/mdp4/mdp4_plane.o \ 43 disp/mdp5/mdp5_cfg.o \ 44 disp/mdp5/mdp5_ctl.o \ 45 disp/mdp5/mdp5_crtc.o \ 46 disp/mdp5/mdp5_encoder.o \ 47 disp/mdp5/mdp5_irq.o \ 48 disp/mdp5/mdp5_mdss.o \ 49 disp/mdp5/mdp5_kms.o \ 50 disp/mdp5/mdp5_pipe.o \ 51 disp/mdp5/mdp5_mixer.o \ 52 disp/mdp5/mdp5_plane.o \ 53 disp/mdp5/mdp5_smp.o \ 54 disp/dpu1/dpu_core_irq.o \ 55 disp/dpu1/dpu_core_perf.o \ 56 disp/dpu1/dpu_crtc.o \ 57 disp/dpu1/dpu_encoder.o \ 58 disp/dpu1/dpu_encoder_phys_cmd.o \ 59 disp/dpu1/dpu_encoder_phys_vid.o \ 60 disp/dpu1/dpu_formats.o \ 61 disp/dpu1/dpu_hw_catalog.o \ 62 disp/dpu1/dpu_hw_ctl.o \ 63 disp/dpu1/dpu_hw_interrupts.o \ 64 disp/dpu1/dpu_hw_intf.o \ 65 disp/dpu1/dpu_hw_lm.o \ 66 disp/dpu1/dpu_hw_pingpong.o \ 67 disp/dpu1/dpu_hw_sspp.o \ 68 disp/dpu1/dpu_hw_dspp.o \ 69 disp/dpu1/dpu_hw_merge3d.o \ 70 disp/dpu1/dpu_hw_top.o \ 71 disp/dpu1/dpu_hw_util.o \ 72 disp/dpu1/dpu_hw_vbif.o \ 73 disp/dpu1/dpu_io_util.o \ 74 disp/dpu1/dpu_kms.o \ 75 disp/dpu1/dpu_mdss.o \ 76 disp/dpu1/dpu_plane.o \ 77 disp/dpu1/dpu_rm.o \ 78 disp/dpu1/dpu_vbif.o \ 79 disp/msm_disp_snapshot.o \ 80 disp/msm_disp_snapshot_util.o \ 81 msm_atomic.o \ 82 msm_atomic_tracepoints.o \ 83 msm_debugfs.o \ 84 msm_drv.o \ 85 msm_fb.o \ 86 msm_fence.o \ 87 msm_gem.o \ 88 msm_gem_prime.o \ 89 msm_gem_shrinker.o \ 90 msm_gem_submit.o \ 91 msm_gem_vma.o \ 92 msm_gpu.o \ 93 msm_gpu_devfreq.o \ 94 msm_iommu.o \ 95 msm_perf.o \ 96 msm_rd.o \ 97 msm_ringbuffer.o \ 98 msm_submitqueue.o \ 99 msm_gpu_tracepoints.o \ 100 msm_gpummu.o 101 102msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \ 103 dp/dp_debug.o 104 105msm-$(CONFIG_DRM_MSM_GPU_STATE) += adreno/a6xx_gpu_state.o 106 107msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \ 108 dp/dp_catalog.o \ 109 dp/dp_ctrl.o \ 110 dp/dp_display.o \ 111 dp/dp_drm.o \ 112 dp/dp_hpd.o \ 113 dp/dp_link.o \ 114 dp/dp_panel.o \ 115 dp/dp_parser.o \ 116 dp/dp_power.o \ 117 dp/dp_audio.o 118 119msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o 120msm-$(CONFIG_COMMON_CLK) += disp/mdp4/mdp4_lvds_pll.o 121msm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_pll_8960.o 122msm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_phy_8996.o 123 124msm-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o 125 126msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \ 127 disp/mdp4/mdp4_dsi_encoder.o \ 128 dsi/dsi_cfg.o \ 129 dsi/dsi_host.o \ 130 dsi/dsi_manager.o \ 131 dsi/phy/dsi_phy.o \ 132 disp/mdp5/mdp5_cmd_encoder.o 133 134msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o 135msm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o 136msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o 137msm-$(CONFIG_DRM_MSM_DSI_14NM_PHY) += dsi/phy/dsi_phy_14nm.o 138msm-$(CONFIG_DRM_MSM_DSI_10NM_PHY) += dsi/phy/dsi_phy_10nm.o 139msm-$(CONFIG_DRM_MSM_DSI_7NM_PHY) += dsi/phy/dsi_phy_7nm.o 140 141obj-$(CONFIG_DRM_MSM) += msm.o 142