1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright 2010 Matt Turner.
4  * Copyright 2012 Red Hat
5  *
6  * Authors: Matthew Garrett
7  * 	    Matt Turner
8  *	    Dave Airlie
9  */
10 #ifndef __MGAG200_DRV_H__
11 #define __MGAG200_DRV_H__
12 
13 #include <linux/i2c-algo-bit.h>
14 #include <linux/i2c.h>
15 
16 #include <video/vga.h>
17 
18 #include <drm/drm_encoder.h>
19 #include <drm/drm_fb_helper.h>
20 #include <drm/drm_gem.h>
21 #include <drm/drm_gem_vram_helper.h>
22 
23 #include "mgag200_reg.h"
24 
25 #define DRIVER_AUTHOR		"Matthew Garrett"
26 
27 #define DRIVER_NAME		"mgag200"
28 #define DRIVER_DESC		"MGA G200 SE"
29 #define DRIVER_DATE		"20110418"
30 
31 #define DRIVER_MAJOR		1
32 #define DRIVER_MINOR		0
33 #define DRIVER_PATCHLEVEL	0
34 
35 #define MGAG200FB_CONN_LIMIT 1
36 
37 #define RREG8(reg) ioread8(((void __iomem *)mdev->rmmio) + (reg))
38 #define WREG8(reg, v) iowrite8(v, ((void __iomem *)mdev->rmmio) + (reg))
39 #define RREG32(reg) ioread32(((void __iomem *)mdev->rmmio) + (reg))
40 #define WREG32(reg, v) iowrite32(v, ((void __iomem *)mdev->rmmio) + (reg))
41 
42 #define ATTR_INDEX 0x1fc0
43 #define ATTR_DATA 0x1fc1
44 
45 #define WREG_ATTR(reg, v)					\
46 	do {							\
47 		RREG8(0x1fda);					\
48 		WREG8(ATTR_INDEX, reg);				\
49 		WREG8(ATTR_DATA, v);				\
50 	} while (0)						\
51 
52 #define WREG_SEQ(reg, v)					\
53 	do {							\
54 		WREG8(MGAREG_SEQ_INDEX, reg);			\
55 		WREG8(MGAREG_SEQ_DATA, v);			\
56 	} while (0)						\
57 
58 #define WREG_CRT(reg, v)					\
59 	do {							\
60 		WREG8(MGAREG_CRTC_INDEX, reg);			\
61 		WREG8(MGAREG_CRTC_DATA, v);			\
62 	} while (0)						\
63 
64 
65 #define WREG_ECRT(reg, v)					\
66 	do {							\
67 		WREG8(MGAREG_CRTCEXT_INDEX, reg);				\
68 		WREG8(MGAREG_CRTCEXT_DATA, v);				\
69 	} while (0)						\
70 
71 #define GFX_INDEX 0x1fce
72 #define GFX_DATA 0x1fcf
73 
74 #define WREG_GFX(reg, v)					\
75 	do {							\
76 		WREG8(GFX_INDEX, reg);				\
77 		WREG8(GFX_DATA, v);				\
78 	} while (0)						\
79 
80 #define DAC_INDEX 0x3c00
81 #define DAC_DATA 0x3c0a
82 
83 #define WREG_DAC(reg, v)					\
84 	do {							\
85 		WREG8(DAC_INDEX, reg);				\
86 		WREG8(DAC_DATA, v);				\
87 	} while (0)						\
88 
89 #define MGA_MISC_OUT 0x1fc2
90 #define MGA_MISC_IN 0x1fcc
91 
92 #define MGAG200_MAX_FB_HEIGHT 4096
93 #define MGAG200_MAX_FB_WIDTH 4096
94 
95 #define MATROX_DPMS_CLEARED (-1)
96 
97 #define to_mga_crtc(x) container_of(x, struct mga_crtc, base)
98 #define to_mga_connector(x) container_of(x, struct mga_connector, base)
99 
100 struct mga_crtc {
101 	struct drm_crtc base;
102 	u8 lut_r[256], lut_g[256], lut_b[256];
103 	int last_dpms;
104 	bool enabled;
105 };
106 
107 struct mga_i2c_chan {
108 	struct i2c_adapter adapter;
109 	struct drm_device *dev;
110 	struct i2c_algo_bit_data bit;
111 	int data, clock;
112 };
113 
114 struct mga_connector {
115 	struct drm_connector base;
116 	struct mga_i2c_chan *i2c;
117 };
118 
119 struct mga_cursor {
120 	struct drm_gem_vram_object *gbo[2];
121 	unsigned int next_index;
122 };
123 
124 struct mga_mc {
125 	resource_size_t			vram_size;
126 	resource_size_t			vram_base;
127 	resource_size_t			vram_window;
128 };
129 
130 enum mga_type {
131 	G200_SE_A,
132 	G200_SE_B,
133 	G200_WB,
134 	G200_EV,
135 	G200_EH,
136 	G200_EH3,
137 	G200_ER,
138 	G200_EW3,
139 };
140 
141 /* HW does not handle 'startadd' field correct. */
142 #define MGAG200_FLAG_HW_BUG_NO_STARTADD	(1ul << 8)
143 
144 #define MGAG200_TYPE_MASK	(0x000000ff)
145 #define MGAG200_FLAG_MASK	(0x00ffff00)
146 
147 #define IS_G200_SE(mdev) (mdev->type == G200_SE_A || mdev->type == G200_SE_B)
148 
149 struct mga_device {
150 	struct drm_device		*dev;
151 	unsigned long			flags;
152 
153 	resource_size_t			rmmio_base;
154 	resource_size_t			rmmio_size;
155 	void __iomem			*rmmio;
156 
157 	struct mga_mc			mc;
158 
159 	struct mga_cursor cursor;
160 
161 	size_t vram_fb_available;
162 
163 	bool				suspended;
164 	enum mga_type			type;
165 	int				has_sdram;
166 
167 	int bpp_shifts[4];
168 
169 	int fb_mtrr;
170 
171 	/* SE model number stored in reg 0x1e24 */
172 	u32 unique_rev_id;
173 
174 	struct mga_connector connector;
175 	struct drm_encoder encoder;
176 };
177 
178 static inline struct mga_device *to_mga_device(struct drm_device *dev)
179 {
180 	return dev->dev_private;
181 }
182 
183 static inline enum mga_type
184 mgag200_type_from_driver_data(kernel_ulong_t driver_data)
185 {
186 	return (enum mga_type)(driver_data & MGAG200_TYPE_MASK);
187 }
188 
189 static inline unsigned long
190 mgag200_flags_from_driver_data(kernel_ulong_t driver_data)
191 {
192 	return driver_data & MGAG200_FLAG_MASK;
193 }
194 
195 				/* mgag200_mode.c */
196 int mgag200_modeset_init(struct mga_device *mdev);
197 
198 				/* mgag200_main.c */
199 int mgag200_driver_load(struct drm_device *dev, unsigned long flags);
200 void mgag200_driver_unload(struct drm_device *dev);
201 
202 				/* mgag200_i2c.c */
203 struct mga_i2c_chan *mgag200_i2c_create(struct drm_device *dev);
204 void mgag200_i2c_destroy(struct mga_i2c_chan *i2c);
205 
206 int mgag200_mm_init(struct mga_device *mdev);
207 void mgag200_mm_fini(struct mga_device *mdev);
208 int mgag200_mmap(struct file *filp, struct vm_area_struct *vma);
209 
210 int mgag200_cursor_init(struct mga_device *mdev);
211 void mgag200_cursor_fini(struct mga_device *mdev);
212 int mgag200_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
213 			    uint32_t handle, uint32_t width, uint32_t height);
214 int mgag200_crtc_cursor_move(struct drm_crtc *crtc, int x, int y);
215 
216 #endif				/* __MGAG200_DRV_H__ */
217