1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright 2012 Red Hat
4  *
5  * Authors: Matthew Garrett
6  *          Dave Airlie
7  */
8 
9 #include <linux/module.h>
10 #include <linux/pci.h>
11 
12 #include <drm/drm_aperture.h>
13 #include <drm/drm_drv.h>
14 #include <drm/drm_fbdev_generic.h>
15 #include <drm/drm_file.h>
16 #include <drm/drm_ioctl.h>
17 #include <drm/drm_managed.h>
18 #include <drm/drm_module.h>
19 #include <drm/drm_pciids.h>
20 
21 #include "mgag200_drv.h"
22 
23 static int mgag200_modeset = -1;
24 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
25 module_param_named(modeset, mgag200_modeset, int, 0400);
26 
27 int mgag200_init_pci_options(struct pci_dev *pdev, u32 option, u32 option2)
28 {
29 	struct device *dev = &pdev->dev;
30 	int err;
31 
32 	err = pci_write_config_dword(pdev, PCI_MGA_OPTION, option);
33 	if (err != PCIBIOS_SUCCESSFUL) {
34 		dev_err(dev, "pci_write_config_dword(PCI_MGA_OPTION) failed: %d\n", err);
35 		return pcibios_err_to_errno(err);
36 	}
37 
38 	err = pci_write_config_dword(pdev, PCI_MGA_OPTION2, option2);
39 	if (err != PCIBIOS_SUCCESSFUL) {
40 		dev_err(dev, "pci_write_config_dword(PCI_MGA_OPTION2) failed: %d\n", err);
41 		return pcibios_err_to_errno(err);
42 	}
43 
44 	return 0;
45 }
46 
47 resource_size_t mgag200_probe_vram(void __iomem *mem, resource_size_t size)
48 {
49 	int offset;
50 	int orig;
51 	int test1, test2;
52 	int orig1, orig2;
53 	size_t vram_size;
54 
55 	/* Probe */
56 	orig = ioread16(mem);
57 	iowrite16(0, mem);
58 
59 	vram_size = size;
60 
61 	for (offset = 0x100000; offset < vram_size; offset += 0x4000) {
62 		orig1 = ioread8(mem + offset);
63 		orig2 = ioread8(mem + offset + 0x100);
64 
65 		iowrite16(0xaa55, mem + offset);
66 		iowrite16(0xaa55, mem + offset + 0x100);
67 
68 		test1 = ioread16(mem + offset);
69 		test2 = ioread16(mem);
70 
71 		iowrite16(orig1, mem + offset);
72 		iowrite16(orig2, mem + offset + 0x100);
73 
74 		if (test1 != 0xaa55)
75 			break;
76 
77 		if (test2)
78 			break;
79 	}
80 
81 	iowrite16(orig, mem);
82 
83 	return offset - 65536;
84 }
85 
86 /*
87  * DRM driver
88  */
89 
90 DEFINE_DRM_GEM_FOPS(mgag200_driver_fops);
91 
92 static const struct drm_driver mgag200_driver = {
93 	.driver_features = DRIVER_ATOMIC | DRIVER_GEM | DRIVER_MODESET,
94 	.fops = &mgag200_driver_fops,
95 	.name = DRIVER_NAME,
96 	.desc = DRIVER_DESC,
97 	.date = DRIVER_DATE,
98 	.major = DRIVER_MAJOR,
99 	.minor = DRIVER_MINOR,
100 	.patchlevel = DRIVER_PATCHLEVEL,
101 	DRM_GEM_SHMEM_DRIVER_OPS,
102 };
103 
104 /*
105  * DRM device
106  */
107 
108 resource_size_t mgag200_device_probe_vram(struct mga_device *mdev)
109 {
110 	return mgag200_probe_vram(mdev->vram, resource_size(mdev->vram_res));
111 }
112 
113 int mgag200_device_preinit(struct mga_device *mdev)
114 {
115 	struct drm_device *dev = &mdev->base;
116 	struct pci_dev *pdev = to_pci_dev(dev->dev);
117 	resource_size_t start, len;
118 	struct resource *res;
119 
120 	/* BAR 1 contains registers */
121 
122 	start = pci_resource_start(pdev, 1);
123 	len = pci_resource_len(pdev, 1);
124 
125 	res = devm_request_mem_region(dev->dev, start, len, "mgadrmfb_mmio");
126 	if (!res) {
127 		drm_err(dev, "devm_request_mem_region(MMIO) failed\n");
128 		return -ENXIO;
129 	}
130 	mdev->rmmio_res = res;
131 
132 	mdev->rmmio = pcim_iomap(pdev, 1, 0);
133 	if (!mdev->rmmio)
134 		return -ENOMEM;
135 
136 	/* BAR 0 is VRAM */
137 
138 	start = pci_resource_start(pdev, 0);
139 	len = pci_resource_len(pdev, 0);
140 
141 	res = devm_request_mem_region(dev->dev, start, len, "mgadrmfb_vram");
142 	if (!res) {
143 		drm_err(dev, "devm_request_mem_region(VRAM) failed\n");
144 		return -ENXIO;
145 	}
146 	mdev->vram_res = res;
147 
148 	/* Don't fail on errors, but performance might be reduced. */
149 	devm_arch_io_reserve_memtype_wc(dev->dev, res->start, resource_size(res));
150 	devm_arch_phys_wc_add(dev->dev, res->start, resource_size(res));
151 
152 	mdev->vram = devm_ioremap(dev->dev, res->start, resource_size(res));
153 	if (!mdev->vram)
154 		return -ENOMEM;
155 
156 	return 0;
157 }
158 
159 int mgag200_device_init(struct mga_device *mdev,
160 			const struct mgag200_device_info *info,
161 			const struct mgag200_device_funcs *funcs)
162 {
163 	struct drm_device *dev = &mdev->base;
164 	u8 crtcext3, misc;
165 	int ret;
166 
167 	mdev->info = info;
168 	mdev->funcs = funcs;
169 
170 	ret = drmm_mutex_init(dev, &mdev->rmmio_lock);
171 	if (ret)
172 		return ret;
173 
174 	mutex_lock(&mdev->rmmio_lock);
175 
176 	RREG_ECRT(0x03, crtcext3);
177 	crtcext3 |= MGAREG_CRTCEXT3_MGAMODE;
178 	WREG_ECRT(0x03, crtcext3);
179 
180 	WREG_ECRT(0x04, 0x00);
181 
182 	misc = RREG8(MGA_MISC_IN);
183 	misc |= MGAREG_MISC_RAMMAPEN |
184 		MGAREG_MISC_HIGH_PG_SEL;
185 	WREG8(MGA_MISC_OUT, misc);
186 
187 	mutex_unlock(&mdev->rmmio_lock);
188 
189 	return 0;
190 }
191 
192 /*
193  * PCI driver
194  */
195 
196 static const struct pci_device_id mgag200_pciidlist[] = {
197 	{ PCI_VENDOR_ID_MATROX, 0x520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_PCI },
198 	{ PCI_VENDOR_ID_MATROX, 0x521, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_AGP },
199 	{ PCI_VENDOR_ID_MATROX, 0x522, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_A },
200 	{ PCI_VENDOR_ID_MATROX, 0x524, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_B },
201 	{ PCI_VENDOR_ID_MATROX, 0x530, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EV },
202 	{ PCI_VENDOR_ID_MATROX, 0x532, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_WB },
203 	{ PCI_VENDOR_ID_MATROX, 0x533, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EH },
204 	{ PCI_VENDOR_ID_MATROX, 0x534, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_ER },
205 	{ PCI_VENDOR_ID_MATROX, 0x536, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EW3 },
206 	{ PCI_VENDOR_ID_MATROX, 0x538, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EH3 },
207 	{0,}
208 };
209 
210 MODULE_DEVICE_TABLE(pci, mgag200_pciidlist);
211 
212 static int
213 mgag200_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
214 {
215 	enum mga_type type = (enum mga_type)ent->driver_data;
216 	struct mga_device *mdev;
217 	struct drm_device *dev;
218 	int ret;
219 
220 	ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &mgag200_driver);
221 	if (ret)
222 		return ret;
223 
224 	ret = pcim_enable_device(pdev);
225 	if (ret)
226 		return ret;
227 
228 	switch (type) {
229 	case G200_PCI:
230 	case G200_AGP:
231 		mdev = mgag200_g200_device_create(pdev, &mgag200_driver);
232 		break;
233 	case G200_SE_A:
234 	case G200_SE_B:
235 		mdev = mgag200_g200se_device_create(pdev, &mgag200_driver, type);
236 		break;
237 	case G200_WB:
238 		mdev = mgag200_g200wb_device_create(pdev, &mgag200_driver);
239 		break;
240 	case G200_EV:
241 		mdev = mgag200_g200ev_device_create(pdev, &mgag200_driver);
242 		break;
243 	case G200_EH:
244 		mdev = mgag200_g200eh_device_create(pdev, &mgag200_driver);
245 		break;
246 	case G200_EH3:
247 		mdev = mgag200_g200eh3_device_create(pdev, &mgag200_driver);
248 		break;
249 	case G200_ER:
250 		mdev = mgag200_g200er_device_create(pdev, &mgag200_driver);
251 		break;
252 	case G200_EW3:
253 		mdev = mgag200_g200ew3_device_create(pdev, &mgag200_driver);
254 		break;
255 	default:
256 		dev_err(&pdev->dev, "Device type %d is unsupported\n", type);
257 		return -ENODEV;
258 	}
259 	if (IS_ERR(mdev))
260 		return PTR_ERR(mdev);
261 	dev = &mdev->base;
262 
263 	ret = drm_dev_register(dev, 0);
264 	if (ret)
265 		return ret;
266 
267 	/*
268 	 * FIXME: A 24-bit color depth does not work with 24 bpp on
269 	 * G200ER. Force 32 bpp.
270 	 */
271 	drm_fbdev_generic_setup(dev, 32);
272 
273 	return 0;
274 }
275 
276 static void mgag200_pci_remove(struct pci_dev *pdev)
277 {
278 	struct drm_device *dev = pci_get_drvdata(pdev);
279 
280 	drm_dev_unregister(dev);
281 }
282 
283 static struct pci_driver mgag200_pci_driver = {
284 	.name = DRIVER_NAME,
285 	.id_table = mgag200_pciidlist,
286 	.probe = mgag200_pci_probe,
287 	.remove = mgag200_pci_remove,
288 };
289 
290 drm_module_pci_driver_if_modeset(mgag200_pci_driver, mgag200_modeset);
291 
292 MODULE_AUTHOR(DRIVER_AUTHOR);
293 MODULE_DESCRIPTION(DRIVER_DESC);
294 MODULE_LICENSE("GPL");
295