1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright 2012 Red Hat 4 * 5 * Authors: Matthew Garrett 6 * Dave Airlie 7 */ 8 9 #include <linux/module.h> 10 #include <linux/pci.h> 11 #include <linux/vmalloc.h> 12 13 #include <drm/drm_aperture.h> 14 #include <drm/drm_drv.h> 15 #include <drm/drm_file.h> 16 #include <drm/drm_ioctl.h> 17 #include <drm/drm_module.h> 18 #include <drm/drm_pciids.h> 19 20 #include "mgag200_drv.h" 21 22 int mgag200_modeset = -1; 23 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); 24 module_param_named(modeset, mgag200_modeset, int, 0400); 25 26 /* 27 * DRM driver 28 */ 29 30 DEFINE_DRM_GEM_FOPS(mgag200_driver_fops); 31 32 static const struct drm_driver mgag200_driver = { 33 .driver_features = DRIVER_ATOMIC | DRIVER_GEM | DRIVER_MODESET, 34 .fops = &mgag200_driver_fops, 35 .name = DRIVER_NAME, 36 .desc = DRIVER_DESC, 37 .date = DRIVER_DATE, 38 .major = DRIVER_MAJOR, 39 .minor = DRIVER_MINOR, 40 .patchlevel = DRIVER_PATCHLEVEL, 41 DRM_GEM_SHMEM_DRIVER_OPS, 42 }; 43 44 /* 45 * DRM device 46 */ 47 48 static bool mgag200_has_sgram(struct mga_device *mdev) 49 { 50 struct drm_device *dev = &mdev->base; 51 struct pci_dev *pdev = to_pci_dev(dev->dev); 52 u32 option; 53 int ret; 54 55 ret = pci_read_config_dword(pdev, PCI_MGA_OPTION, &option); 56 if (drm_WARN(dev, ret, "failed to read PCI config dword: %d\n", ret)) 57 return false; 58 59 return !!(option & PCI_MGA_OPTION_HARDPWMSK); 60 } 61 62 static int mgag200_regs_init(struct mga_device *mdev) 63 { 64 struct drm_device *dev = &mdev->base; 65 struct pci_dev *pdev = to_pci_dev(dev->dev); 66 u32 option, option2; 67 u8 crtcext3; 68 69 switch (mdev->type) { 70 case G200_PCI: 71 case G200_AGP: 72 if (mgag200_has_sgram(mdev)) 73 option = 0x4049cd21; 74 else 75 option = 0x40499121; 76 option2 = 0x00008000; 77 break; 78 case G200_SE_A: 79 case G200_SE_B: 80 option = 0x40049120; 81 if (mgag200_has_sgram(mdev)) 82 option |= PCI_MGA_OPTION_HARDPWMSK; 83 option2 = 0x00008000; 84 break; 85 case G200_WB: 86 case G200_EW3: 87 option = 0x41049120; 88 option2 = 0x0000b000; 89 break; 90 case G200_EV: 91 option = 0x00000120; 92 option2 = 0x0000b000; 93 break; 94 case G200_EH: 95 case G200_EH3: 96 option = 0x00000120; 97 option2 = 0x0000b000; 98 break; 99 default: 100 option = 0; 101 option2 = 0; 102 } 103 104 if (option) 105 pci_write_config_dword(pdev, PCI_MGA_OPTION, option); 106 if (option2) 107 pci_write_config_dword(pdev, PCI_MGA_OPTION2, option2); 108 109 /* BAR 1 contains registers */ 110 mdev->rmmio_base = pci_resource_start(pdev, 1); 111 mdev->rmmio_size = pci_resource_len(pdev, 1); 112 113 if (!devm_request_mem_region(dev->dev, mdev->rmmio_base, 114 mdev->rmmio_size, "mgadrmfb_mmio")) { 115 drm_err(dev, "can't reserve mmio registers\n"); 116 return -ENOMEM; 117 } 118 119 mdev->rmmio = pcim_iomap(pdev, 1, 0); 120 if (mdev->rmmio == NULL) 121 return -ENOMEM; 122 123 RREG_ECRT(0x03, crtcext3); 124 crtcext3 |= MGAREG_CRTCEXT3_MGAMODE; 125 WREG_ECRT(0x03, crtcext3); 126 127 return 0; 128 } 129 130 static void mgag200_g200_interpret_bios(struct mga_device *mdev, 131 const unsigned char *bios, 132 size_t size) 133 { 134 static const char matrox[] = {'M', 'A', 'T', 'R', 'O', 'X'}; 135 static const unsigned int expected_length[6] = { 136 0, 64, 64, 64, 128, 128 137 }; 138 struct drm_device *dev = &mdev->base; 139 const unsigned char *pins; 140 unsigned int pins_len, version; 141 int offset; 142 int tmp; 143 144 /* Test for MATROX string. */ 145 if (size < 45 + sizeof(matrox)) 146 return; 147 if (memcmp(&bios[45], matrox, sizeof(matrox)) != 0) 148 return; 149 150 /* Get the PInS offset. */ 151 if (size < MGA_BIOS_OFFSET + 2) 152 return; 153 offset = (bios[MGA_BIOS_OFFSET + 1] << 8) | bios[MGA_BIOS_OFFSET]; 154 155 /* Get PInS data structure. */ 156 157 if (size < offset + 6) 158 return; 159 pins = bios + offset; 160 if (pins[0] == 0x2e && pins[1] == 0x41) { 161 version = pins[5]; 162 pins_len = pins[2]; 163 } else { 164 version = 1; 165 pins_len = pins[0] + (pins[1] << 8); 166 } 167 168 if (version < 1 || version > 5) { 169 drm_warn(dev, "Unknown BIOS PInS version: %d\n", version); 170 return; 171 } 172 if (pins_len != expected_length[version]) { 173 drm_warn(dev, "Unexpected BIOS PInS size: %d expected: %d\n", 174 pins_len, expected_length[version]); 175 return; 176 } 177 if (size < offset + pins_len) 178 return; 179 180 drm_dbg_kms(dev, "MATROX BIOS PInS version %d size: %d found\n", 181 version, pins_len); 182 183 /* Extract the clock values */ 184 185 switch (version) { 186 case 1: 187 tmp = pins[24] + (pins[25] << 8); 188 if (tmp) 189 mdev->model.g200.pclk_max = tmp * 10; 190 break; 191 case 2: 192 if (pins[41] != 0xff) 193 mdev->model.g200.pclk_max = (pins[41] + 100) * 1000; 194 break; 195 case 3: 196 if (pins[36] != 0xff) 197 mdev->model.g200.pclk_max = (pins[36] + 100) * 1000; 198 if (pins[52] & 0x20) 199 mdev->model.g200.ref_clk = 14318; 200 break; 201 case 4: 202 if (pins[39] != 0xff) 203 mdev->model.g200.pclk_max = pins[39] * 4 * 1000; 204 if (pins[92] & 0x01) 205 mdev->model.g200.ref_clk = 14318; 206 break; 207 case 5: 208 tmp = pins[4] ? 8000 : 6000; 209 if (pins[123] != 0xff) 210 mdev->model.g200.pclk_min = pins[123] * tmp; 211 if (pins[38] != 0xff) 212 mdev->model.g200.pclk_max = pins[38] * tmp; 213 if (pins[110] & 0x01) 214 mdev->model.g200.ref_clk = 14318; 215 break; 216 default: 217 break; 218 } 219 } 220 221 static void mgag200_g200_init_refclk(struct mga_device *mdev) 222 { 223 struct drm_device *dev = &mdev->base; 224 struct pci_dev *pdev = to_pci_dev(dev->dev); 225 unsigned char __iomem *rom; 226 unsigned char *bios; 227 size_t size; 228 229 mdev->model.g200.pclk_min = 50000; 230 mdev->model.g200.pclk_max = 230000; 231 mdev->model.g200.ref_clk = 27050; 232 233 rom = pci_map_rom(pdev, &size); 234 if (!rom) 235 return; 236 237 bios = vmalloc(size); 238 if (!bios) 239 goto out; 240 memcpy_fromio(bios, rom, size); 241 242 if (size != 0 && bios[0] == 0x55 && bios[1] == 0xaa) 243 mgag200_g200_interpret_bios(mdev, bios, size); 244 245 drm_dbg_kms(dev, "pclk_min: %ld pclk_max: %ld ref_clk: %ld\n", 246 mdev->model.g200.pclk_min, mdev->model.g200.pclk_max, 247 mdev->model.g200.ref_clk); 248 249 vfree(bios); 250 out: 251 pci_unmap_rom(pdev, rom); 252 } 253 254 static void mgag200_g200se_init_unique_id(struct mga_device *mdev) 255 { 256 struct drm_device *dev = &mdev->base; 257 258 /* stash G200 SE model number for later use */ 259 mdev->model.g200se.unique_rev_id = RREG32(0x1e24); 260 261 drm_dbg(dev, "G200 SE unique revision id is 0x%x\n", 262 mdev->model.g200se.unique_rev_id); 263 } 264 265 static struct mga_device * 266 mgag200_device_create(struct pci_dev *pdev, enum mga_type type, unsigned long flags) 267 { 268 struct mga_device *mdev; 269 struct drm_device *dev; 270 int ret; 271 272 mdev = devm_drm_dev_alloc(&pdev->dev, &mgag200_driver, struct mga_device, base); 273 if (IS_ERR(mdev)) 274 return mdev; 275 dev = &mdev->base; 276 277 pci_set_drvdata(pdev, dev); 278 279 mdev->flags = flags; 280 mdev->type = type; 281 282 ret = mgag200_regs_init(mdev); 283 if (ret) 284 return ERR_PTR(ret); 285 286 if (mdev->type == G200_PCI || mdev->type == G200_AGP) 287 mgag200_g200_init_refclk(mdev); 288 else if (IS_G200_SE(mdev)) 289 mgag200_g200se_init_unique_id(mdev); 290 291 ret = mgag200_mm_init(mdev); 292 if (ret) 293 return ERR_PTR(ret); 294 295 ret = mgag200_modeset_init(mdev); 296 if (ret) 297 return ERR_PTR(ret); 298 299 return mdev; 300 } 301 302 /* 303 * PCI driver 304 */ 305 306 static const struct pci_device_id mgag200_pciidlist[] = { 307 { PCI_VENDOR_ID_MATROX, 0x520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_PCI }, 308 { PCI_VENDOR_ID_MATROX, 0x521, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_AGP }, 309 { PCI_VENDOR_ID_MATROX, 0x522, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 310 G200_SE_A | MGAG200_FLAG_HW_BUG_NO_STARTADD}, 311 { PCI_VENDOR_ID_MATROX, 0x524, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_B }, 312 { PCI_VENDOR_ID_MATROX, 0x530, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EV }, 313 { PCI_VENDOR_ID_MATROX, 0x532, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_WB }, 314 { PCI_VENDOR_ID_MATROX, 0x533, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EH }, 315 { PCI_VENDOR_ID_MATROX, 0x534, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_ER }, 316 { PCI_VENDOR_ID_MATROX, 0x536, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EW3 }, 317 { PCI_VENDOR_ID_MATROX, 0x538, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EH3 }, 318 {0,} 319 }; 320 321 MODULE_DEVICE_TABLE(pci, mgag200_pciidlist); 322 323 static enum mga_type mgag200_type_from_driver_data(kernel_ulong_t driver_data) 324 { 325 return (enum mga_type)(driver_data & MGAG200_TYPE_MASK); 326 } 327 328 static unsigned long mgag200_flags_from_driver_data(kernel_ulong_t driver_data) 329 { 330 return driver_data & MGAG200_FLAG_MASK; 331 } 332 333 static int 334 mgag200_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 335 { 336 kernel_ulong_t driver_data = ent->driver_data; 337 enum mga_type type = mgag200_type_from_driver_data(driver_data); 338 unsigned long flags = mgag200_flags_from_driver_data(driver_data); 339 struct mga_device *mdev; 340 struct drm_device *dev; 341 int ret; 342 343 ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &mgag200_driver); 344 if (ret) 345 return ret; 346 347 ret = pcim_enable_device(pdev); 348 if (ret) 349 return ret; 350 351 mdev = mgag200_device_create(pdev, type, flags); 352 if (IS_ERR(mdev)) 353 return PTR_ERR(mdev); 354 dev = &mdev->base; 355 356 ret = drm_dev_register(dev, 0); 357 if (ret) 358 return ret; 359 360 drm_fbdev_generic_setup(dev, 0); 361 362 return 0; 363 } 364 365 static void mgag200_pci_remove(struct pci_dev *pdev) 366 { 367 struct drm_device *dev = pci_get_drvdata(pdev); 368 369 drm_dev_unregister(dev); 370 } 371 372 static struct pci_driver mgag200_pci_driver = { 373 .name = DRIVER_NAME, 374 .id_table = mgag200_pciidlist, 375 .probe = mgag200_pci_probe, 376 .remove = mgag200_pci_remove, 377 }; 378 379 drm_module_pci_driver_if_modeset(mgag200_pci_driver, mgag200_modeset); 380 381 MODULE_AUTHOR(DRIVER_AUTHOR); 382 MODULE_DESCRIPTION(DRIVER_DESC); 383 MODULE_LICENSE("GPL"); 384