1 /* 2 * Copyright (C) 2016 BayLibre, SAS 3 * Author: Neil Armstrong <narmstrong@baylibre.com> 4 * Copyright (C) 2015 Amlogic, Inc. All rights reserved. 5 * Copyright (C) 2014 Endless Mobile 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of the 10 * License, or (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but 13 * WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, see <http://www.gnu.org/licenses/>. 19 * 20 * Written by: 21 * Jasper St. Pierre <jstpierre@mecheye.net> 22 */ 23 24 #include <linux/kernel.h> 25 #include <linux/module.h> 26 #include <linux/mutex.h> 27 #include <linux/platform_device.h> 28 #include <drm/drmP.h> 29 #include <drm/drm_atomic.h> 30 #include <drm/drm_atomic_helper.h> 31 #include <drm/drm_plane_helper.h> 32 #include <drm/drm_gem_cma_helper.h> 33 #include <drm/drm_fb_cma_helper.h> 34 #include <drm/drm_rect.h> 35 36 #include "meson_plane.h" 37 #include "meson_vpp.h" 38 #include "meson_viu.h" 39 #include "meson_canvas.h" 40 #include "meson_registers.h" 41 42 struct meson_plane { 43 struct drm_plane base; 44 struct meson_drm *priv; 45 }; 46 #define to_meson_plane(x) container_of(x, struct meson_plane, base) 47 48 static int meson_plane_atomic_check(struct drm_plane *plane, 49 struct drm_plane_state *state) 50 { 51 struct drm_crtc_state *crtc_state; 52 struct drm_rect clip = { 0, }; 53 54 if (!state->crtc) 55 return 0; 56 57 crtc_state = drm_atomic_get_crtc_state(state->state, state->crtc); 58 if (IS_ERR(crtc_state)) 59 return PTR_ERR(crtc_state); 60 61 if (crtc_state->enable) 62 drm_mode_get_hv_timing(&crtc_state->mode, 63 &clip.x2, &clip.y2); 64 65 return drm_atomic_helper_check_plane_state(state, crtc_state, &clip, 66 DRM_PLANE_HELPER_NO_SCALING, 67 DRM_PLANE_HELPER_NO_SCALING, 68 true, true); 69 } 70 71 /* Takes a fixed 16.16 number and converts it to integer. */ 72 static inline int64_t fixed16_to_int(int64_t value) 73 { 74 return value >> 16; 75 } 76 77 static void meson_plane_atomic_update(struct drm_plane *plane, 78 struct drm_plane_state *old_state) 79 { 80 struct meson_plane *meson_plane = to_meson_plane(plane); 81 struct drm_plane_state *state = plane->state; 82 struct drm_framebuffer *fb = state->fb; 83 struct meson_drm *priv = meson_plane->priv; 84 struct drm_gem_cma_object *gem; 85 struct drm_rect src = { 86 .x1 = (state->src_x), 87 .y1 = (state->src_y), 88 .x2 = (state->src_x + state->src_w), 89 .y2 = (state->src_y + state->src_h), 90 }; 91 struct drm_rect dest = { 92 .x1 = state->crtc_x, 93 .y1 = state->crtc_y, 94 .x2 = state->crtc_x + state->crtc_w, 95 .y2 = state->crtc_y + state->crtc_h, 96 }; 97 unsigned long flags; 98 99 /* 100 * Update Coordinates 101 * Update Formats 102 * Update Buffer 103 * Enable Plane 104 */ 105 spin_lock_irqsave(&priv->drm->event_lock, flags); 106 107 /* Enable OSD and BLK0, set max global alpha */ 108 priv->viu.osd1_ctrl_stat = OSD_ENABLE | 109 (0xFF << OSD_GLOBAL_ALPHA_SHIFT) | 110 OSD_BLK0_ENABLE; 111 112 /* Set up BLK0 to point to the right canvas */ 113 priv->viu.osd1_blk0_cfg[0] = ((MESON_CANVAS_ID_OSD1 << OSD_CANVAS_SEL) | 114 OSD_ENDIANNESS_LE); 115 116 /* On GXBB, Use the old non-HDR RGB2YUV converter */ 117 if (meson_vpu_is_compatible(priv, "amlogic,meson-gxbb-vpu")) 118 priv->viu.osd1_blk0_cfg[0] |= OSD_OUTPUT_COLOR_RGB; 119 120 switch (fb->format->format) { 121 case DRM_FORMAT_XRGB8888: 122 /* For XRGB, replace the pixel's alpha by 0xFF */ 123 writel_bits_relaxed(OSD_REPLACE_EN, OSD_REPLACE_EN, 124 priv->io_base + _REG(VIU_OSD1_CTRL_STAT2)); 125 priv->viu.osd1_blk0_cfg[0] |= OSD_BLK_MODE_32 | 126 OSD_COLOR_MATRIX_32_ARGB; 127 break; 128 case DRM_FORMAT_ARGB8888: 129 /* For ARGB, use the pixel's alpha */ 130 writel_bits_relaxed(OSD_REPLACE_EN, 0, 131 priv->io_base + _REG(VIU_OSD1_CTRL_STAT2)); 132 priv->viu.osd1_blk0_cfg[0] |= OSD_BLK_MODE_32 | 133 OSD_COLOR_MATRIX_32_ARGB; 134 break; 135 case DRM_FORMAT_RGB888: 136 priv->viu.osd1_blk0_cfg[0] |= OSD_BLK_MODE_24 | 137 OSD_COLOR_MATRIX_24_RGB; 138 break; 139 case DRM_FORMAT_RGB565: 140 priv->viu.osd1_blk0_cfg[0] |= OSD_BLK_MODE_16 | 141 OSD_COLOR_MATRIX_16_RGB565; 142 break; 143 }; 144 145 if (state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) { 146 priv->viu.osd1_interlace = true; 147 148 dest.y1 /= 2; 149 dest.y2 /= 2; 150 } else 151 priv->viu.osd1_interlace = false; 152 153 /* 154 * The format of these registers is (x2 << 16 | x1), 155 * where x2 is exclusive. 156 * e.g. +30x1920 would be (1919 << 16) | 30 157 */ 158 priv->viu.osd1_blk0_cfg[1] = ((fixed16_to_int(src.x2) - 1) << 16) | 159 fixed16_to_int(src.x1); 160 priv->viu.osd1_blk0_cfg[2] = ((fixed16_to_int(src.y2) - 1) << 16) | 161 fixed16_to_int(src.y1); 162 priv->viu.osd1_blk0_cfg[3] = ((dest.x2 - 1) << 16) | dest.x1; 163 priv->viu.osd1_blk0_cfg[4] = ((dest.y2 - 1) << 16) | dest.y1; 164 165 /* Update Canvas with buffer address */ 166 gem = drm_fb_cma_get_gem_obj(fb, 0); 167 168 meson_canvas_setup(priv, MESON_CANVAS_ID_OSD1, 169 gem->paddr, fb->pitches[0], 170 fb->height, MESON_CANVAS_WRAP_NONE, 171 MESON_CANVAS_BLKMODE_LINEAR); 172 173 spin_unlock_irqrestore(&priv->drm->event_lock, flags); 174 } 175 176 static void meson_plane_atomic_disable(struct drm_plane *plane, 177 struct drm_plane_state *old_state) 178 { 179 struct meson_plane *meson_plane = to_meson_plane(plane); 180 struct meson_drm *priv = meson_plane->priv; 181 182 /* Disable OSD1 */ 183 writel_bits_relaxed(VPP_OSD1_POSTBLEND, 0, 184 priv->io_base + _REG(VPP_MISC)); 185 186 } 187 188 static const struct drm_plane_helper_funcs meson_plane_helper_funcs = { 189 .atomic_check = meson_plane_atomic_check, 190 .atomic_disable = meson_plane_atomic_disable, 191 .atomic_update = meson_plane_atomic_update, 192 }; 193 194 static const struct drm_plane_funcs meson_plane_funcs = { 195 .update_plane = drm_atomic_helper_update_plane, 196 .disable_plane = drm_atomic_helper_disable_plane, 197 .destroy = drm_plane_cleanup, 198 .reset = drm_atomic_helper_plane_reset, 199 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, 200 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, 201 }; 202 203 static const uint32_t supported_drm_formats[] = { 204 DRM_FORMAT_ARGB8888, 205 DRM_FORMAT_XRGB8888, 206 DRM_FORMAT_RGB888, 207 DRM_FORMAT_RGB565, 208 }; 209 210 int meson_plane_create(struct meson_drm *priv) 211 { 212 struct meson_plane *meson_plane; 213 struct drm_plane *plane; 214 215 meson_plane = devm_kzalloc(priv->drm->dev, sizeof(*meson_plane), 216 GFP_KERNEL); 217 if (!meson_plane) 218 return -ENOMEM; 219 220 meson_plane->priv = priv; 221 plane = &meson_plane->base; 222 223 drm_universal_plane_init(priv->drm, plane, 0xFF, 224 &meson_plane_funcs, 225 supported_drm_formats, 226 ARRAY_SIZE(supported_drm_formats), 227 NULL, 228 DRM_PLANE_TYPE_PRIMARY, "meson_primary_plane"); 229 230 drm_plane_helper_add(plane, &meson_plane_helper_funcs); 231 232 priv->primary_plane = plane; 233 234 return 0; 235 } 236