1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2016 BayLibre, SAS 4 * Author: Neil Armstrong <narmstrong@baylibre.com> 5 * Copyright (C) 2014 Endless Mobile 6 * 7 * Written by: 8 * Jasper St. Pierre <jstpierre@mecheye.net> 9 */ 10 11 #include <linux/component.h> 12 #include <linux/module.h> 13 #include <linux/of_graph.h> 14 #include <linux/platform_device.h> 15 #include <linux/soc/amlogic/meson-canvas.h> 16 17 #include <drm/drm_atomic_helper.h> 18 #include <drm/drm_drv.h> 19 #include <drm/drm_fb_helper.h> 20 #include <drm/drm_gem_cma_helper.h> 21 #include <drm/drm_gem_framebuffer_helper.h> 22 #include <drm/drm_irq.h> 23 #include <drm/drm_modeset_helper_vtables.h> 24 #include <drm/drm_probe_helper.h> 25 #include <drm/drm_vblank.h> 26 27 #include "meson_crtc.h" 28 #include "meson_drv.h" 29 #include "meson_overlay.h" 30 #include "meson_plane.h" 31 #include "meson_registers.h" 32 #include "meson_venc_cvbs.h" 33 #include "meson_viu.h" 34 #include "meson_vpp.h" 35 36 #define DRIVER_NAME "meson" 37 #define DRIVER_DESC "Amlogic Meson DRM driver" 38 39 /** 40 * DOC: Video Processing Unit 41 * 42 * VPU Handles the Global Video Processing, it includes management of the 43 * clocks gates, blocks reset lines and power domains. 44 * 45 * What is missing : 46 * 47 * - Full reset of entire video processing HW blocks 48 * - Scaling and setup of the VPU clock 49 * - Bus clock gates 50 * - Powering up video processing HW blocks 51 * - Powering Up HDMI controller and PHY 52 */ 53 54 static const struct drm_mode_config_funcs meson_mode_config_funcs = { 55 .atomic_check = drm_atomic_helper_check, 56 .atomic_commit = drm_atomic_helper_commit, 57 .fb_create = drm_gem_fb_create, 58 }; 59 60 static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = { 61 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm, 62 }; 63 64 static irqreturn_t meson_irq(int irq, void *arg) 65 { 66 struct drm_device *dev = arg; 67 struct meson_drm *priv = dev->dev_private; 68 69 (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG)); 70 71 meson_crtc_irq(priv); 72 73 return IRQ_HANDLED; 74 } 75 76 static int meson_dumb_create(struct drm_file *file, struct drm_device *dev, 77 struct drm_mode_create_dumb *args) 78 { 79 /* 80 * We need 64bytes aligned stride, and PAGE aligned size 81 */ 82 args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64); 83 args->size = PAGE_ALIGN(args->pitch * args->height); 84 85 return drm_gem_cma_dumb_create_internal(file, dev, args); 86 } 87 88 DEFINE_DRM_GEM_CMA_FOPS(fops); 89 90 static struct drm_driver meson_driver = { 91 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, 92 93 /* IRQ */ 94 .irq_handler = meson_irq, 95 96 /* PRIME Ops */ 97 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 98 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 99 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, 100 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, 101 .gem_prime_vmap = drm_gem_cma_prime_vmap, 102 .gem_prime_vunmap = drm_gem_cma_prime_vunmap, 103 .gem_prime_mmap = drm_gem_cma_prime_mmap, 104 105 /* GEM Ops */ 106 .dumb_create = meson_dumb_create, 107 .gem_free_object_unlocked = drm_gem_cma_free_object, 108 .gem_vm_ops = &drm_gem_cma_vm_ops, 109 110 /* Misc */ 111 .fops = &fops, 112 .name = DRIVER_NAME, 113 .desc = DRIVER_DESC, 114 .date = "20161109", 115 .major = 1, 116 .minor = 0, 117 }; 118 119 static bool meson_vpu_has_available_connectors(struct device *dev) 120 { 121 struct device_node *ep, *remote; 122 123 /* Parses each endpoint and check if remote exists */ 124 for_each_endpoint_of_node(dev->of_node, ep) { 125 /* If the endpoint node exists, consider it enabled */ 126 remote = of_graph_get_remote_port(ep); 127 if (remote) 128 return true; 129 } 130 131 return false; 132 } 133 134 static struct regmap_config meson_regmap_config = { 135 .reg_bits = 32, 136 .val_bits = 32, 137 .reg_stride = 4, 138 .max_register = 0x1000, 139 }; 140 141 static void meson_vpu_init(struct meson_drm *priv) 142 { 143 writel_relaxed(0x210000, priv->io_base + _REG(VPU_RDARB_MODE_L1C1)); 144 writel_relaxed(0x10000, priv->io_base + _REG(VPU_RDARB_MODE_L1C2)); 145 writel_relaxed(0x900000, priv->io_base + _REG(VPU_RDARB_MODE_L2C1)); 146 writel_relaxed(0x20000, priv->io_base + _REG(VPU_WRARB_MODE_L2C1)); 147 } 148 149 static void meson_remove_framebuffers(void) 150 { 151 struct apertures_struct *ap; 152 153 ap = alloc_apertures(1); 154 if (!ap) 155 return; 156 157 /* The framebuffer can be located anywhere in RAM */ 158 ap->ranges[0].base = 0; 159 ap->ranges[0].size = ~0; 160 161 drm_fb_helper_remove_conflicting_framebuffers(ap, "meson-drm-fb", 162 false); 163 kfree(ap); 164 } 165 166 static int meson_drv_bind_master(struct device *dev, bool has_components) 167 { 168 struct platform_device *pdev = to_platform_device(dev); 169 struct meson_drm *priv; 170 struct drm_device *drm; 171 struct resource *res; 172 void __iomem *regs; 173 int ret; 174 175 /* Checks if an output connector is available */ 176 if (!meson_vpu_has_available_connectors(dev)) { 177 dev_err(dev, "No output connector available\n"); 178 return -ENODEV; 179 } 180 181 drm = drm_dev_alloc(&meson_driver, dev); 182 if (IS_ERR(drm)) 183 return PTR_ERR(drm); 184 185 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 186 if (!priv) { 187 ret = -ENOMEM; 188 goto free_drm; 189 } 190 drm->dev_private = priv; 191 priv->drm = drm; 192 priv->dev = dev; 193 194 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu"); 195 regs = devm_ioremap_resource(dev, res); 196 if (IS_ERR(regs)) { 197 ret = PTR_ERR(regs); 198 goto free_drm; 199 } 200 201 priv->io_base = regs; 202 203 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi"); 204 if (!res) { 205 ret = -EINVAL; 206 goto free_drm; 207 } 208 /* Simply ioremap since it may be a shared register zone */ 209 regs = devm_ioremap(dev, res->start, resource_size(res)); 210 if (!regs) { 211 ret = -EADDRNOTAVAIL; 212 goto free_drm; 213 } 214 215 priv->hhi = devm_regmap_init_mmio(dev, regs, 216 &meson_regmap_config); 217 if (IS_ERR(priv->hhi)) { 218 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n"); 219 ret = PTR_ERR(priv->hhi); 220 goto free_drm; 221 } 222 223 priv->canvas = meson_canvas_get(dev); 224 if (IS_ERR(priv->canvas)) { 225 ret = PTR_ERR(priv->canvas); 226 goto free_drm; 227 } 228 229 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1); 230 if (ret) 231 goto free_drm; 232 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0); 233 if (ret) { 234 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 235 goto free_drm; 236 } 237 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1); 238 if (ret) { 239 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 240 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 241 goto free_drm; 242 } 243 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2); 244 if (ret) { 245 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 246 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 247 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); 248 goto free_drm; 249 } 250 251 priv->vsync_irq = platform_get_irq(pdev, 0); 252 253 ret = drm_vblank_init(drm, 1); 254 if (ret) 255 goto free_drm; 256 257 /* Remove early framebuffers (ie. simplefb) */ 258 meson_remove_framebuffers(); 259 260 drm_mode_config_init(drm); 261 drm->mode_config.max_width = 3840; 262 drm->mode_config.max_height = 2160; 263 drm->mode_config.funcs = &meson_mode_config_funcs; 264 drm->mode_config.helper_private = &meson_mode_config_helpers; 265 266 /* Hardware Initialization */ 267 268 meson_vpu_init(priv); 269 meson_venc_init(priv); 270 meson_vpp_init(priv); 271 meson_viu_init(priv); 272 273 /* Encoder Initialization */ 274 275 ret = meson_venc_cvbs_create(priv); 276 if (ret) 277 goto free_drm; 278 279 if (has_components) { 280 ret = component_bind_all(drm->dev, drm); 281 if (ret) { 282 dev_err(drm->dev, "Couldn't bind all components\n"); 283 goto free_drm; 284 } 285 } 286 287 ret = meson_plane_create(priv); 288 if (ret) 289 goto free_drm; 290 291 ret = meson_overlay_create(priv); 292 if (ret) 293 goto free_drm; 294 295 ret = meson_crtc_create(priv); 296 if (ret) 297 goto free_drm; 298 299 ret = drm_irq_install(drm, priv->vsync_irq); 300 if (ret) 301 goto free_drm; 302 303 drm_mode_config_reset(drm); 304 305 drm_kms_helper_poll_init(drm); 306 307 platform_set_drvdata(pdev, priv); 308 309 ret = drm_dev_register(drm, 0); 310 if (ret) 311 goto uninstall_irq; 312 313 drm_fbdev_generic_setup(drm, 32); 314 315 return 0; 316 317 uninstall_irq: 318 drm_irq_uninstall(drm); 319 free_drm: 320 drm_dev_put(drm); 321 322 return ret; 323 } 324 325 static int meson_drv_bind(struct device *dev) 326 { 327 return meson_drv_bind_master(dev, true); 328 } 329 330 static void meson_drv_unbind(struct device *dev) 331 { 332 struct meson_drm *priv = dev_get_drvdata(dev); 333 struct drm_device *drm = priv->drm; 334 335 if (priv->canvas) { 336 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 337 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 338 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); 339 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2); 340 } 341 342 drm_dev_unregister(drm); 343 drm_irq_uninstall(drm); 344 drm_kms_helper_poll_fini(drm); 345 drm_mode_config_cleanup(drm); 346 drm_dev_put(drm); 347 348 } 349 350 static const struct component_master_ops meson_drv_master_ops = { 351 .bind = meson_drv_bind, 352 .unbind = meson_drv_unbind, 353 }; 354 355 static int compare_of(struct device *dev, void *data) 356 { 357 DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n", 358 dev->of_node, data); 359 360 return dev->of_node == data; 361 } 362 363 /* Possible connectors nodes to ignore */ 364 static const struct of_device_id connectors_match[] = { 365 { .compatible = "composite-video-connector" }, 366 { .compatible = "svideo-connector" }, 367 { .compatible = "hdmi-connector" }, 368 { .compatible = "dvi-connector" }, 369 {} 370 }; 371 372 static int meson_probe_remote(struct platform_device *pdev, 373 struct component_match **match, 374 struct device_node *parent, 375 struct device_node *remote) 376 { 377 struct device_node *ep, *remote_node; 378 int count = 1; 379 380 /* If node is a connector, return and do not add to match table */ 381 if (of_match_node(connectors_match, remote)) 382 return 1; 383 384 component_match_add(&pdev->dev, match, compare_of, remote); 385 386 for_each_endpoint_of_node(remote, ep) { 387 remote_node = of_graph_get_remote_port_parent(ep); 388 if (!remote_node || 389 remote_node == parent || /* Ignore parent endpoint */ 390 !of_device_is_available(remote_node)) { 391 of_node_put(remote_node); 392 continue; 393 } 394 395 count += meson_probe_remote(pdev, match, remote, remote_node); 396 397 of_node_put(remote_node); 398 } 399 400 return count; 401 } 402 403 static int meson_drv_probe(struct platform_device *pdev) 404 { 405 struct component_match *match = NULL; 406 struct device_node *np = pdev->dev.of_node; 407 struct device_node *ep, *remote; 408 int count = 0; 409 410 for_each_endpoint_of_node(np, ep) { 411 remote = of_graph_get_remote_port_parent(ep); 412 if (!remote || !of_device_is_available(remote)) { 413 of_node_put(remote); 414 continue; 415 } 416 417 count += meson_probe_remote(pdev, &match, np, remote); 418 of_node_put(remote); 419 } 420 421 if (count && !match) 422 return meson_drv_bind_master(&pdev->dev, false); 423 424 /* If some endpoints were found, initialize the nodes */ 425 if (count) { 426 dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count); 427 428 return component_master_add_with_match(&pdev->dev, 429 &meson_drv_master_ops, 430 match); 431 } 432 433 /* If no output endpoints were available, simply bail out */ 434 return 0; 435 }; 436 437 static const struct of_device_id dt_match[] = { 438 { .compatible = "amlogic,meson-gxbb-vpu" }, 439 { .compatible = "amlogic,meson-gxl-vpu" }, 440 { .compatible = "amlogic,meson-gxm-vpu" }, 441 { .compatible = "amlogic,meson-g12a-vpu" }, 442 {} 443 }; 444 MODULE_DEVICE_TABLE(of, dt_match); 445 446 static struct platform_driver meson_drm_platform_driver = { 447 .probe = meson_drv_probe, 448 .driver = { 449 .name = "meson-drm", 450 .of_match_table = dt_match, 451 }, 452 }; 453 454 module_platform_driver(meson_drm_platform_driver); 455 456 MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>"); 457 MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>"); 458 MODULE_DESCRIPTION(DRIVER_DESC); 459 MODULE_LICENSE("GPL"); 460