1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2016 BayLibre, SAS 4 * Author: Neil Armstrong <narmstrong@baylibre.com> 5 * Copyright (C) 2014 Endless Mobile 6 * 7 * Written by: 8 * Jasper St. Pierre <jstpierre@mecheye.net> 9 */ 10 11 #include <linux/component.h> 12 #include <linux/module.h> 13 #include <linux/of_graph.h> 14 #include <linux/platform_device.h> 15 #include <linux/soc/amlogic/meson-canvas.h> 16 17 #include <drm/drm_atomic_helper.h> 18 #include <drm/drm_drv.h> 19 #include <drm/drm_fb_helper.h> 20 #include <drm/drm_gem_cma_helper.h> 21 #include <drm/drm_gem_framebuffer_helper.h> 22 #include <drm/drm_irq.h> 23 #include <drm/drm_modeset_helper_vtables.h> 24 #include <drm/drm_probe_helper.h> 25 #include <drm/drm_vblank.h> 26 27 #include "meson_crtc.h" 28 #include "meson_drv.h" 29 #include "meson_overlay.h" 30 #include "meson_plane.h" 31 #include "meson_osd_afbcd.h" 32 #include "meson_registers.h" 33 #include "meson_venc_cvbs.h" 34 #include "meson_viu.h" 35 #include "meson_vpp.h" 36 #include "meson_rdma.h" 37 38 #define DRIVER_NAME "meson" 39 #define DRIVER_DESC "Amlogic Meson DRM driver" 40 41 /** 42 * DOC: Video Processing Unit 43 * 44 * VPU Handles the Global Video Processing, it includes management of the 45 * clocks gates, blocks reset lines and power domains. 46 * 47 * What is missing : 48 * 49 * - Full reset of entire video processing HW blocks 50 * - Scaling and setup of the VPU clock 51 * - Bus clock gates 52 * - Powering up video processing HW blocks 53 * - Powering Up HDMI controller and PHY 54 */ 55 56 static const struct drm_mode_config_funcs meson_mode_config_funcs = { 57 .atomic_check = drm_atomic_helper_check, 58 .atomic_commit = drm_atomic_helper_commit, 59 .fb_create = drm_gem_fb_create, 60 }; 61 62 static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = { 63 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm, 64 }; 65 66 static irqreturn_t meson_irq(int irq, void *arg) 67 { 68 struct drm_device *dev = arg; 69 struct meson_drm *priv = dev->dev_private; 70 71 (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG)); 72 73 meson_crtc_irq(priv); 74 75 return IRQ_HANDLED; 76 } 77 78 static int meson_dumb_create(struct drm_file *file, struct drm_device *dev, 79 struct drm_mode_create_dumb *args) 80 { 81 /* 82 * We need 64bytes aligned stride, and PAGE aligned size 83 */ 84 args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64); 85 args->size = PAGE_ALIGN(args->pitch * args->height); 86 87 return drm_gem_cma_dumb_create_internal(file, dev, args); 88 } 89 90 DEFINE_DRM_GEM_CMA_FOPS(fops); 91 92 static struct drm_driver meson_driver = { 93 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, 94 95 /* IRQ */ 96 .irq_handler = meson_irq, 97 98 /* PRIME Ops */ 99 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 100 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 101 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, 102 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, 103 .gem_prime_vmap = drm_gem_cma_prime_vmap, 104 .gem_prime_vunmap = drm_gem_cma_prime_vunmap, 105 .gem_prime_mmap = drm_gem_cma_prime_mmap, 106 107 /* GEM Ops */ 108 .dumb_create = meson_dumb_create, 109 .gem_free_object_unlocked = drm_gem_cma_free_object, 110 .gem_vm_ops = &drm_gem_cma_vm_ops, 111 112 /* Misc */ 113 .fops = &fops, 114 .name = DRIVER_NAME, 115 .desc = DRIVER_DESC, 116 .date = "20161109", 117 .major = 1, 118 .minor = 0, 119 }; 120 121 static bool meson_vpu_has_available_connectors(struct device *dev) 122 { 123 struct device_node *ep, *remote; 124 125 /* Parses each endpoint and check if remote exists */ 126 for_each_endpoint_of_node(dev->of_node, ep) { 127 /* If the endpoint node exists, consider it enabled */ 128 remote = of_graph_get_remote_port(ep); 129 if (remote) 130 return true; 131 } 132 133 return false; 134 } 135 136 static struct regmap_config meson_regmap_config = { 137 .reg_bits = 32, 138 .val_bits = 32, 139 .reg_stride = 4, 140 .max_register = 0x1000, 141 }; 142 143 static void meson_vpu_init(struct meson_drm *priv) 144 { 145 u32 value; 146 147 /* 148 * Slave dc0 and dc5 connected to master port 1. 149 * By default other slaves are connected to master port 0. 150 */ 151 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1) | 152 VPU_RDARB_SLAVE_TO_MASTER_PORT(5, 1); 153 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C1)); 154 155 /* Slave dc0 connected to master port 1 */ 156 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1); 157 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C2)); 158 159 /* Slave dc4 and dc7 connected to master port 1 */ 160 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(4, 1) | 161 VPU_RDARB_SLAVE_TO_MASTER_PORT(7, 1); 162 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L2C1)); 163 164 /* Slave dc1 connected to master port 1 */ 165 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(1, 1); 166 writel_relaxed(value, priv->io_base + _REG(VPU_WRARB_MODE_L2C1)); 167 } 168 169 static void meson_remove_framebuffers(void) 170 { 171 struct apertures_struct *ap; 172 173 ap = alloc_apertures(1); 174 if (!ap) 175 return; 176 177 /* The framebuffer can be located anywhere in RAM */ 178 ap->ranges[0].base = 0; 179 ap->ranges[0].size = ~0; 180 181 drm_fb_helper_remove_conflicting_framebuffers(ap, "meson-drm-fb", 182 false); 183 kfree(ap); 184 } 185 186 static int meson_drv_bind_master(struct device *dev, bool has_components) 187 { 188 struct platform_device *pdev = to_platform_device(dev); 189 const struct meson_drm_match_data *match; 190 struct meson_drm *priv; 191 struct drm_device *drm; 192 struct resource *res; 193 void __iomem *regs; 194 int ret; 195 196 /* Checks if an output connector is available */ 197 if (!meson_vpu_has_available_connectors(dev)) { 198 dev_err(dev, "No output connector available\n"); 199 return -ENODEV; 200 } 201 202 match = of_device_get_match_data(dev); 203 if (!match) 204 return -ENODEV; 205 206 drm = drm_dev_alloc(&meson_driver, dev); 207 if (IS_ERR(drm)) 208 return PTR_ERR(drm); 209 210 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 211 if (!priv) { 212 ret = -ENOMEM; 213 goto free_drm; 214 } 215 drm->dev_private = priv; 216 priv->drm = drm; 217 priv->dev = dev; 218 priv->compat = match->compat; 219 priv->afbcd.ops = match->afbcd_ops; 220 221 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu"); 222 regs = devm_ioremap_resource(dev, res); 223 if (IS_ERR(regs)) { 224 ret = PTR_ERR(regs); 225 goto free_drm; 226 } 227 228 priv->io_base = regs; 229 230 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi"); 231 if (!res) { 232 ret = -EINVAL; 233 goto free_drm; 234 } 235 /* Simply ioremap since it may be a shared register zone */ 236 regs = devm_ioremap(dev, res->start, resource_size(res)); 237 if (!regs) { 238 ret = -EADDRNOTAVAIL; 239 goto free_drm; 240 } 241 242 priv->hhi = devm_regmap_init_mmio(dev, regs, 243 &meson_regmap_config); 244 if (IS_ERR(priv->hhi)) { 245 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n"); 246 ret = PTR_ERR(priv->hhi); 247 goto free_drm; 248 } 249 250 priv->canvas = meson_canvas_get(dev); 251 if (IS_ERR(priv->canvas)) { 252 ret = PTR_ERR(priv->canvas); 253 goto free_drm; 254 } 255 256 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1); 257 if (ret) 258 goto free_drm; 259 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0); 260 if (ret) { 261 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 262 goto free_drm; 263 } 264 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1); 265 if (ret) { 266 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 267 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 268 goto free_drm; 269 } 270 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2); 271 if (ret) { 272 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 273 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 274 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); 275 goto free_drm; 276 } 277 278 priv->vsync_irq = platform_get_irq(pdev, 0); 279 280 ret = drm_vblank_init(drm, 1); 281 if (ret) 282 goto free_drm; 283 284 /* Remove early framebuffers (ie. simplefb) */ 285 meson_remove_framebuffers(); 286 287 drm_mode_config_init(drm); 288 drm->mode_config.max_width = 3840; 289 drm->mode_config.max_height = 2160; 290 drm->mode_config.funcs = &meson_mode_config_funcs; 291 drm->mode_config.helper_private = &meson_mode_config_helpers; 292 293 /* Hardware Initialization */ 294 295 meson_vpu_init(priv); 296 meson_venc_init(priv); 297 meson_vpp_init(priv); 298 meson_viu_init(priv); 299 if (priv->afbcd.ops) { 300 ret = priv->afbcd.ops->init(priv); 301 if (ret) 302 return ret; 303 } 304 305 /* Encoder Initialization */ 306 307 ret = meson_venc_cvbs_create(priv); 308 if (ret) 309 goto free_drm; 310 311 if (has_components) { 312 ret = component_bind_all(drm->dev, drm); 313 if (ret) { 314 dev_err(drm->dev, "Couldn't bind all components\n"); 315 goto free_drm; 316 } 317 } 318 319 ret = meson_plane_create(priv); 320 if (ret) 321 goto free_drm; 322 323 ret = meson_overlay_create(priv); 324 if (ret) 325 goto free_drm; 326 327 ret = meson_crtc_create(priv); 328 if (ret) 329 goto free_drm; 330 331 ret = drm_irq_install(drm, priv->vsync_irq); 332 if (ret) 333 goto free_drm; 334 335 drm_mode_config_reset(drm); 336 337 drm_kms_helper_poll_init(drm); 338 339 platform_set_drvdata(pdev, priv); 340 341 ret = drm_dev_register(drm, 0); 342 if (ret) 343 goto uninstall_irq; 344 345 drm_fbdev_generic_setup(drm, 32); 346 347 return 0; 348 349 uninstall_irq: 350 drm_irq_uninstall(drm); 351 free_drm: 352 drm_dev_put(drm); 353 354 return ret; 355 } 356 357 static int meson_drv_bind(struct device *dev) 358 { 359 return meson_drv_bind_master(dev, true); 360 } 361 362 static void meson_drv_unbind(struct device *dev) 363 { 364 struct meson_drm *priv = dev_get_drvdata(dev); 365 struct drm_device *drm = priv->drm; 366 367 if (priv->canvas) { 368 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 369 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 370 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); 371 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2); 372 } 373 374 if (priv->afbcd.ops) { 375 priv->afbcd.ops->reset(priv); 376 meson_rdma_free(priv); 377 } 378 379 drm_dev_unregister(drm); 380 drm_irq_uninstall(drm); 381 drm_kms_helper_poll_fini(drm); 382 drm_mode_config_cleanup(drm); 383 drm_dev_put(drm); 384 } 385 386 static const struct component_master_ops meson_drv_master_ops = { 387 .bind = meson_drv_bind, 388 .unbind = meson_drv_unbind, 389 }; 390 391 static int __maybe_unused meson_drv_pm_suspend(struct device *dev) 392 { 393 struct meson_drm *priv = dev_get_drvdata(dev); 394 395 if (!priv) 396 return 0; 397 398 return drm_mode_config_helper_suspend(priv->drm); 399 } 400 401 static int __maybe_unused meson_drv_pm_resume(struct device *dev) 402 { 403 struct meson_drm *priv = dev_get_drvdata(dev); 404 405 if (!priv) 406 return 0; 407 408 meson_vpu_init(priv); 409 meson_venc_init(priv); 410 meson_vpp_init(priv); 411 meson_viu_init(priv); 412 if (priv->afbcd.ops) 413 priv->afbcd.ops->init(priv); 414 415 drm_mode_config_helper_resume(priv->drm); 416 417 return 0; 418 } 419 420 static int compare_of(struct device *dev, void *data) 421 { 422 DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n", 423 dev->of_node, data); 424 425 return dev->of_node == data; 426 } 427 428 /* Possible connectors nodes to ignore */ 429 static const struct of_device_id connectors_match[] = { 430 { .compatible = "composite-video-connector" }, 431 { .compatible = "svideo-connector" }, 432 { .compatible = "hdmi-connector" }, 433 { .compatible = "dvi-connector" }, 434 {} 435 }; 436 437 static int meson_probe_remote(struct platform_device *pdev, 438 struct component_match **match, 439 struct device_node *parent, 440 struct device_node *remote) 441 { 442 struct device_node *ep, *remote_node; 443 int count = 1; 444 445 /* If node is a connector, return and do not add to match table */ 446 if (of_match_node(connectors_match, remote)) 447 return 1; 448 449 component_match_add(&pdev->dev, match, compare_of, remote); 450 451 for_each_endpoint_of_node(remote, ep) { 452 remote_node = of_graph_get_remote_port_parent(ep); 453 if (!remote_node || 454 remote_node == parent || /* Ignore parent endpoint */ 455 !of_device_is_available(remote_node)) { 456 of_node_put(remote_node); 457 continue; 458 } 459 460 count += meson_probe_remote(pdev, match, remote, remote_node); 461 462 of_node_put(remote_node); 463 } 464 465 return count; 466 } 467 468 static int meson_drv_probe(struct platform_device *pdev) 469 { 470 struct component_match *match = NULL; 471 struct device_node *np = pdev->dev.of_node; 472 struct device_node *ep, *remote; 473 int count = 0; 474 475 for_each_endpoint_of_node(np, ep) { 476 remote = of_graph_get_remote_port_parent(ep); 477 if (!remote || !of_device_is_available(remote)) { 478 of_node_put(remote); 479 continue; 480 } 481 482 count += meson_probe_remote(pdev, &match, np, remote); 483 of_node_put(remote); 484 } 485 486 if (count && !match) 487 return meson_drv_bind_master(&pdev->dev, false); 488 489 /* If some endpoints were found, initialize the nodes */ 490 if (count) { 491 dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count); 492 493 return component_master_add_with_match(&pdev->dev, 494 &meson_drv_master_ops, 495 match); 496 } 497 498 /* If no output endpoints were available, simply bail out */ 499 return 0; 500 }; 501 502 static struct meson_drm_match_data meson_drm_gxbb_data = { 503 .compat = VPU_COMPATIBLE_GXBB, 504 }; 505 506 static struct meson_drm_match_data meson_drm_gxl_data = { 507 .compat = VPU_COMPATIBLE_GXL, 508 }; 509 510 static struct meson_drm_match_data meson_drm_gxm_data = { 511 .compat = VPU_COMPATIBLE_GXM, 512 .afbcd_ops = &meson_afbcd_gxm_ops, 513 }; 514 515 static struct meson_drm_match_data meson_drm_g12a_data = { 516 .compat = VPU_COMPATIBLE_G12A, 517 .afbcd_ops = &meson_afbcd_g12a_ops, 518 }; 519 520 static const struct of_device_id dt_match[] = { 521 { .compatible = "amlogic,meson-gxbb-vpu", 522 .data = (void *)&meson_drm_gxbb_data }, 523 { .compatible = "amlogic,meson-gxl-vpu", 524 .data = (void *)&meson_drm_gxl_data }, 525 { .compatible = "amlogic,meson-gxm-vpu", 526 .data = (void *)&meson_drm_gxm_data }, 527 { .compatible = "amlogic,meson-g12a-vpu", 528 .data = (void *)&meson_drm_g12a_data }, 529 {} 530 }; 531 MODULE_DEVICE_TABLE(of, dt_match); 532 533 static const struct dev_pm_ops meson_drv_pm_ops = { 534 SET_SYSTEM_SLEEP_PM_OPS(meson_drv_pm_suspend, meson_drv_pm_resume) 535 }; 536 537 static struct platform_driver meson_drm_platform_driver = { 538 .probe = meson_drv_probe, 539 .driver = { 540 .name = "meson-drm", 541 .of_match_table = dt_match, 542 .pm = &meson_drv_pm_ops, 543 }, 544 }; 545 546 module_platform_driver(meson_drm_platform_driver); 547 548 MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>"); 549 MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>"); 550 MODULE_DESCRIPTION(DRIVER_DESC); 551 MODULE_LICENSE("GPL"); 552