1 /* 2 * Copyright (C) 2016 BayLibre, SAS 3 * Author: Neil Armstrong <narmstrong@baylibre.com> 4 * Copyright (C) 2014 Endless Mobile 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of the 9 * License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, but 12 * WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see <http://www.gnu.org/licenses/>. 18 * 19 * Written by: 20 * Jasper St. Pierre <jstpierre@mecheye.net> 21 */ 22 23 #include <linux/kernel.h> 24 #include <linux/module.h> 25 #include <linux/mutex.h> 26 #include <linux/platform_device.h> 27 #include <linux/component.h> 28 #include <linux/of_graph.h> 29 30 #include <drm/drmP.h> 31 #include <drm/drm_atomic.h> 32 #include <drm/drm_atomic_helper.h> 33 #include <drm/drm_fb_cma_helper.h> 34 #include <drm/drm_fb_helper.h> 35 #include <drm/drm_flip_work.h> 36 #include <drm/drm_gem_cma_helper.h> 37 #include <drm/drm_gem_framebuffer_helper.h> 38 #include <drm/drm_plane_helper.h> 39 #include <drm/drm_probe_helper.h> 40 #include <drm/drm_rect.h> 41 42 #include "meson_drv.h" 43 #include "meson_plane.h" 44 #include "meson_overlay.h" 45 #include "meson_crtc.h" 46 #include "meson_venc_cvbs.h" 47 48 #include "meson_vpp.h" 49 #include "meson_viu.h" 50 #include "meson_venc.h" 51 #include "meson_canvas.h" 52 #include "meson_registers.h" 53 54 #define DRIVER_NAME "meson" 55 #define DRIVER_DESC "Amlogic Meson DRM driver" 56 57 /** 58 * DOC: Video Processing Unit 59 * 60 * VPU Handles the Global Video Processing, it includes management of the 61 * clocks gates, blocks reset lines and power domains. 62 * 63 * What is missing : 64 * 65 * - Full reset of entire video processing HW blocks 66 * - Scaling and setup of the VPU clock 67 * - Bus clock gates 68 * - Powering up video processing HW blocks 69 * - Powering Up HDMI controller and PHY 70 */ 71 72 static const struct drm_mode_config_funcs meson_mode_config_funcs = { 73 .atomic_check = drm_atomic_helper_check, 74 .atomic_commit = drm_atomic_helper_commit, 75 .fb_create = drm_gem_fb_create, 76 }; 77 78 static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = { 79 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm, 80 }; 81 82 static irqreturn_t meson_irq(int irq, void *arg) 83 { 84 struct drm_device *dev = arg; 85 struct meson_drm *priv = dev->dev_private; 86 87 (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG)); 88 89 meson_crtc_irq(priv); 90 91 return IRQ_HANDLED; 92 } 93 94 DEFINE_DRM_GEM_CMA_FOPS(fops); 95 96 static struct drm_driver meson_driver = { 97 .driver_features = DRIVER_GEM | 98 DRIVER_MODESET | DRIVER_PRIME | 99 DRIVER_ATOMIC, 100 101 /* IRQ */ 102 .irq_handler = meson_irq, 103 104 /* PRIME Ops */ 105 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 106 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 107 .gem_prime_import = drm_gem_prime_import, 108 .gem_prime_export = drm_gem_prime_export, 109 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, 110 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, 111 .gem_prime_vmap = drm_gem_cma_prime_vmap, 112 .gem_prime_vunmap = drm_gem_cma_prime_vunmap, 113 .gem_prime_mmap = drm_gem_cma_prime_mmap, 114 115 /* GEM Ops */ 116 .dumb_create = drm_gem_cma_dumb_create, 117 .gem_free_object_unlocked = drm_gem_cma_free_object, 118 .gem_vm_ops = &drm_gem_cma_vm_ops, 119 120 /* Misc */ 121 .fops = &fops, 122 .name = DRIVER_NAME, 123 .desc = DRIVER_DESC, 124 .date = "20161109", 125 .major = 1, 126 .minor = 0, 127 }; 128 129 static bool meson_vpu_has_available_connectors(struct device *dev) 130 { 131 struct device_node *ep, *remote; 132 133 /* Parses each endpoint and check if remote exists */ 134 for_each_endpoint_of_node(dev->of_node, ep) { 135 /* If the endpoint node exists, consider it enabled */ 136 remote = of_graph_get_remote_port(ep); 137 if (remote) 138 return true; 139 } 140 141 return false; 142 } 143 144 static struct regmap_config meson_regmap_config = { 145 .reg_bits = 32, 146 .val_bits = 32, 147 .reg_stride = 4, 148 .max_register = 0x1000, 149 }; 150 151 static void meson_vpu_init(struct meson_drm *priv) 152 { 153 writel_relaxed(0x210000, priv->io_base + _REG(VPU_RDARB_MODE_L1C1)); 154 writel_relaxed(0x10000, priv->io_base + _REG(VPU_RDARB_MODE_L1C2)); 155 writel_relaxed(0x900000, priv->io_base + _REG(VPU_RDARB_MODE_L2C1)); 156 writel_relaxed(0x20000, priv->io_base + _REG(VPU_WRARB_MODE_L2C1)); 157 } 158 159 static void meson_remove_framebuffers(void) 160 { 161 struct apertures_struct *ap; 162 163 ap = alloc_apertures(1); 164 if (!ap) 165 return; 166 167 /* The framebuffer can be located anywhere in RAM */ 168 ap->ranges[0].base = 0; 169 ap->ranges[0].size = ~0; 170 171 drm_fb_helper_remove_conflicting_framebuffers(ap, "meson-drm-fb", 172 false); 173 kfree(ap); 174 } 175 176 static int meson_drv_bind_master(struct device *dev, bool has_components) 177 { 178 struct platform_device *pdev = to_platform_device(dev); 179 struct meson_drm *priv; 180 struct drm_device *drm; 181 struct resource *res; 182 void __iomem *regs; 183 int ret; 184 185 /* Checks if an output connector is available */ 186 if (!meson_vpu_has_available_connectors(dev)) { 187 dev_err(dev, "No output connector available\n"); 188 return -ENODEV; 189 } 190 191 drm = drm_dev_alloc(&meson_driver, dev); 192 if (IS_ERR(drm)) 193 return PTR_ERR(drm); 194 195 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 196 if (!priv) { 197 ret = -ENOMEM; 198 goto free_drm; 199 } 200 drm->dev_private = priv; 201 priv->drm = drm; 202 priv->dev = dev; 203 204 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu"); 205 regs = devm_ioremap_resource(dev, res); 206 if (IS_ERR(regs)) { 207 ret = PTR_ERR(regs); 208 goto free_drm; 209 } 210 211 priv->io_base = regs; 212 213 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi"); 214 if (!res) { 215 ret = -EINVAL; 216 goto free_drm; 217 } 218 /* Simply ioremap since it may be a shared register zone */ 219 regs = devm_ioremap(dev, res->start, resource_size(res)); 220 if (!regs) { 221 ret = -EADDRNOTAVAIL; 222 goto free_drm; 223 } 224 225 priv->hhi = devm_regmap_init_mmio(dev, regs, 226 &meson_regmap_config); 227 if (IS_ERR(priv->hhi)) { 228 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n"); 229 ret = PTR_ERR(priv->hhi); 230 goto free_drm; 231 } 232 233 priv->canvas = meson_canvas_get(dev); 234 if (!IS_ERR(priv->canvas)) { 235 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1); 236 if (ret) 237 goto free_drm; 238 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0); 239 if (ret) { 240 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 241 goto free_drm; 242 } 243 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1); 244 if (ret) { 245 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 246 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 247 goto free_drm; 248 } 249 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2); 250 if (ret) { 251 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 252 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 253 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); 254 goto free_drm; 255 } 256 } else { 257 priv->canvas = NULL; 258 259 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmc"); 260 if (!res) { 261 ret = -EINVAL; 262 goto free_drm; 263 } 264 /* Simply ioremap since it may be a shared register zone */ 265 regs = devm_ioremap(dev, res->start, resource_size(res)); 266 if (!regs) { 267 ret = -EADDRNOTAVAIL; 268 goto free_drm; 269 } 270 271 priv->dmc = devm_regmap_init_mmio(dev, regs, 272 &meson_regmap_config); 273 if (IS_ERR(priv->dmc)) { 274 dev_err(&pdev->dev, "Couldn't create the DMC regmap\n"); 275 ret = PTR_ERR(priv->dmc); 276 goto free_drm; 277 } 278 } 279 280 priv->vsync_irq = platform_get_irq(pdev, 0); 281 282 ret = drm_vblank_init(drm, 1); 283 if (ret) 284 goto free_drm; 285 286 /* Remove early framebuffers (ie. simplefb) */ 287 meson_remove_framebuffers(); 288 289 drm_mode_config_init(drm); 290 drm->mode_config.max_width = 3840; 291 drm->mode_config.max_height = 2160; 292 drm->mode_config.funcs = &meson_mode_config_funcs; 293 drm->mode_config.helper_private = &meson_mode_config_helpers; 294 295 /* Hardware Initialization */ 296 297 meson_vpu_init(priv); 298 meson_venc_init(priv); 299 meson_vpp_init(priv); 300 meson_viu_init(priv); 301 302 /* Encoder Initialization */ 303 304 ret = meson_venc_cvbs_create(priv); 305 if (ret) 306 goto free_drm; 307 308 if (has_components) { 309 ret = component_bind_all(drm->dev, drm); 310 if (ret) { 311 dev_err(drm->dev, "Couldn't bind all components\n"); 312 goto free_drm; 313 } 314 } 315 316 ret = meson_plane_create(priv); 317 if (ret) 318 goto free_drm; 319 320 ret = meson_overlay_create(priv); 321 if (ret) 322 goto free_drm; 323 324 ret = meson_crtc_create(priv); 325 if (ret) 326 goto free_drm; 327 328 ret = drm_irq_install(drm, priv->vsync_irq); 329 if (ret) 330 goto free_drm; 331 332 drm_mode_config_reset(drm); 333 334 drm_kms_helper_poll_init(drm); 335 336 platform_set_drvdata(pdev, priv); 337 338 ret = drm_dev_register(drm, 0); 339 if (ret) 340 goto free_drm; 341 342 drm_fbdev_generic_setup(drm, 32); 343 344 return 0; 345 346 free_drm: 347 drm_dev_put(drm); 348 349 return ret; 350 } 351 352 static int meson_drv_bind(struct device *dev) 353 { 354 return meson_drv_bind_master(dev, true); 355 } 356 357 static void meson_drv_unbind(struct device *dev) 358 { 359 struct drm_device *drm = dev_get_drvdata(dev); 360 struct meson_drm *priv = drm->dev_private; 361 362 if (priv->canvas) { 363 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 364 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 365 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); 366 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2); 367 } 368 369 drm_dev_unregister(drm); 370 drm_kms_helper_poll_fini(drm); 371 drm_mode_config_cleanup(drm); 372 drm_dev_put(drm); 373 374 } 375 376 static const struct component_master_ops meson_drv_master_ops = { 377 .bind = meson_drv_bind, 378 .unbind = meson_drv_unbind, 379 }; 380 381 static int compare_of(struct device *dev, void *data) 382 { 383 DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n", 384 dev->of_node, data); 385 386 return dev->of_node == data; 387 } 388 389 /* Possible connectors nodes to ignore */ 390 static const struct of_device_id connectors_match[] = { 391 { .compatible = "composite-video-connector" }, 392 { .compatible = "svideo-connector" }, 393 { .compatible = "hdmi-connector" }, 394 { .compatible = "dvi-connector" }, 395 {} 396 }; 397 398 static int meson_probe_remote(struct platform_device *pdev, 399 struct component_match **match, 400 struct device_node *parent, 401 struct device_node *remote) 402 { 403 struct device_node *ep, *remote_node; 404 int count = 1; 405 406 /* If node is a connector, return and do not add to match table */ 407 if (of_match_node(connectors_match, remote)) 408 return 1; 409 410 component_match_add(&pdev->dev, match, compare_of, remote); 411 412 for_each_endpoint_of_node(remote, ep) { 413 remote_node = of_graph_get_remote_port_parent(ep); 414 if (!remote_node || 415 remote_node == parent || /* Ignore parent endpoint */ 416 !of_device_is_available(remote_node)) { 417 of_node_put(remote_node); 418 continue; 419 } 420 421 count += meson_probe_remote(pdev, match, remote, remote_node); 422 423 of_node_put(remote_node); 424 } 425 426 return count; 427 } 428 429 static int meson_drv_probe(struct platform_device *pdev) 430 { 431 struct component_match *match = NULL; 432 struct device_node *np = pdev->dev.of_node; 433 struct device_node *ep, *remote; 434 int count = 0; 435 436 for_each_endpoint_of_node(np, ep) { 437 remote = of_graph_get_remote_port_parent(ep); 438 if (!remote || !of_device_is_available(remote)) { 439 of_node_put(remote); 440 continue; 441 } 442 443 count += meson_probe_remote(pdev, &match, np, remote); 444 of_node_put(remote); 445 } 446 447 if (count && !match) 448 return meson_drv_bind_master(&pdev->dev, false); 449 450 /* If some endpoints were found, initialize the nodes */ 451 if (count) { 452 dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count); 453 454 return component_master_add_with_match(&pdev->dev, 455 &meson_drv_master_ops, 456 match); 457 } 458 459 /* If no output endpoints were available, simply bail out */ 460 return 0; 461 }; 462 463 static const struct of_device_id dt_match[] = { 464 { .compatible = "amlogic,meson-gxbb-vpu" }, 465 { .compatible = "amlogic,meson-gxl-vpu" }, 466 { .compatible = "amlogic,meson-gxm-vpu" }, 467 {} 468 }; 469 MODULE_DEVICE_TABLE(of, dt_match); 470 471 static struct platform_driver meson_drm_platform_driver = { 472 .probe = meson_drv_probe, 473 .driver = { 474 .name = "meson-drm", 475 .of_match_table = dt_match, 476 }, 477 }; 478 479 module_platform_driver(meson_drm_platform_driver); 480 481 MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>"); 482 MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>"); 483 MODULE_DESCRIPTION(DRIVER_DESC); 484 MODULE_LICENSE("GPL"); 485