1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2016 BayLibre, SAS 4 * Author: Neil Armstrong <narmstrong@baylibre.com> 5 * Copyright (C) 2014 Endless Mobile 6 * 7 * Written by: 8 * Jasper St. Pierre <jstpierre@mecheye.net> 9 */ 10 11 #include <linux/component.h> 12 #include <linux/module.h> 13 #include <linux/of_graph.h> 14 #include <linux/sys_soc.h> 15 #include <linux/platform_device.h> 16 #include <linux/soc/amlogic/meson-canvas.h> 17 18 #include <drm/drm_aperture.h> 19 #include <drm/drm_atomic_helper.h> 20 #include <drm/drm_drv.h> 21 #include <drm/drm_fb_helper.h> 22 #include <drm/drm_gem_cma_helper.h> 23 #include <drm/drm_gem_framebuffer_helper.h> 24 #include <drm/drm_irq.h> 25 #include <drm/drm_modeset_helper_vtables.h> 26 #include <drm/drm_probe_helper.h> 27 #include <drm/drm_vblank.h> 28 29 #include "meson_crtc.h" 30 #include "meson_drv.h" 31 #include "meson_overlay.h" 32 #include "meson_plane.h" 33 #include "meson_osd_afbcd.h" 34 #include "meson_registers.h" 35 #include "meson_venc_cvbs.h" 36 #include "meson_viu.h" 37 #include "meson_vpp.h" 38 #include "meson_rdma.h" 39 40 #define DRIVER_NAME "meson" 41 #define DRIVER_DESC "Amlogic Meson DRM driver" 42 43 /** 44 * DOC: Video Processing Unit 45 * 46 * VPU Handles the Global Video Processing, it includes management of the 47 * clocks gates, blocks reset lines and power domains. 48 * 49 * What is missing : 50 * 51 * - Full reset of entire video processing HW blocks 52 * - Scaling and setup of the VPU clock 53 * - Bus clock gates 54 * - Powering up video processing HW blocks 55 * - Powering Up HDMI controller and PHY 56 */ 57 58 static const struct drm_mode_config_funcs meson_mode_config_funcs = { 59 .atomic_check = drm_atomic_helper_check, 60 .atomic_commit = drm_atomic_helper_commit, 61 .fb_create = drm_gem_fb_create, 62 }; 63 64 static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = { 65 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm, 66 }; 67 68 static irqreturn_t meson_irq(int irq, void *arg) 69 { 70 struct drm_device *dev = arg; 71 struct meson_drm *priv = dev->dev_private; 72 73 (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG)); 74 75 meson_crtc_irq(priv); 76 77 return IRQ_HANDLED; 78 } 79 80 static int meson_dumb_create(struct drm_file *file, struct drm_device *dev, 81 struct drm_mode_create_dumb *args) 82 { 83 /* 84 * We need 64bytes aligned stride, and PAGE aligned size 85 */ 86 args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64); 87 args->size = PAGE_ALIGN(args->pitch * args->height); 88 89 return drm_gem_cma_dumb_create_internal(file, dev, args); 90 } 91 92 DEFINE_DRM_GEM_CMA_FOPS(fops); 93 94 static const struct drm_driver meson_driver = { 95 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, 96 97 /* IRQ */ 98 .irq_handler = meson_irq, 99 100 /* CMA Ops */ 101 DRM_GEM_CMA_DRIVER_OPS_WITH_DUMB_CREATE(meson_dumb_create), 102 103 /* Misc */ 104 .fops = &fops, 105 .name = DRIVER_NAME, 106 .desc = DRIVER_DESC, 107 .date = "20161109", 108 .major = 1, 109 .minor = 0, 110 }; 111 112 static bool meson_vpu_has_available_connectors(struct device *dev) 113 { 114 struct device_node *ep, *remote; 115 116 /* Parses each endpoint and check if remote exists */ 117 for_each_endpoint_of_node(dev->of_node, ep) { 118 /* If the endpoint node exists, consider it enabled */ 119 remote = of_graph_get_remote_port(ep); 120 if (remote) 121 return true; 122 } 123 124 return false; 125 } 126 127 static struct regmap_config meson_regmap_config = { 128 .reg_bits = 32, 129 .val_bits = 32, 130 .reg_stride = 4, 131 .max_register = 0x1000, 132 }; 133 134 static void meson_vpu_init(struct meson_drm *priv) 135 { 136 u32 value; 137 138 /* 139 * Slave dc0 and dc5 connected to master port 1. 140 * By default other slaves are connected to master port 0. 141 */ 142 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1) | 143 VPU_RDARB_SLAVE_TO_MASTER_PORT(5, 1); 144 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C1)); 145 146 /* Slave dc0 connected to master port 1 */ 147 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1); 148 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C2)); 149 150 /* Slave dc4 and dc7 connected to master port 1 */ 151 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(4, 1) | 152 VPU_RDARB_SLAVE_TO_MASTER_PORT(7, 1); 153 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L2C1)); 154 155 /* Slave dc1 connected to master port 1 */ 156 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(1, 1); 157 writel_relaxed(value, priv->io_base + _REG(VPU_WRARB_MODE_L2C1)); 158 } 159 160 struct meson_drm_soc_attr { 161 struct meson_drm_soc_limits limits; 162 const struct soc_device_attribute *attrs; 163 }; 164 165 static const struct meson_drm_soc_attr meson_drm_soc_attrs[] = { 166 /* S805X/S805Y HDMI PLL won't lock for HDMI PHY freq > 1,65GHz */ 167 { 168 .limits = { 169 .max_hdmi_phy_freq = 1650000, 170 }, 171 .attrs = (const struct soc_device_attribute []) { 172 { .soc_id = "GXL (S805*)", }, 173 { /* sentinel */ }, 174 } 175 }, 176 }; 177 178 static int meson_drv_bind_master(struct device *dev, bool has_components) 179 { 180 struct platform_device *pdev = to_platform_device(dev); 181 const struct meson_drm_match_data *match; 182 struct meson_drm *priv; 183 struct drm_device *drm; 184 struct resource *res; 185 void __iomem *regs; 186 int ret, i; 187 188 /* Checks if an output connector is available */ 189 if (!meson_vpu_has_available_connectors(dev)) { 190 dev_err(dev, "No output connector available\n"); 191 return -ENODEV; 192 } 193 194 match = of_device_get_match_data(dev); 195 if (!match) 196 return -ENODEV; 197 198 drm = drm_dev_alloc(&meson_driver, dev); 199 if (IS_ERR(drm)) 200 return PTR_ERR(drm); 201 202 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 203 if (!priv) { 204 ret = -ENOMEM; 205 goto free_drm; 206 } 207 drm->dev_private = priv; 208 priv->drm = drm; 209 priv->dev = dev; 210 priv->compat = match->compat; 211 priv->afbcd.ops = match->afbcd_ops; 212 213 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu"); 214 regs = devm_ioremap_resource(dev, res); 215 if (IS_ERR(regs)) { 216 ret = PTR_ERR(regs); 217 goto free_drm; 218 } 219 220 priv->io_base = regs; 221 222 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi"); 223 if (!res) { 224 ret = -EINVAL; 225 goto free_drm; 226 } 227 /* Simply ioremap since it may be a shared register zone */ 228 regs = devm_ioremap(dev, res->start, resource_size(res)); 229 if (!regs) { 230 ret = -EADDRNOTAVAIL; 231 goto free_drm; 232 } 233 234 priv->hhi = devm_regmap_init_mmio(dev, regs, 235 &meson_regmap_config); 236 if (IS_ERR(priv->hhi)) { 237 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n"); 238 ret = PTR_ERR(priv->hhi); 239 goto free_drm; 240 } 241 242 priv->canvas = meson_canvas_get(dev); 243 if (IS_ERR(priv->canvas)) { 244 ret = PTR_ERR(priv->canvas); 245 goto free_drm; 246 } 247 248 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1); 249 if (ret) 250 goto free_drm; 251 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0); 252 if (ret) { 253 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 254 goto free_drm; 255 } 256 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1); 257 if (ret) { 258 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 259 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 260 goto free_drm; 261 } 262 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2); 263 if (ret) { 264 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 265 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 266 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); 267 goto free_drm; 268 } 269 270 priv->vsync_irq = platform_get_irq(pdev, 0); 271 272 ret = drm_vblank_init(drm, 1); 273 if (ret) 274 goto free_drm; 275 276 /* Assign limits per soc revision/package */ 277 for (i = 0 ; i < ARRAY_SIZE(meson_drm_soc_attrs) ; ++i) { 278 if (soc_device_match(meson_drm_soc_attrs[i].attrs)) { 279 priv->limits = &meson_drm_soc_attrs[i].limits; 280 break; 281 } 282 } 283 284 /* 285 * Remove early framebuffers (ie. simplefb). The framebuffer can be 286 * located anywhere in RAM 287 */ 288 ret = drm_aperture_remove_framebuffers(false, "meson-drm-fb"); 289 if (ret) 290 goto free_drm; 291 292 ret = drmm_mode_config_init(drm); 293 if (ret) 294 goto free_drm; 295 drm->mode_config.max_width = 3840; 296 drm->mode_config.max_height = 2160; 297 drm->mode_config.funcs = &meson_mode_config_funcs; 298 drm->mode_config.helper_private = &meson_mode_config_helpers; 299 300 /* Hardware Initialization */ 301 302 meson_vpu_init(priv); 303 meson_venc_init(priv); 304 meson_vpp_init(priv); 305 meson_viu_init(priv); 306 if (priv->afbcd.ops) { 307 ret = priv->afbcd.ops->init(priv); 308 if (ret) 309 return ret; 310 } 311 312 /* Encoder Initialization */ 313 314 ret = meson_venc_cvbs_create(priv); 315 if (ret) 316 goto free_drm; 317 318 if (has_components) { 319 ret = component_bind_all(drm->dev, drm); 320 if (ret) { 321 dev_err(drm->dev, "Couldn't bind all components\n"); 322 goto free_drm; 323 } 324 } 325 326 ret = meson_plane_create(priv); 327 if (ret) 328 goto free_drm; 329 330 ret = meson_overlay_create(priv); 331 if (ret) 332 goto free_drm; 333 334 ret = meson_crtc_create(priv); 335 if (ret) 336 goto free_drm; 337 338 ret = drm_irq_install(drm, priv->vsync_irq); 339 if (ret) 340 goto free_drm; 341 342 drm_mode_config_reset(drm); 343 344 drm_kms_helper_poll_init(drm); 345 346 platform_set_drvdata(pdev, priv); 347 348 ret = drm_dev_register(drm, 0); 349 if (ret) 350 goto uninstall_irq; 351 352 drm_fbdev_generic_setup(drm, 32); 353 354 return 0; 355 356 uninstall_irq: 357 drm_irq_uninstall(drm); 358 free_drm: 359 drm_dev_put(drm); 360 361 return ret; 362 } 363 364 static int meson_drv_bind(struct device *dev) 365 { 366 return meson_drv_bind_master(dev, true); 367 } 368 369 static void meson_drv_unbind(struct device *dev) 370 { 371 struct meson_drm *priv = dev_get_drvdata(dev); 372 struct drm_device *drm = priv->drm; 373 374 if (priv->canvas) { 375 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 376 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 377 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); 378 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2); 379 } 380 381 drm_dev_unregister(drm); 382 drm_kms_helper_poll_fini(drm); 383 drm_atomic_helper_shutdown(drm); 384 component_unbind_all(dev, drm); 385 drm_irq_uninstall(drm); 386 drm_dev_put(drm); 387 388 if (priv->afbcd.ops) { 389 priv->afbcd.ops->reset(priv); 390 meson_rdma_free(priv); 391 } 392 } 393 394 static const struct component_master_ops meson_drv_master_ops = { 395 .bind = meson_drv_bind, 396 .unbind = meson_drv_unbind, 397 }; 398 399 static int __maybe_unused meson_drv_pm_suspend(struct device *dev) 400 { 401 struct meson_drm *priv = dev_get_drvdata(dev); 402 403 if (!priv) 404 return 0; 405 406 return drm_mode_config_helper_suspend(priv->drm); 407 } 408 409 static int __maybe_unused meson_drv_pm_resume(struct device *dev) 410 { 411 struct meson_drm *priv = dev_get_drvdata(dev); 412 413 if (!priv) 414 return 0; 415 416 meson_vpu_init(priv); 417 meson_venc_init(priv); 418 meson_vpp_init(priv); 419 meson_viu_init(priv); 420 if (priv->afbcd.ops) 421 priv->afbcd.ops->init(priv); 422 423 return drm_mode_config_helper_resume(priv->drm); 424 } 425 426 static int compare_of(struct device *dev, void *data) 427 { 428 DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n", 429 dev->of_node, data); 430 431 return dev->of_node == data; 432 } 433 434 /* Possible connectors nodes to ignore */ 435 static const struct of_device_id connectors_match[] = { 436 { .compatible = "composite-video-connector" }, 437 { .compatible = "svideo-connector" }, 438 { .compatible = "hdmi-connector" }, 439 { .compatible = "dvi-connector" }, 440 {} 441 }; 442 443 static int meson_probe_remote(struct platform_device *pdev, 444 struct component_match **match, 445 struct device_node *parent, 446 struct device_node *remote) 447 { 448 struct device_node *ep, *remote_node; 449 int count = 1; 450 451 /* If node is a connector, return and do not add to match table */ 452 if (of_match_node(connectors_match, remote)) 453 return 1; 454 455 component_match_add(&pdev->dev, match, compare_of, remote); 456 457 for_each_endpoint_of_node(remote, ep) { 458 remote_node = of_graph_get_remote_port_parent(ep); 459 if (!remote_node || 460 remote_node == parent || /* Ignore parent endpoint */ 461 !of_device_is_available(remote_node)) { 462 of_node_put(remote_node); 463 continue; 464 } 465 466 count += meson_probe_remote(pdev, match, remote, remote_node); 467 468 of_node_put(remote_node); 469 } 470 471 return count; 472 } 473 474 static void meson_drv_shutdown(struct platform_device *pdev) 475 { 476 struct meson_drm *priv = dev_get_drvdata(&pdev->dev); 477 478 if (!priv) 479 return; 480 481 drm_kms_helper_poll_fini(priv->drm); 482 drm_atomic_helper_shutdown(priv->drm); 483 } 484 485 static int meson_drv_probe(struct platform_device *pdev) 486 { 487 struct component_match *match = NULL; 488 struct device_node *np = pdev->dev.of_node; 489 struct device_node *ep, *remote; 490 int count = 0; 491 492 for_each_endpoint_of_node(np, ep) { 493 remote = of_graph_get_remote_port_parent(ep); 494 if (!remote || !of_device_is_available(remote)) { 495 of_node_put(remote); 496 continue; 497 } 498 499 count += meson_probe_remote(pdev, &match, np, remote); 500 of_node_put(remote); 501 } 502 503 if (count && !match) 504 return meson_drv_bind_master(&pdev->dev, false); 505 506 /* If some endpoints were found, initialize the nodes */ 507 if (count) { 508 dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count); 509 510 return component_master_add_with_match(&pdev->dev, 511 &meson_drv_master_ops, 512 match); 513 } 514 515 /* If no output endpoints were available, simply bail out */ 516 return 0; 517 }; 518 519 static struct meson_drm_match_data meson_drm_gxbb_data = { 520 .compat = VPU_COMPATIBLE_GXBB, 521 }; 522 523 static struct meson_drm_match_data meson_drm_gxl_data = { 524 .compat = VPU_COMPATIBLE_GXL, 525 }; 526 527 static struct meson_drm_match_data meson_drm_gxm_data = { 528 .compat = VPU_COMPATIBLE_GXM, 529 .afbcd_ops = &meson_afbcd_gxm_ops, 530 }; 531 532 static struct meson_drm_match_data meson_drm_g12a_data = { 533 .compat = VPU_COMPATIBLE_G12A, 534 .afbcd_ops = &meson_afbcd_g12a_ops, 535 }; 536 537 static const struct of_device_id dt_match[] = { 538 { .compatible = "amlogic,meson-gxbb-vpu", 539 .data = (void *)&meson_drm_gxbb_data }, 540 { .compatible = "amlogic,meson-gxl-vpu", 541 .data = (void *)&meson_drm_gxl_data }, 542 { .compatible = "amlogic,meson-gxm-vpu", 543 .data = (void *)&meson_drm_gxm_data }, 544 { .compatible = "amlogic,meson-g12a-vpu", 545 .data = (void *)&meson_drm_g12a_data }, 546 {} 547 }; 548 MODULE_DEVICE_TABLE(of, dt_match); 549 550 static const struct dev_pm_ops meson_drv_pm_ops = { 551 SET_SYSTEM_SLEEP_PM_OPS(meson_drv_pm_suspend, meson_drv_pm_resume) 552 }; 553 554 static struct platform_driver meson_drm_platform_driver = { 555 .probe = meson_drv_probe, 556 .shutdown = meson_drv_shutdown, 557 .driver = { 558 .name = "meson-drm", 559 .of_match_table = dt_match, 560 .pm = &meson_drv_pm_ops, 561 }, 562 }; 563 564 module_platform_driver(meson_drm_platform_driver); 565 566 MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>"); 567 MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>"); 568 MODULE_DESCRIPTION(DRIVER_DESC); 569 MODULE_LICENSE("GPL"); 570