xref: /openbmc/linux/drivers/gpu/drm/meson/meson_drv.c (revision 151f4e2b)
1 /*
2  * Copyright (C) 2016 BayLibre, SAS
3  * Author: Neil Armstrong <narmstrong@baylibre.com>
4  * Copyright (C) 2014 Endless Mobile
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation; either version 2 of the
9  * License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but
12  * WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, see <http://www.gnu.org/licenses/>.
18  *
19  * Written by:
20  *     Jasper St. Pierre <jstpierre@mecheye.net>
21  */
22 
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/mutex.h>
26 #include <linux/platform_device.h>
27 #include <linux/component.h>
28 #include <linux/of_graph.h>
29 
30 #include <drm/drmP.h>
31 #include <drm/drm_atomic.h>
32 #include <drm/drm_atomic_helper.h>
33 #include <drm/drm_fb_cma_helper.h>
34 #include <drm/drm_fb_helper.h>
35 #include <drm/drm_flip_work.h>
36 #include <drm/drm_gem_cma_helper.h>
37 #include <drm/drm_gem_framebuffer_helper.h>
38 #include <drm/drm_plane_helper.h>
39 #include <drm/drm_probe_helper.h>
40 #include <drm/drm_rect.h>
41 
42 #include "meson_drv.h"
43 #include "meson_plane.h"
44 #include "meson_overlay.h"
45 #include "meson_crtc.h"
46 #include "meson_venc_cvbs.h"
47 
48 #include "meson_vpp.h"
49 #include "meson_viu.h"
50 #include "meson_venc.h"
51 #include "meson_registers.h"
52 
53 #define DRIVER_NAME "meson"
54 #define DRIVER_DESC "Amlogic Meson DRM driver"
55 
56 /**
57  * DOC: Video Processing Unit
58  *
59  * VPU Handles the Global Video Processing, it includes management of the
60  * clocks gates, blocks reset lines and power domains.
61  *
62  * What is missing :
63  *
64  * - Full reset of entire video processing HW blocks
65  * - Scaling and setup of the VPU clock
66  * - Bus clock gates
67  * - Powering up video processing HW blocks
68  * - Powering Up HDMI controller and PHY
69  */
70 
71 static const struct drm_mode_config_funcs meson_mode_config_funcs = {
72 	.atomic_check        = drm_atomic_helper_check,
73 	.atomic_commit       = drm_atomic_helper_commit,
74 	.fb_create           = drm_gem_fb_create,
75 };
76 
77 static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = {
78 	.atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
79 };
80 
81 static irqreturn_t meson_irq(int irq, void *arg)
82 {
83 	struct drm_device *dev = arg;
84 	struct meson_drm *priv = dev->dev_private;
85 
86 	(void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));
87 
88 	meson_crtc_irq(priv);
89 
90 	return IRQ_HANDLED;
91 }
92 
93 static int meson_dumb_create(struct drm_file *file, struct drm_device *dev,
94 			     struct drm_mode_create_dumb *args)
95 {
96 	/*
97 	 * We need 64bytes aligned stride, and PAGE aligned size
98 	 */
99 	args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64);
100 	args->size = PAGE_ALIGN(args->pitch * args->height);
101 
102 	return drm_gem_cma_dumb_create_internal(file, dev, args);
103 }
104 
105 DEFINE_DRM_GEM_CMA_FOPS(fops);
106 
107 static struct drm_driver meson_driver = {
108 	.driver_features	= DRIVER_GEM |
109 				  DRIVER_MODESET | DRIVER_PRIME |
110 				  DRIVER_ATOMIC,
111 
112 	/* IRQ */
113 	.irq_handler		= meson_irq,
114 
115 	/* PRIME Ops */
116 	.prime_handle_to_fd	= drm_gem_prime_handle_to_fd,
117 	.prime_fd_to_handle	= drm_gem_prime_fd_to_handle,
118 	.gem_prime_import	= drm_gem_prime_import,
119 	.gem_prime_export	= drm_gem_prime_export,
120 	.gem_prime_get_sg_table	= drm_gem_cma_prime_get_sg_table,
121 	.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
122 	.gem_prime_vmap		= drm_gem_cma_prime_vmap,
123 	.gem_prime_vunmap	= drm_gem_cma_prime_vunmap,
124 	.gem_prime_mmap		= drm_gem_cma_prime_mmap,
125 
126 	/* GEM Ops */
127 	.dumb_create		= meson_dumb_create,
128 	.gem_free_object_unlocked = drm_gem_cma_free_object,
129 	.gem_vm_ops		= &drm_gem_cma_vm_ops,
130 
131 	/* Misc */
132 	.fops			= &fops,
133 	.name			= DRIVER_NAME,
134 	.desc			= DRIVER_DESC,
135 	.date			= "20161109",
136 	.major			= 1,
137 	.minor			= 0,
138 };
139 
140 static bool meson_vpu_has_available_connectors(struct device *dev)
141 {
142 	struct device_node *ep, *remote;
143 
144 	/* Parses each endpoint and check if remote exists */
145 	for_each_endpoint_of_node(dev->of_node, ep) {
146 		/* If the endpoint node exists, consider it enabled */
147 		remote = of_graph_get_remote_port(ep);
148 		if (remote)
149 			return true;
150 	}
151 
152 	return false;
153 }
154 
155 static struct regmap_config meson_regmap_config = {
156 	.reg_bits       = 32,
157 	.val_bits       = 32,
158 	.reg_stride     = 4,
159 	.max_register   = 0x1000,
160 };
161 
162 static void meson_vpu_init(struct meson_drm *priv)
163 {
164 	writel_relaxed(0x210000, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
165 	writel_relaxed(0x10000, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
166 	writel_relaxed(0x900000, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
167 	writel_relaxed(0x20000, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
168 }
169 
170 static void meson_remove_framebuffers(void)
171 {
172 	struct apertures_struct *ap;
173 
174 	ap = alloc_apertures(1);
175 	if (!ap)
176 		return;
177 
178 	/* The framebuffer can be located anywhere in RAM */
179 	ap->ranges[0].base = 0;
180 	ap->ranges[0].size = ~0;
181 
182 	drm_fb_helper_remove_conflicting_framebuffers(ap, "meson-drm-fb",
183 						      false);
184 	kfree(ap);
185 }
186 
187 static int meson_drv_bind_master(struct device *dev, bool has_components)
188 {
189 	struct platform_device *pdev = to_platform_device(dev);
190 	struct meson_drm *priv;
191 	struct drm_device *drm;
192 	struct resource *res;
193 	void __iomem *regs;
194 	int ret;
195 
196 	/* Checks if an output connector is available */
197 	if (!meson_vpu_has_available_connectors(dev)) {
198 		dev_err(dev, "No output connector available\n");
199 		return -ENODEV;
200 	}
201 
202 	drm = drm_dev_alloc(&meson_driver, dev);
203 	if (IS_ERR(drm))
204 		return PTR_ERR(drm);
205 
206 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
207 	if (!priv) {
208 		ret = -ENOMEM;
209 		goto free_drm;
210 	}
211 	drm->dev_private = priv;
212 	priv->drm = drm;
213 	priv->dev = dev;
214 
215 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu");
216 	regs = devm_ioremap_resource(dev, res);
217 	if (IS_ERR(regs)) {
218 		ret = PTR_ERR(regs);
219 		goto free_drm;
220 	}
221 
222 	priv->io_base = regs;
223 
224 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
225 	if (!res) {
226 		ret = -EINVAL;
227 		goto free_drm;
228 	}
229 	/* Simply ioremap since it may be a shared register zone */
230 	regs = devm_ioremap(dev, res->start, resource_size(res));
231 	if (!regs) {
232 		ret = -EADDRNOTAVAIL;
233 		goto free_drm;
234 	}
235 
236 	priv->hhi = devm_regmap_init_mmio(dev, regs,
237 					  &meson_regmap_config);
238 	if (IS_ERR(priv->hhi)) {
239 		dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
240 		ret = PTR_ERR(priv->hhi);
241 		goto free_drm;
242 	}
243 
244 	priv->canvas = meson_canvas_get(dev);
245 	if (IS_ERR(priv->canvas)) {
246 		ret = PTR_ERR(priv->canvas);
247 		goto free_drm;
248 	}
249 
250 	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
251 	if (ret)
252 		goto free_drm;
253 	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
254 	if (ret) {
255 		meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
256 		goto free_drm;
257 	}
258 	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1);
259 	if (ret) {
260 		meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
261 		meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
262 		goto free_drm;
263 	}
264 	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2);
265 	if (ret) {
266 		meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
267 		meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
268 		meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
269 		goto free_drm;
270 	}
271 
272 	priv->vsync_irq = platform_get_irq(pdev, 0);
273 
274 	ret = drm_vblank_init(drm, 1);
275 	if (ret)
276 		goto free_drm;
277 
278 	/* Remove early framebuffers (ie. simplefb) */
279 	meson_remove_framebuffers();
280 
281 	drm_mode_config_init(drm);
282 	drm->mode_config.max_width = 3840;
283 	drm->mode_config.max_height = 2160;
284 	drm->mode_config.funcs = &meson_mode_config_funcs;
285 	drm->mode_config.helper_private	= &meson_mode_config_helpers;
286 
287 	/* Hardware Initialization */
288 
289 	meson_vpu_init(priv);
290 	meson_venc_init(priv);
291 	meson_vpp_init(priv);
292 	meson_viu_init(priv);
293 
294 	/* Encoder Initialization */
295 
296 	ret = meson_venc_cvbs_create(priv);
297 	if (ret)
298 		goto free_drm;
299 
300 	if (has_components) {
301 		ret = component_bind_all(drm->dev, drm);
302 		if (ret) {
303 			dev_err(drm->dev, "Couldn't bind all components\n");
304 			goto free_drm;
305 		}
306 	}
307 
308 	ret = meson_plane_create(priv);
309 	if (ret)
310 		goto free_drm;
311 
312 	ret = meson_overlay_create(priv);
313 	if (ret)
314 		goto free_drm;
315 
316 	ret = meson_crtc_create(priv);
317 	if (ret)
318 		goto free_drm;
319 
320 	ret = drm_irq_install(drm, priv->vsync_irq);
321 	if (ret)
322 		goto free_drm;
323 
324 	drm_mode_config_reset(drm);
325 
326 	drm_kms_helper_poll_init(drm);
327 
328 	platform_set_drvdata(pdev, priv);
329 
330 	ret = drm_dev_register(drm, 0);
331 	if (ret)
332 		goto uninstall_irq;
333 
334 	drm_fbdev_generic_setup(drm, 32);
335 
336 	return 0;
337 
338 uninstall_irq:
339 	drm_irq_uninstall(drm);
340 free_drm:
341 	drm_dev_put(drm);
342 
343 	return ret;
344 }
345 
346 static int meson_drv_bind(struct device *dev)
347 {
348 	return meson_drv_bind_master(dev, true);
349 }
350 
351 static void meson_drv_unbind(struct device *dev)
352 {
353 	struct meson_drm *priv = dev_get_drvdata(dev);
354 	struct drm_device *drm = priv->drm;
355 
356 	if (priv->canvas) {
357 		meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
358 		meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
359 		meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
360 		meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2);
361 	}
362 
363 	drm_dev_unregister(drm);
364 	drm_irq_uninstall(drm);
365 	drm_kms_helper_poll_fini(drm);
366 	drm_mode_config_cleanup(drm);
367 	drm_dev_put(drm);
368 
369 }
370 
371 static const struct component_master_ops meson_drv_master_ops = {
372 	.bind	= meson_drv_bind,
373 	.unbind	= meson_drv_unbind,
374 };
375 
376 static int compare_of(struct device *dev, void *data)
377 {
378 	DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n",
379 			 dev->of_node, data);
380 
381 	return dev->of_node == data;
382 }
383 
384 /* Possible connectors nodes to ignore */
385 static const struct of_device_id connectors_match[] = {
386 	{ .compatible = "composite-video-connector" },
387 	{ .compatible = "svideo-connector" },
388 	{ .compatible = "hdmi-connector" },
389 	{ .compatible = "dvi-connector" },
390 	{}
391 };
392 
393 static int meson_probe_remote(struct platform_device *pdev,
394 			      struct component_match **match,
395 			      struct device_node *parent,
396 			      struct device_node *remote)
397 {
398 	struct device_node *ep, *remote_node;
399 	int count = 1;
400 
401 	/* If node is a connector, return and do not add to match table */
402 	if (of_match_node(connectors_match, remote))
403 		return 1;
404 
405 	component_match_add(&pdev->dev, match, compare_of, remote);
406 
407 	for_each_endpoint_of_node(remote, ep) {
408 		remote_node = of_graph_get_remote_port_parent(ep);
409 		if (!remote_node ||
410 		    remote_node == parent || /* Ignore parent endpoint */
411 		    !of_device_is_available(remote_node)) {
412 			of_node_put(remote_node);
413 			continue;
414 		}
415 
416 		count += meson_probe_remote(pdev, match, remote, remote_node);
417 
418 		of_node_put(remote_node);
419 	}
420 
421 	return count;
422 }
423 
424 static int meson_drv_probe(struct platform_device *pdev)
425 {
426 	struct component_match *match = NULL;
427 	struct device_node *np = pdev->dev.of_node;
428 	struct device_node *ep, *remote;
429 	int count = 0;
430 
431 	for_each_endpoint_of_node(np, ep) {
432 		remote = of_graph_get_remote_port_parent(ep);
433 		if (!remote || !of_device_is_available(remote)) {
434 			of_node_put(remote);
435 			continue;
436 		}
437 
438 		count += meson_probe_remote(pdev, &match, np, remote);
439 		of_node_put(remote);
440 	}
441 
442 	if (count && !match)
443 		return meson_drv_bind_master(&pdev->dev, false);
444 
445 	/* If some endpoints were found, initialize the nodes */
446 	if (count) {
447 		dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count);
448 
449 		return component_master_add_with_match(&pdev->dev,
450 						       &meson_drv_master_ops,
451 						       match);
452 	}
453 
454 	/* If no output endpoints were available, simply bail out */
455 	return 0;
456 };
457 
458 static const struct of_device_id dt_match[] = {
459 	{ .compatible = "amlogic,meson-gxbb-vpu" },
460 	{ .compatible = "amlogic,meson-gxl-vpu" },
461 	{ .compatible = "amlogic,meson-gxm-vpu" },
462 	{ .compatible = "amlogic,meson-g12a-vpu" },
463 	{}
464 };
465 MODULE_DEVICE_TABLE(of, dt_match);
466 
467 static struct platform_driver meson_drm_platform_driver = {
468 	.probe      = meson_drv_probe,
469 	.driver     = {
470 		.name	= "meson-drm",
471 		.of_match_table = dt_match,
472 	},
473 };
474 
475 module_platform_driver(meson_drm_platform_driver);
476 
477 MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>");
478 MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
479 MODULE_DESCRIPTION(DRIVER_DESC);
480 MODULE_LICENSE("GPL");
481