1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2016 BayLibre, SAS 4 * Author: Neil Armstrong <narmstrong@baylibre.com> 5 * Copyright (C) 2014 Endless Mobile 6 * 7 * Written by: 8 * Jasper St. Pierre <jstpierre@mecheye.net> 9 */ 10 11 #include <linux/component.h> 12 #include <linux/module.h> 13 #include <linux/of_graph.h> 14 #include <linux/sys_soc.h> 15 #include <linux/platform_device.h> 16 #include <linux/soc/amlogic/meson-canvas.h> 17 18 #include <drm/drm_atomic_helper.h> 19 #include <drm/drm_drv.h> 20 #include <drm/drm_fb_helper.h> 21 #include <drm/drm_gem_cma_helper.h> 22 #include <drm/drm_gem_framebuffer_helper.h> 23 #include <drm/drm_irq.h> 24 #include <drm/drm_modeset_helper_vtables.h> 25 #include <drm/drm_probe_helper.h> 26 #include <drm/drm_vblank.h> 27 28 #include "meson_crtc.h" 29 #include "meson_drv.h" 30 #include "meson_overlay.h" 31 #include "meson_plane.h" 32 #include "meson_osd_afbcd.h" 33 #include "meson_registers.h" 34 #include "meson_venc_cvbs.h" 35 #include "meson_viu.h" 36 #include "meson_vpp.h" 37 #include "meson_rdma.h" 38 39 #define DRIVER_NAME "meson" 40 #define DRIVER_DESC "Amlogic Meson DRM driver" 41 42 /** 43 * DOC: Video Processing Unit 44 * 45 * VPU Handles the Global Video Processing, it includes management of the 46 * clocks gates, blocks reset lines and power domains. 47 * 48 * What is missing : 49 * 50 * - Full reset of entire video processing HW blocks 51 * - Scaling and setup of the VPU clock 52 * - Bus clock gates 53 * - Powering up video processing HW blocks 54 * - Powering Up HDMI controller and PHY 55 */ 56 57 static const struct drm_mode_config_funcs meson_mode_config_funcs = { 58 .atomic_check = drm_atomic_helper_check, 59 .atomic_commit = drm_atomic_helper_commit, 60 .fb_create = drm_gem_fb_create, 61 }; 62 63 static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = { 64 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm, 65 }; 66 67 static irqreturn_t meson_irq(int irq, void *arg) 68 { 69 struct drm_device *dev = arg; 70 struct meson_drm *priv = dev->dev_private; 71 72 (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG)); 73 74 meson_crtc_irq(priv); 75 76 return IRQ_HANDLED; 77 } 78 79 static int meson_dumb_create(struct drm_file *file, struct drm_device *dev, 80 struct drm_mode_create_dumb *args) 81 { 82 /* 83 * We need 64bytes aligned stride, and PAGE aligned size 84 */ 85 args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64); 86 args->size = PAGE_ALIGN(args->pitch * args->height); 87 88 return drm_gem_cma_dumb_create_internal(file, dev, args); 89 } 90 91 DEFINE_DRM_GEM_CMA_FOPS(fops); 92 93 static struct drm_driver meson_driver = { 94 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, 95 96 /* IRQ */ 97 .irq_handler = meson_irq, 98 99 /* PRIME Ops */ 100 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 101 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 102 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, 103 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, 104 .gem_prime_vmap = drm_gem_cma_prime_vmap, 105 .gem_prime_vunmap = drm_gem_cma_prime_vunmap, 106 .gem_prime_mmap = drm_gem_cma_prime_mmap, 107 108 /* GEM Ops */ 109 .dumb_create = meson_dumb_create, 110 .gem_free_object_unlocked = drm_gem_cma_free_object, 111 .gem_vm_ops = &drm_gem_cma_vm_ops, 112 113 /* Misc */ 114 .fops = &fops, 115 .name = DRIVER_NAME, 116 .desc = DRIVER_DESC, 117 .date = "20161109", 118 .major = 1, 119 .minor = 0, 120 }; 121 122 static bool meson_vpu_has_available_connectors(struct device *dev) 123 { 124 struct device_node *ep, *remote; 125 126 /* Parses each endpoint and check if remote exists */ 127 for_each_endpoint_of_node(dev->of_node, ep) { 128 /* If the endpoint node exists, consider it enabled */ 129 remote = of_graph_get_remote_port(ep); 130 if (remote) 131 return true; 132 } 133 134 return false; 135 } 136 137 static struct regmap_config meson_regmap_config = { 138 .reg_bits = 32, 139 .val_bits = 32, 140 .reg_stride = 4, 141 .max_register = 0x1000, 142 }; 143 144 static void meson_vpu_init(struct meson_drm *priv) 145 { 146 u32 value; 147 148 /* 149 * Slave dc0 and dc5 connected to master port 1. 150 * By default other slaves are connected to master port 0. 151 */ 152 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1) | 153 VPU_RDARB_SLAVE_TO_MASTER_PORT(5, 1); 154 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C1)); 155 156 /* Slave dc0 connected to master port 1 */ 157 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1); 158 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C2)); 159 160 /* Slave dc4 and dc7 connected to master port 1 */ 161 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(4, 1) | 162 VPU_RDARB_SLAVE_TO_MASTER_PORT(7, 1); 163 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L2C1)); 164 165 /* Slave dc1 connected to master port 1 */ 166 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(1, 1); 167 writel_relaxed(value, priv->io_base + _REG(VPU_WRARB_MODE_L2C1)); 168 } 169 170 static void meson_remove_framebuffers(void) 171 { 172 struct apertures_struct *ap; 173 174 ap = alloc_apertures(1); 175 if (!ap) 176 return; 177 178 /* The framebuffer can be located anywhere in RAM */ 179 ap->ranges[0].base = 0; 180 ap->ranges[0].size = ~0; 181 182 drm_fb_helper_remove_conflicting_framebuffers(ap, "meson-drm-fb", 183 false); 184 kfree(ap); 185 } 186 187 struct meson_drm_soc_attr { 188 struct meson_drm_soc_limits limits; 189 const struct soc_device_attribute *attrs; 190 }; 191 192 static const struct meson_drm_soc_attr meson_drm_soc_attrs[] = { 193 /* S805X/S805Y HDMI PLL won't lock for HDMI PHY freq > 1,65GHz */ 194 { 195 .limits = { 196 .max_hdmi_phy_freq = 1650000, 197 }, 198 .attrs = (const struct soc_device_attribute []) { 199 { .soc_id = "GXL (S805*)", }, 200 { /* sentinel */ }, 201 } 202 }, 203 }; 204 205 static int meson_drv_bind_master(struct device *dev, bool has_components) 206 { 207 struct platform_device *pdev = to_platform_device(dev); 208 const struct meson_drm_match_data *match; 209 struct meson_drm *priv; 210 struct drm_device *drm; 211 struct resource *res; 212 void __iomem *regs; 213 int ret, i; 214 215 /* Checks if an output connector is available */ 216 if (!meson_vpu_has_available_connectors(dev)) { 217 dev_err(dev, "No output connector available\n"); 218 return -ENODEV; 219 } 220 221 match = of_device_get_match_data(dev); 222 if (!match) 223 return -ENODEV; 224 225 drm = drm_dev_alloc(&meson_driver, dev); 226 if (IS_ERR(drm)) 227 return PTR_ERR(drm); 228 229 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 230 if (!priv) { 231 ret = -ENOMEM; 232 goto free_drm; 233 } 234 drm->dev_private = priv; 235 priv->drm = drm; 236 priv->dev = dev; 237 priv->compat = match->compat; 238 priv->afbcd.ops = match->afbcd_ops; 239 240 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu"); 241 regs = devm_ioremap_resource(dev, res); 242 if (IS_ERR(regs)) { 243 ret = PTR_ERR(regs); 244 goto free_drm; 245 } 246 247 priv->io_base = regs; 248 249 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi"); 250 if (!res) { 251 ret = -EINVAL; 252 goto free_drm; 253 } 254 /* Simply ioremap since it may be a shared register zone */ 255 regs = devm_ioremap(dev, res->start, resource_size(res)); 256 if (!regs) { 257 ret = -EADDRNOTAVAIL; 258 goto free_drm; 259 } 260 261 priv->hhi = devm_regmap_init_mmio(dev, regs, 262 &meson_regmap_config); 263 if (IS_ERR(priv->hhi)) { 264 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n"); 265 ret = PTR_ERR(priv->hhi); 266 goto free_drm; 267 } 268 269 priv->canvas = meson_canvas_get(dev); 270 if (IS_ERR(priv->canvas)) { 271 ret = PTR_ERR(priv->canvas); 272 goto free_drm; 273 } 274 275 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1); 276 if (ret) 277 goto free_drm; 278 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0); 279 if (ret) { 280 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 281 goto free_drm; 282 } 283 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1); 284 if (ret) { 285 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 286 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 287 goto free_drm; 288 } 289 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2); 290 if (ret) { 291 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 292 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 293 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); 294 goto free_drm; 295 } 296 297 priv->vsync_irq = platform_get_irq(pdev, 0); 298 299 ret = drm_vblank_init(drm, 1); 300 if (ret) 301 goto free_drm; 302 303 /* Assign limits per soc revision/package */ 304 for (i = 0 ; i < ARRAY_SIZE(meson_drm_soc_attrs) ; ++i) { 305 if (soc_device_match(meson_drm_soc_attrs[i].attrs)) { 306 priv->limits = &meson_drm_soc_attrs[i].limits; 307 break; 308 } 309 } 310 311 /* Remove early framebuffers (ie. simplefb) */ 312 meson_remove_framebuffers(); 313 314 ret = drmm_mode_config_init(drm); 315 if (ret) 316 goto free_drm; 317 drm->mode_config.max_width = 3840; 318 drm->mode_config.max_height = 2160; 319 drm->mode_config.funcs = &meson_mode_config_funcs; 320 drm->mode_config.helper_private = &meson_mode_config_helpers; 321 322 /* Hardware Initialization */ 323 324 meson_vpu_init(priv); 325 meson_venc_init(priv); 326 meson_vpp_init(priv); 327 meson_viu_init(priv); 328 if (priv->afbcd.ops) { 329 ret = priv->afbcd.ops->init(priv); 330 if (ret) 331 return ret; 332 } 333 334 /* Encoder Initialization */ 335 336 ret = meson_venc_cvbs_create(priv); 337 if (ret) 338 goto free_drm; 339 340 if (has_components) { 341 ret = component_bind_all(drm->dev, drm); 342 if (ret) { 343 dev_err(drm->dev, "Couldn't bind all components\n"); 344 goto free_drm; 345 } 346 } 347 348 ret = meson_plane_create(priv); 349 if (ret) 350 goto free_drm; 351 352 ret = meson_overlay_create(priv); 353 if (ret) 354 goto free_drm; 355 356 ret = meson_crtc_create(priv); 357 if (ret) 358 goto free_drm; 359 360 ret = drm_irq_install(drm, priv->vsync_irq); 361 if (ret) 362 goto free_drm; 363 364 drm_mode_config_reset(drm); 365 366 drm_kms_helper_poll_init(drm); 367 368 platform_set_drvdata(pdev, priv); 369 370 ret = drm_dev_register(drm, 0); 371 if (ret) 372 goto uninstall_irq; 373 374 drm_fbdev_generic_setup(drm, 32); 375 376 return 0; 377 378 uninstall_irq: 379 drm_irq_uninstall(drm); 380 free_drm: 381 drm_dev_put(drm); 382 383 return ret; 384 } 385 386 static int meson_drv_bind(struct device *dev) 387 { 388 return meson_drv_bind_master(dev, true); 389 } 390 391 static void meson_drv_unbind(struct device *dev) 392 { 393 struct meson_drm *priv = dev_get_drvdata(dev); 394 struct drm_device *drm = priv->drm; 395 396 if (priv->canvas) { 397 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 398 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 399 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); 400 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2); 401 } 402 403 if (priv->afbcd.ops) { 404 priv->afbcd.ops->reset(priv); 405 meson_rdma_free(priv); 406 } 407 408 drm_dev_unregister(drm); 409 drm_irq_uninstall(drm); 410 drm_kms_helper_poll_fini(drm); 411 drm_dev_put(drm); 412 } 413 414 static const struct component_master_ops meson_drv_master_ops = { 415 .bind = meson_drv_bind, 416 .unbind = meson_drv_unbind, 417 }; 418 419 static int __maybe_unused meson_drv_pm_suspend(struct device *dev) 420 { 421 struct meson_drm *priv = dev_get_drvdata(dev); 422 423 if (!priv) 424 return 0; 425 426 return drm_mode_config_helper_suspend(priv->drm); 427 } 428 429 static int __maybe_unused meson_drv_pm_resume(struct device *dev) 430 { 431 struct meson_drm *priv = dev_get_drvdata(dev); 432 433 if (!priv) 434 return 0; 435 436 meson_vpu_init(priv); 437 meson_venc_init(priv); 438 meson_vpp_init(priv); 439 meson_viu_init(priv); 440 if (priv->afbcd.ops) 441 priv->afbcd.ops->init(priv); 442 443 return drm_mode_config_helper_resume(priv->drm); 444 } 445 446 static int compare_of(struct device *dev, void *data) 447 { 448 DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n", 449 dev->of_node, data); 450 451 return dev->of_node == data; 452 } 453 454 /* Possible connectors nodes to ignore */ 455 static const struct of_device_id connectors_match[] = { 456 { .compatible = "composite-video-connector" }, 457 { .compatible = "svideo-connector" }, 458 { .compatible = "hdmi-connector" }, 459 { .compatible = "dvi-connector" }, 460 {} 461 }; 462 463 static int meson_probe_remote(struct platform_device *pdev, 464 struct component_match **match, 465 struct device_node *parent, 466 struct device_node *remote) 467 { 468 struct device_node *ep, *remote_node; 469 int count = 1; 470 471 /* If node is a connector, return and do not add to match table */ 472 if (of_match_node(connectors_match, remote)) 473 return 1; 474 475 component_match_add(&pdev->dev, match, compare_of, remote); 476 477 for_each_endpoint_of_node(remote, ep) { 478 remote_node = of_graph_get_remote_port_parent(ep); 479 if (!remote_node || 480 remote_node == parent || /* Ignore parent endpoint */ 481 !of_device_is_available(remote_node)) { 482 of_node_put(remote_node); 483 continue; 484 } 485 486 count += meson_probe_remote(pdev, match, remote, remote_node); 487 488 of_node_put(remote_node); 489 } 490 491 return count; 492 } 493 494 static int meson_drv_probe(struct platform_device *pdev) 495 { 496 struct component_match *match = NULL; 497 struct device_node *np = pdev->dev.of_node; 498 struct device_node *ep, *remote; 499 int count = 0; 500 501 for_each_endpoint_of_node(np, ep) { 502 remote = of_graph_get_remote_port_parent(ep); 503 if (!remote || !of_device_is_available(remote)) { 504 of_node_put(remote); 505 continue; 506 } 507 508 count += meson_probe_remote(pdev, &match, np, remote); 509 of_node_put(remote); 510 } 511 512 if (count && !match) 513 return meson_drv_bind_master(&pdev->dev, false); 514 515 /* If some endpoints were found, initialize the nodes */ 516 if (count) { 517 dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count); 518 519 return component_master_add_with_match(&pdev->dev, 520 &meson_drv_master_ops, 521 match); 522 } 523 524 /* If no output endpoints were available, simply bail out */ 525 return 0; 526 }; 527 528 static struct meson_drm_match_data meson_drm_gxbb_data = { 529 .compat = VPU_COMPATIBLE_GXBB, 530 }; 531 532 static struct meson_drm_match_data meson_drm_gxl_data = { 533 .compat = VPU_COMPATIBLE_GXL, 534 }; 535 536 static struct meson_drm_match_data meson_drm_gxm_data = { 537 .compat = VPU_COMPATIBLE_GXM, 538 .afbcd_ops = &meson_afbcd_gxm_ops, 539 }; 540 541 static struct meson_drm_match_data meson_drm_g12a_data = { 542 .compat = VPU_COMPATIBLE_G12A, 543 .afbcd_ops = &meson_afbcd_g12a_ops, 544 }; 545 546 static const struct of_device_id dt_match[] = { 547 { .compatible = "amlogic,meson-gxbb-vpu", 548 .data = (void *)&meson_drm_gxbb_data }, 549 { .compatible = "amlogic,meson-gxl-vpu", 550 .data = (void *)&meson_drm_gxl_data }, 551 { .compatible = "amlogic,meson-gxm-vpu", 552 .data = (void *)&meson_drm_gxm_data }, 553 { .compatible = "amlogic,meson-g12a-vpu", 554 .data = (void *)&meson_drm_g12a_data }, 555 {} 556 }; 557 MODULE_DEVICE_TABLE(of, dt_match); 558 559 static const struct dev_pm_ops meson_drv_pm_ops = { 560 SET_SYSTEM_SLEEP_PM_OPS(meson_drv_pm_suspend, meson_drv_pm_resume) 561 }; 562 563 static struct platform_driver meson_drm_platform_driver = { 564 .probe = meson_drv_probe, 565 .driver = { 566 .name = "meson-drm", 567 .of_match_table = dt_match, 568 .pm = &meson_drv_pm_ops, 569 }, 570 }; 571 572 module_platform_driver(meson_drm_platform_driver); 573 574 MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>"); 575 MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>"); 576 MODULE_DESCRIPTION(DRIVER_DESC); 577 MODULE_LICENSE("GPL"); 578