11802d0beSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2119f5173SCK Hu /* 3119f5173SCK Hu * Copyright (c) 2015 MediaTek Inc. 4119f5173SCK Hu * Author: CK Hu <ck.hu@mediatek.com> 5119f5173SCK Hu */ 6119f5173SCK Hu 7119f5173SCK Hu #ifndef _MTK_DRM_PLANE_H_ 8119f5173SCK Hu #define _MTK_DRM_PLANE_H_ 9119f5173SCK Hu 10119f5173SCK Hu #include <drm/drm_crtc.h> 11119f5173SCK Hu #include <linux/types.h> 12119f5173SCK Hu 13119f5173SCK Hu struct mtk_plane_pending_state { 14119f5173SCK Hu bool config; 15119f5173SCK Hu bool enable; 16119f5173SCK Hu dma_addr_t addr; 17119f5173SCK Hu unsigned int pitch; 18119f5173SCK Hu unsigned int format; 19119f5173SCK Hu unsigned int x; 20119f5173SCK Hu unsigned int y; 21119f5173SCK Hu unsigned int width; 22119f5173SCK Hu unsigned int height; 23ef87d3e2SSean Paul unsigned int rotation; 24119f5173SCK Hu bool dirty; 25119f5173SCK Hu }; 26119f5173SCK Hu 27119f5173SCK Hu struct mtk_plane_state { 28119f5173SCK Hu struct drm_plane_state base; 29119f5173SCK Hu struct mtk_plane_pending_state pending; 30119f5173SCK Hu }; 31119f5173SCK Hu 32119f5173SCK Hu static inline struct mtk_plane_state * 33119f5173SCK Hu to_mtk_plane_state(struct drm_plane_state *state) 34119f5173SCK Hu { 35119f5173SCK Hu return container_of(state, struct mtk_plane_state, base); 36119f5173SCK Hu } 37119f5173SCK Hu 385bfafad8SDaniel Kurtz int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane, 39ef87d3e2SSean Paul unsigned long possible_crtcs, enum drm_plane_type type, 40ef87d3e2SSean Paul unsigned int supported_rotations); 41119f5173SCK Hu 42119f5173SCK Hu #endif 43