11802d0beSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2119f5173SCK Hu /* 3119f5173SCK Hu * Copyright (c) 2015 MediaTek Inc. 4119f5173SCK Hu * Author: CK Hu <ck.hu@mediatek.com> 5119f5173SCK Hu */ 6119f5173SCK Hu 7119f5173SCK Hu #ifndef _MTK_DRM_PLANE_H_ 8119f5173SCK Hu #define _MTK_DRM_PLANE_H_ 9119f5173SCK Hu 10119f5173SCK Hu #include <drm/drm_crtc.h> 11119f5173SCK Hu #include <linux/types.h> 12119f5173SCK Hu 13c410fa9bSJustin Green #define AFBC_DATA_BLOCK_WIDTH 32 14c410fa9bSJustin Green #define AFBC_DATA_BLOCK_HEIGHT 8 15c410fa9bSJustin Green #define AFBC_HEADER_BLOCK_SIZE 16 16c410fa9bSJustin Green #define AFBC_HEADER_ALIGNMENT 1024 17c410fa9bSJustin Green 18119f5173SCK Hu struct mtk_plane_pending_state { 19119f5173SCK Hu bool config; 20119f5173SCK Hu bool enable; 21119f5173SCK Hu dma_addr_t addr; 22c410fa9bSJustin Green dma_addr_t hdr_addr; 23119f5173SCK Hu unsigned int pitch; 24c410fa9bSJustin Green unsigned int hdr_pitch; 25119f5173SCK Hu unsigned int format; 26c410fa9bSJustin Green unsigned long long modifier; 27119f5173SCK Hu unsigned int x; 28119f5173SCK Hu unsigned int y; 29119f5173SCK Hu unsigned int width; 30119f5173SCK Hu unsigned int height; 31ef87d3e2SSean Paul unsigned int rotation; 32119f5173SCK Hu bool dirty; 33920fffccSBibby Hsieh bool async_dirty; 34920fffccSBibby Hsieh bool async_config; 355621416bSNancy.Lin enum drm_color_encoding color_encoding; 36119f5173SCK Hu }; 37119f5173SCK Hu 38119f5173SCK Hu struct mtk_plane_state { 39119f5173SCK Hu struct drm_plane_state base; 40119f5173SCK Hu struct mtk_plane_pending_state pending; 41119f5173SCK Hu }; 42119f5173SCK Hu 43119f5173SCK Hu static inline struct mtk_plane_state * to_mtk_plane_state(struct drm_plane_state * state)44119f5173SCK Huto_mtk_plane_state(struct drm_plane_state *state) 45119f5173SCK Hu { 46119f5173SCK Hu return container_of(state, struct mtk_plane_state, base); 47119f5173SCK Hu } 48119f5173SCK Hu 495bfafad8SDaniel Kurtz int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane, 50ef87d3e2SSean Paul unsigned long possible_crtcs, enum drm_plane_type type, 51*f287c66aSJustin Green unsigned int supported_rotations, const u32 *formats, 52*f287c66aSJustin Green size_t num_formats); 53119f5173SCK Hu 54119f5173SCK Hu #endif 55