1 /*
2  * Copyright (c) 2015 MediaTek Inc.
3  * Author: YT SHEN <yt.shen@mediatek.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  */
14 
15 #include <drm/drmP.h>
16 #include <drm/drm_atomic.h>
17 #include <drm/drm_atomic_helper.h>
18 #include <drm/drm_fb_helper.h>
19 #include <drm/drm_gem.h>
20 #include <drm/drm_gem_cma_helper.h>
21 #include <drm/drm_of.h>
22 #include <drm/drm_probe_helper.h>
23 #include <linux/component.h>
24 #include <linux/iommu.h>
25 #include <linux/of_address.h>
26 #include <linux/of_platform.h>
27 #include <linux/pm_runtime.h>
28 
29 #include "mtk_drm_crtc.h"
30 #include "mtk_drm_ddp.h"
31 #include "mtk_drm_ddp_comp.h"
32 #include "mtk_drm_drv.h"
33 #include "mtk_drm_fb.h"
34 #include "mtk_drm_gem.h"
35 
36 #define DRIVER_NAME "mediatek"
37 #define DRIVER_DESC "Mediatek SoC DRM"
38 #define DRIVER_DATE "20150513"
39 #define DRIVER_MAJOR 1
40 #define DRIVER_MINOR 0
41 
42 static void mtk_atomic_schedule(struct mtk_drm_private *private,
43 				struct drm_atomic_state *state)
44 {
45 	private->commit.state = state;
46 	schedule_work(&private->commit.work);
47 }
48 
49 static void mtk_atomic_wait_for_fences(struct drm_atomic_state *state)
50 {
51 	struct drm_plane *plane;
52 	struct drm_plane_state *new_plane_state;
53 	int i;
54 
55 	for_each_new_plane_in_state(state, plane, new_plane_state, i)
56 		mtk_fb_wait(new_plane_state->fb);
57 }
58 
59 static void mtk_atomic_complete(struct mtk_drm_private *private,
60 				struct drm_atomic_state *state)
61 {
62 	struct drm_device *drm = private->drm;
63 
64 	mtk_atomic_wait_for_fences(state);
65 
66 	/*
67 	 * Mediatek drm supports runtime PM, so plane registers cannot be
68 	 * written when their crtc is disabled.
69 	 *
70 	 * The comment for drm_atomic_helper_commit states:
71 	 *     For drivers supporting runtime PM the recommended sequence is
72 	 *
73 	 *     drm_atomic_helper_commit_modeset_disables(dev, state);
74 	 *     drm_atomic_helper_commit_modeset_enables(dev, state);
75 	 *     drm_atomic_helper_commit_planes(dev, state,
76 	 *                                     DRM_PLANE_COMMIT_ACTIVE_ONLY);
77 	 *
78 	 * See the kerneldoc entries for these three functions for more details.
79 	 */
80 	drm_atomic_helper_commit_modeset_disables(drm, state);
81 	drm_atomic_helper_commit_modeset_enables(drm, state);
82 	drm_atomic_helper_commit_planes(drm, state,
83 					DRM_PLANE_COMMIT_ACTIVE_ONLY);
84 
85 	drm_atomic_helper_wait_for_vblanks(drm, state);
86 
87 	drm_atomic_helper_cleanup_planes(drm, state);
88 	drm_atomic_state_put(state);
89 }
90 
91 static void mtk_atomic_work(struct work_struct *work)
92 {
93 	struct mtk_drm_private *private = container_of(work,
94 			struct mtk_drm_private, commit.work);
95 
96 	mtk_atomic_complete(private, private->commit.state);
97 }
98 
99 static int mtk_atomic_commit(struct drm_device *drm,
100 			     struct drm_atomic_state *state,
101 			     bool async)
102 {
103 	struct mtk_drm_private *private = drm->dev_private;
104 	int ret;
105 
106 	ret = drm_atomic_helper_prepare_planes(drm, state);
107 	if (ret)
108 		return ret;
109 
110 	mutex_lock(&private->commit.lock);
111 	flush_work(&private->commit.work);
112 
113 	ret = drm_atomic_helper_swap_state(state, true);
114 	if (ret) {
115 		mutex_unlock(&private->commit.lock);
116 		drm_atomic_helper_cleanup_planes(drm, state);
117 		return ret;
118 	}
119 
120 	drm_atomic_state_get(state);
121 	if (async)
122 		mtk_atomic_schedule(private, state);
123 	else
124 		mtk_atomic_complete(private, state);
125 
126 	mutex_unlock(&private->commit.lock);
127 
128 	return 0;
129 }
130 
131 static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = {
132 	.fb_create = mtk_drm_mode_fb_create,
133 	.atomic_check = drm_atomic_helper_check,
134 	.atomic_commit = mtk_atomic_commit,
135 };
136 
137 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = {
138 	DDP_COMPONENT_OVL0,
139 	DDP_COMPONENT_RDMA0,
140 	DDP_COMPONENT_COLOR0,
141 	DDP_COMPONENT_BLS,
142 	DDP_COMPONENT_DSI0,
143 };
144 
145 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = {
146 	DDP_COMPONENT_RDMA1,
147 	DDP_COMPONENT_DPI0,
148 };
149 
150 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {
151 	DDP_COMPONENT_OVL0,
152 	DDP_COMPONENT_COLOR0,
153 	DDP_COMPONENT_AAL0,
154 	DDP_COMPONENT_OD0,
155 	DDP_COMPONENT_RDMA0,
156 	DDP_COMPONENT_DPI0,
157 	DDP_COMPONENT_PWM0,
158 };
159 
160 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = {
161 	DDP_COMPONENT_OVL1,
162 	DDP_COMPONENT_COLOR1,
163 	DDP_COMPONENT_AAL1,
164 	DDP_COMPONENT_OD1,
165 	DDP_COMPONENT_RDMA1,
166 	DDP_COMPONENT_DPI1,
167 	DDP_COMPONENT_PWM1,
168 };
169 
170 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_third[] = {
171 	DDP_COMPONENT_RDMA2,
172 	DDP_COMPONENT_DSI3,
173 	DDP_COMPONENT_PWM2,
174 };
175 
176 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = {
177 	DDP_COMPONENT_OVL0,
178 	DDP_COMPONENT_COLOR0,
179 	DDP_COMPONENT_AAL0,
180 	DDP_COMPONENT_OD0,
181 	DDP_COMPONENT_RDMA0,
182 	DDP_COMPONENT_UFOE,
183 	DDP_COMPONENT_DSI0,
184 	DDP_COMPONENT_PWM0,
185 };
186 
187 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = {
188 	DDP_COMPONENT_OVL1,
189 	DDP_COMPONENT_COLOR1,
190 	DDP_COMPONENT_GAMMA,
191 	DDP_COMPONENT_RDMA1,
192 	DDP_COMPONENT_DPI0,
193 };
194 
195 static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
196 	.main_path = mt2701_mtk_ddp_main,
197 	.main_len = ARRAY_SIZE(mt2701_mtk_ddp_main),
198 	.ext_path = mt2701_mtk_ddp_ext,
199 	.ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext),
200 	.shadow_register = true,
201 };
202 
203 static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
204 	.main_path = mt2712_mtk_ddp_main,
205 	.main_len = ARRAY_SIZE(mt2712_mtk_ddp_main),
206 	.ext_path = mt2712_mtk_ddp_ext,
207 	.ext_len = ARRAY_SIZE(mt2712_mtk_ddp_ext),
208 	.third_path = mt2712_mtk_ddp_third,
209 	.third_len = ARRAY_SIZE(mt2712_mtk_ddp_third),
210 };
211 
212 static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
213 	.main_path = mt8173_mtk_ddp_main,
214 	.main_len = ARRAY_SIZE(mt8173_mtk_ddp_main),
215 	.ext_path = mt8173_mtk_ddp_ext,
216 	.ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext),
217 };
218 
219 static int mtk_drm_kms_init(struct drm_device *drm)
220 {
221 	struct mtk_drm_private *private = drm->dev_private;
222 	struct platform_device *pdev;
223 	struct device_node *np;
224 	int ret;
225 
226 	if (!iommu_present(&platform_bus_type))
227 		return -EPROBE_DEFER;
228 
229 	pdev = of_find_device_by_node(private->mutex_node);
230 	if (!pdev) {
231 		dev_err(drm->dev, "Waiting for disp-mutex device %pOF\n",
232 			private->mutex_node);
233 		of_node_put(private->mutex_node);
234 		return -EPROBE_DEFER;
235 	}
236 	private->mutex_dev = &pdev->dev;
237 
238 	drm_mode_config_init(drm);
239 
240 	drm->mode_config.min_width = 64;
241 	drm->mode_config.min_height = 64;
242 
243 	/*
244 	 * set max width and height as default value(4096x4096).
245 	 * this value would be used to check framebuffer size limitation
246 	 * at drm_mode_addfb().
247 	 */
248 	drm->mode_config.max_width = 4096;
249 	drm->mode_config.max_height = 4096;
250 	drm->mode_config.funcs = &mtk_drm_mode_config_funcs;
251 
252 	ret = component_bind_all(drm->dev, drm);
253 	if (ret)
254 		goto err_config_cleanup;
255 
256 	/*
257 	 * We currently support two fixed data streams, each optional,
258 	 * and each statically assigned to a crtc:
259 	 * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ...
260 	 */
261 	ret = mtk_drm_crtc_create(drm, private->data->main_path,
262 				  private->data->main_len);
263 	if (ret < 0)
264 		goto err_component_unbind;
265 	/* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */
266 	ret = mtk_drm_crtc_create(drm, private->data->ext_path,
267 				  private->data->ext_len);
268 	if (ret < 0)
269 		goto err_component_unbind;
270 
271 	ret = mtk_drm_crtc_create(drm, private->data->third_path,
272 				  private->data->third_len);
273 	if (ret < 0)
274 		goto err_component_unbind;
275 
276 	/* Use OVL device for all DMA memory allocations */
277 	np = private->comp_node[private->data->main_path[0]] ?:
278 	     private->comp_node[private->data->ext_path[0]];
279 	pdev = of_find_device_by_node(np);
280 	if (!pdev) {
281 		ret = -ENODEV;
282 		dev_err(drm->dev, "Need at least one OVL device\n");
283 		goto err_component_unbind;
284 	}
285 
286 	private->dma_dev = &pdev->dev;
287 
288 	/*
289 	 * We don't use the drm_irq_install() helpers provided by the DRM
290 	 * core, so we need to set this manually in order to allow the
291 	 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
292 	 */
293 	drm->irq_enabled = true;
294 	ret = drm_vblank_init(drm, MAX_CRTC);
295 	if (ret < 0)
296 		goto err_component_unbind;
297 
298 	drm_kms_helper_poll_init(drm);
299 	drm_mode_config_reset(drm);
300 
301 	return 0;
302 
303 err_component_unbind:
304 	component_unbind_all(drm->dev, drm);
305 err_config_cleanup:
306 	drm_mode_config_cleanup(drm);
307 
308 	return ret;
309 }
310 
311 static void mtk_drm_kms_deinit(struct drm_device *drm)
312 {
313 	drm_kms_helper_poll_fini(drm);
314 
315 	component_unbind_all(drm->dev, drm);
316 	drm_mode_config_cleanup(drm);
317 }
318 
319 static const struct file_operations mtk_drm_fops = {
320 	.owner = THIS_MODULE,
321 	.open = drm_open,
322 	.release = drm_release,
323 	.unlocked_ioctl = drm_ioctl,
324 	.mmap = mtk_drm_gem_mmap,
325 	.poll = drm_poll,
326 	.read = drm_read,
327 	.compat_ioctl = drm_compat_ioctl,
328 };
329 
330 static struct drm_driver mtk_drm_driver = {
331 	.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
332 			   DRIVER_ATOMIC,
333 
334 	.gem_free_object_unlocked = mtk_drm_gem_free_object,
335 	.gem_vm_ops = &drm_gem_cma_vm_ops,
336 	.dumb_create = mtk_drm_gem_dumb_create,
337 
338 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
339 	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
340 	.gem_prime_export = drm_gem_prime_export,
341 	.gem_prime_import = drm_gem_prime_import,
342 	.gem_prime_get_sg_table = mtk_gem_prime_get_sg_table,
343 	.gem_prime_import_sg_table = mtk_gem_prime_import_sg_table,
344 	.gem_prime_mmap = mtk_drm_gem_mmap_buf,
345 	.gem_prime_vmap = mtk_drm_gem_prime_vmap,
346 	.gem_prime_vunmap = mtk_drm_gem_prime_vunmap,
347 	.fops = &mtk_drm_fops,
348 
349 	.name = DRIVER_NAME,
350 	.desc = DRIVER_DESC,
351 	.date = DRIVER_DATE,
352 	.major = DRIVER_MAJOR,
353 	.minor = DRIVER_MINOR,
354 };
355 
356 static int compare_of(struct device *dev, void *data)
357 {
358 	return dev->of_node == data;
359 }
360 
361 static int mtk_drm_bind(struct device *dev)
362 {
363 	struct mtk_drm_private *private = dev_get_drvdata(dev);
364 	struct drm_device *drm;
365 	int ret;
366 
367 	drm = drm_dev_alloc(&mtk_drm_driver, dev);
368 	if (IS_ERR(drm))
369 		return PTR_ERR(drm);
370 
371 	drm->dev_private = private;
372 	private->drm = drm;
373 
374 	ret = mtk_drm_kms_init(drm);
375 	if (ret < 0)
376 		goto err_free;
377 
378 	ret = drm_dev_register(drm, 0);
379 	if (ret < 0)
380 		goto err_deinit;
381 
382 	ret = drm_fbdev_generic_setup(drm, 32);
383 	if (ret)
384 		DRM_ERROR("Failed to initialize fbdev: %d\n", ret);
385 
386 	return 0;
387 
388 err_deinit:
389 	mtk_drm_kms_deinit(drm);
390 err_free:
391 	drm_dev_put(drm);
392 	return ret;
393 }
394 
395 static void mtk_drm_unbind(struct device *dev)
396 {
397 	struct mtk_drm_private *private = dev_get_drvdata(dev);
398 
399 	drm_dev_unregister(private->drm);
400 	drm_dev_put(private->drm);
401 	private->drm = NULL;
402 }
403 
404 static const struct component_master_ops mtk_drm_ops = {
405 	.bind		= mtk_drm_bind,
406 	.unbind		= mtk_drm_unbind,
407 };
408 
409 static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
410 	{ .compatible = "mediatek,mt2701-disp-ovl",
411 	  .data = (void *)MTK_DISP_OVL },
412 	{ .compatible = "mediatek,mt8173-disp-ovl",
413 	  .data = (void *)MTK_DISP_OVL },
414 	{ .compatible = "mediatek,mt2701-disp-rdma",
415 	  .data = (void *)MTK_DISP_RDMA },
416 	{ .compatible = "mediatek,mt8173-disp-rdma",
417 	  .data = (void *)MTK_DISP_RDMA },
418 	{ .compatible = "mediatek,mt8173-disp-wdma",
419 	  .data = (void *)MTK_DISP_WDMA },
420 	{ .compatible = "mediatek,mt2701-disp-color",
421 	  .data = (void *)MTK_DISP_COLOR },
422 	{ .compatible = "mediatek,mt8173-disp-color",
423 	  .data = (void *)MTK_DISP_COLOR },
424 	{ .compatible = "mediatek,mt8173-disp-aal",
425 	  .data = (void *)MTK_DISP_AAL},
426 	{ .compatible = "mediatek,mt8173-disp-gamma",
427 	  .data = (void *)MTK_DISP_GAMMA, },
428 	{ .compatible = "mediatek,mt8173-disp-ufoe",
429 	  .data = (void *)MTK_DISP_UFOE },
430 	{ .compatible = "mediatek,mt2701-dsi",
431 	  .data = (void *)MTK_DSI },
432 	{ .compatible = "mediatek,mt8173-dsi",
433 	  .data = (void *)MTK_DSI },
434 	{ .compatible = "mediatek,mt2701-dpi",
435 	  .data = (void *)MTK_DPI },
436 	{ .compatible = "mediatek,mt8173-dpi",
437 	  .data = (void *)MTK_DPI },
438 	{ .compatible = "mediatek,mt2701-disp-mutex",
439 	  .data = (void *)MTK_DISP_MUTEX },
440 	{ .compatible = "mediatek,mt2712-disp-mutex",
441 	  .data = (void *)MTK_DISP_MUTEX },
442 	{ .compatible = "mediatek,mt8173-disp-mutex",
443 	  .data = (void *)MTK_DISP_MUTEX },
444 	{ .compatible = "mediatek,mt2701-disp-pwm",
445 	  .data = (void *)MTK_DISP_BLS },
446 	{ .compatible = "mediatek,mt8173-disp-pwm",
447 	  .data = (void *)MTK_DISP_PWM },
448 	{ .compatible = "mediatek,mt8173-disp-od",
449 	  .data = (void *)MTK_DISP_OD },
450 	{ }
451 };
452 
453 static int mtk_drm_probe(struct platform_device *pdev)
454 {
455 	struct device *dev = &pdev->dev;
456 	struct mtk_drm_private *private;
457 	struct resource *mem;
458 	struct device_node *node;
459 	struct component_match *match = NULL;
460 	int ret;
461 	int i;
462 
463 	private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL);
464 	if (!private)
465 		return -ENOMEM;
466 
467 	mutex_init(&private->commit.lock);
468 	INIT_WORK(&private->commit.work, mtk_atomic_work);
469 	private->data = of_device_get_match_data(dev);
470 
471 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
472 	private->config_regs = devm_ioremap_resource(dev, mem);
473 	if (IS_ERR(private->config_regs)) {
474 		ret = PTR_ERR(private->config_regs);
475 		dev_err(dev, "Failed to ioremap mmsys-config resource: %d\n",
476 			ret);
477 		return ret;
478 	}
479 
480 	/* Iterate over sibling DISP function blocks */
481 	for_each_child_of_node(dev->of_node->parent, node) {
482 		const struct of_device_id *of_id;
483 		enum mtk_ddp_comp_type comp_type;
484 		int comp_id;
485 
486 		of_id = of_match_node(mtk_ddp_comp_dt_ids, node);
487 		if (!of_id)
488 			continue;
489 
490 		if (!of_device_is_available(node)) {
491 			dev_dbg(dev, "Skipping disabled component %pOF\n",
492 				node);
493 			continue;
494 		}
495 
496 		comp_type = (enum mtk_ddp_comp_type)of_id->data;
497 
498 		if (comp_type == MTK_DISP_MUTEX) {
499 			private->mutex_node = of_node_get(node);
500 			continue;
501 		}
502 
503 		comp_id = mtk_ddp_comp_get_id(node, comp_type);
504 		if (comp_id < 0) {
505 			dev_warn(dev, "Skipping unknown component %pOF\n",
506 				 node);
507 			continue;
508 		}
509 
510 		private->comp_node[comp_id] = of_node_get(node);
511 
512 		/*
513 		 * Currently only the COLOR, OVL, RDMA, DSI, and DPI blocks have
514 		 * separate component platform drivers and initialize their own
515 		 * DDP component structure. The others are initialized here.
516 		 */
517 		if (comp_type == MTK_DISP_COLOR ||
518 		    comp_type == MTK_DISP_OVL ||
519 		    comp_type == MTK_DISP_RDMA ||
520 		    comp_type == MTK_DSI ||
521 		    comp_type == MTK_DPI) {
522 			dev_info(dev, "Adding component match for %pOF\n",
523 				 node);
524 			drm_of_component_match_add(dev, &match, compare_of,
525 						   node);
526 		} else {
527 			struct mtk_ddp_comp *comp;
528 
529 			comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL);
530 			if (!comp) {
531 				ret = -ENOMEM;
532 				goto err_node;
533 			}
534 
535 			ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL);
536 			if (ret)
537 				goto err_node;
538 
539 			private->ddp_comp[comp_id] = comp;
540 		}
541 	}
542 
543 	if (!private->mutex_node) {
544 		dev_err(dev, "Failed to find disp-mutex node\n");
545 		ret = -ENODEV;
546 		goto err_node;
547 	}
548 
549 	pm_runtime_enable(dev);
550 
551 	platform_set_drvdata(pdev, private);
552 
553 	ret = component_master_add_with_match(dev, &mtk_drm_ops, match);
554 	if (ret)
555 		goto err_pm;
556 
557 	return 0;
558 
559 err_pm:
560 	pm_runtime_disable(dev);
561 err_node:
562 	of_node_put(private->mutex_node);
563 	for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
564 		of_node_put(private->comp_node[i]);
565 	return ret;
566 }
567 
568 static int mtk_drm_remove(struct platform_device *pdev)
569 {
570 	struct mtk_drm_private *private = platform_get_drvdata(pdev);
571 	struct drm_device *drm = private->drm;
572 	int i;
573 
574 	drm_dev_unregister(drm);
575 	mtk_drm_kms_deinit(drm);
576 	drm_dev_put(drm);
577 
578 	component_master_del(&pdev->dev, &mtk_drm_ops);
579 	pm_runtime_disable(&pdev->dev);
580 	of_node_put(private->mutex_node);
581 	for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
582 		of_node_put(private->comp_node[i]);
583 
584 	return 0;
585 }
586 
587 #ifdef CONFIG_PM_SLEEP
588 static int mtk_drm_sys_suspend(struct device *dev)
589 {
590 	struct mtk_drm_private *private = dev_get_drvdata(dev);
591 	struct drm_device *drm = private->drm;
592 	int ret;
593 
594 	ret = drm_mode_config_helper_suspend(drm);
595 	DRM_DEBUG_DRIVER("mtk_drm_sys_suspend\n");
596 
597 	return ret;
598 }
599 
600 static int mtk_drm_sys_resume(struct device *dev)
601 {
602 	struct mtk_drm_private *private = dev_get_drvdata(dev);
603 	struct drm_device *drm = private->drm;
604 	int ret;
605 
606 	ret = drm_mode_config_helper_resume(drm);
607 	DRM_DEBUG_DRIVER("mtk_drm_sys_resume\n");
608 
609 	return ret;
610 }
611 #endif
612 
613 static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend,
614 			 mtk_drm_sys_resume);
615 
616 static const struct of_device_id mtk_drm_of_ids[] = {
617 	{ .compatible = "mediatek,mt2701-mmsys",
618 	  .data = &mt2701_mmsys_driver_data},
619 	{ .compatible = "mediatek,mt2712-mmsys",
620 	  .data = &mt2712_mmsys_driver_data},
621 	{ .compatible = "mediatek,mt8173-mmsys",
622 	  .data = &mt8173_mmsys_driver_data},
623 	{ }
624 };
625 
626 static struct platform_driver mtk_drm_platform_driver = {
627 	.probe	= mtk_drm_probe,
628 	.remove	= mtk_drm_remove,
629 	.driver	= {
630 		.name	= "mediatek-drm",
631 		.of_match_table = mtk_drm_of_ids,
632 		.pm     = &mtk_drm_pm_ops,
633 	},
634 };
635 
636 static struct platform_driver * const mtk_drm_drivers[] = {
637 	&mtk_ddp_driver,
638 	&mtk_disp_color_driver,
639 	&mtk_disp_ovl_driver,
640 	&mtk_disp_rdma_driver,
641 	&mtk_dpi_driver,
642 	&mtk_drm_platform_driver,
643 	&mtk_dsi_driver,
644 	&mtk_mipi_tx_driver,
645 };
646 
647 static int __init mtk_drm_init(void)
648 {
649 	return platform_register_drivers(mtk_drm_drivers,
650 					 ARRAY_SIZE(mtk_drm_drivers));
651 }
652 
653 static void __exit mtk_drm_exit(void)
654 {
655 	platform_unregister_drivers(mtk_drm_drivers,
656 				    ARRAY_SIZE(mtk_drm_drivers));
657 }
658 
659 module_init(mtk_drm_init);
660 module_exit(mtk_drm_exit);
661 
662 MODULE_AUTHOR("YT SHEN <yt.shen@mediatek.com>");
663 MODULE_DESCRIPTION("Mediatek SoC DRM driver");
664 MODULE_LICENSE("GPL v2");
665