1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2015 MediaTek Inc. 4 * Author: YT SHEN <yt.shen@mediatek.com> 5 */ 6 7 #include <linux/component.h> 8 #include <linux/iommu.h> 9 #include <linux/module.h> 10 #include <linux/of_address.h> 11 #include <linux/of_platform.h> 12 #include <linux/pm_runtime.h> 13 #include <linux/dma-mapping.h> 14 15 #include <drm/drm_atomic.h> 16 #include <drm/drm_atomic_helper.h> 17 #include <drm/drm_drv.h> 18 #include <drm/drm_fb_helper.h> 19 #include <drm/drm_fourcc.h> 20 #include <drm/drm_gem.h> 21 #include <drm/drm_gem_cma_helper.h> 22 #include <drm/drm_gem_framebuffer_helper.h> 23 #include <drm/drm_of.h> 24 #include <drm/drm_probe_helper.h> 25 #include <drm/drm_vblank.h> 26 27 #include "mtk_drm_crtc.h" 28 #include "mtk_drm_ddp.h" 29 #include "mtk_drm_ddp.h" 30 #include "mtk_drm_ddp_comp.h" 31 #include "mtk_drm_drv.h" 32 #include "mtk_drm_gem.h" 33 34 #define DRIVER_NAME "mediatek" 35 #define DRIVER_DESC "Mediatek SoC DRM" 36 #define DRIVER_DATE "20150513" 37 #define DRIVER_MAJOR 1 38 #define DRIVER_MINOR 0 39 40 static const struct drm_mode_config_helper_funcs mtk_drm_mode_config_helpers = { 41 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm, 42 }; 43 44 static struct drm_framebuffer * 45 mtk_drm_mode_fb_create(struct drm_device *dev, 46 struct drm_file *file, 47 const struct drm_mode_fb_cmd2 *cmd) 48 { 49 const struct drm_format_info *info = drm_get_format_info(dev, cmd); 50 51 if (info->num_planes != 1) 52 return ERR_PTR(-EINVAL); 53 54 return drm_gem_fb_create(dev, file, cmd); 55 } 56 57 static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = { 58 .fb_create = mtk_drm_mode_fb_create, 59 .atomic_check = drm_atomic_helper_check, 60 .atomic_commit = drm_atomic_helper_commit, 61 }; 62 63 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = { 64 DDP_COMPONENT_OVL0, 65 DDP_COMPONENT_RDMA0, 66 DDP_COMPONENT_COLOR0, 67 DDP_COMPONENT_BLS, 68 DDP_COMPONENT_DSI0, 69 }; 70 71 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = { 72 DDP_COMPONENT_RDMA1, 73 DDP_COMPONENT_DPI0, 74 }; 75 76 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = { 77 DDP_COMPONENT_OVL0, 78 DDP_COMPONENT_COLOR0, 79 DDP_COMPONENT_AAL0, 80 DDP_COMPONENT_OD0, 81 DDP_COMPONENT_RDMA0, 82 DDP_COMPONENT_DPI0, 83 DDP_COMPONENT_PWM0, 84 }; 85 86 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = { 87 DDP_COMPONENT_OVL1, 88 DDP_COMPONENT_COLOR1, 89 DDP_COMPONENT_AAL1, 90 DDP_COMPONENT_OD1, 91 DDP_COMPONENT_RDMA1, 92 DDP_COMPONENT_DPI1, 93 DDP_COMPONENT_PWM1, 94 }; 95 96 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_third[] = { 97 DDP_COMPONENT_RDMA2, 98 DDP_COMPONENT_DSI3, 99 DDP_COMPONENT_PWM2, 100 }; 101 102 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = { 103 DDP_COMPONENT_OVL0, 104 DDP_COMPONENT_COLOR0, 105 DDP_COMPONENT_AAL0, 106 DDP_COMPONENT_OD0, 107 DDP_COMPONENT_RDMA0, 108 DDP_COMPONENT_UFOE, 109 DDP_COMPONENT_DSI0, 110 DDP_COMPONENT_PWM0, 111 }; 112 113 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = { 114 DDP_COMPONENT_OVL1, 115 DDP_COMPONENT_COLOR1, 116 DDP_COMPONENT_GAMMA, 117 DDP_COMPONENT_RDMA1, 118 DDP_COMPONENT_DPI0, 119 }; 120 121 static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { 122 .main_path = mt2701_mtk_ddp_main, 123 .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main), 124 .ext_path = mt2701_mtk_ddp_ext, 125 .ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext), 126 .shadow_register = true, 127 }; 128 129 static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = { 130 .main_path = mt2712_mtk_ddp_main, 131 .main_len = ARRAY_SIZE(mt2712_mtk_ddp_main), 132 .ext_path = mt2712_mtk_ddp_ext, 133 .ext_len = ARRAY_SIZE(mt2712_mtk_ddp_ext), 134 .third_path = mt2712_mtk_ddp_third, 135 .third_len = ARRAY_SIZE(mt2712_mtk_ddp_third), 136 }; 137 138 static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = { 139 .main_path = mt8173_mtk_ddp_main, 140 .main_len = ARRAY_SIZE(mt8173_mtk_ddp_main), 141 .ext_path = mt8173_mtk_ddp_ext, 142 .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext), 143 }; 144 145 static int mtk_drm_kms_init(struct drm_device *drm) 146 { 147 struct mtk_drm_private *private = drm->dev_private; 148 struct platform_device *pdev; 149 struct device_node *np; 150 struct device *dma_dev; 151 int ret; 152 153 if (!iommu_present(&platform_bus_type)) 154 return -EPROBE_DEFER; 155 156 pdev = of_find_device_by_node(private->mutex_node); 157 if (!pdev) { 158 dev_err(drm->dev, "Waiting for disp-mutex device %pOF\n", 159 private->mutex_node); 160 of_node_put(private->mutex_node); 161 return -EPROBE_DEFER; 162 } 163 private->mutex_dev = &pdev->dev; 164 165 drm_mode_config_init(drm); 166 167 drm->mode_config.min_width = 64; 168 drm->mode_config.min_height = 64; 169 170 /* 171 * set max width and height as default value(4096x4096). 172 * this value would be used to check framebuffer size limitation 173 * at drm_mode_addfb(). 174 */ 175 drm->mode_config.max_width = 4096; 176 drm->mode_config.max_height = 4096; 177 drm->mode_config.funcs = &mtk_drm_mode_config_funcs; 178 drm->mode_config.helper_private = &mtk_drm_mode_config_helpers; 179 180 ret = component_bind_all(drm->dev, drm); 181 if (ret) 182 goto err_config_cleanup; 183 184 /* 185 * We currently support two fixed data streams, each optional, 186 * and each statically assigned to a crtc: 187 * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ... 188 */ 189 ret = mtk_drm_crtc_create(drm, private->data->main_path, 190 private->data->main_len); 191 if (ret < 0) 192 goto err_component_unbind; 193 /* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */ 194 ret = mtk_drm_crtc_create(drm, private->data->ext_path, 195 private->data->ext_len); 196 if (ret < 0) 197 goto err_component_unbind; 198 199 ret = mtk_drm_crtc_create(drm, private->data->third_path, 200 private->data->third_len); 201 if (ret < 0) 202 goto err_component_unbind; 203 204 /* Use OVL device for all DMA memory allocations */ 205 np = private->comp_node[private->data->main_path[0]] ?: 206 private->comp_node[private->data->ext_path[0]]; 207 pdev = of_find_device_by_node(np); 208 if (!pdev) { 209 ret = -ENODEV; 210 dev_err(drm->dev, "Need at least one OVL device\n"); 211 goto err_component_unbind; 212 } 213 214 dma_dev = &pdev->dev; 215 private->dma_dev = dma_dev; 216 217 /* 218 * Configure the DMA segment size to make sure we get contiguous IOVA 219 * when importing PRIME buffers. 220 */ 221 if (!dma_dev->dma_parms) { 222 private->dma_parms_allocated = true; 223 dma_dev->dma_parms = 224 devm_kzalloc(drm->dev, sizeof(*dma_dev->dma_parms), 225 GFP_KERNEL); 226 } 227 if (!dma_dev->dma_parms) { 228 ret = -ENOMEM; 229 goto err_component_unbind; 230 } 231 232 ret = dma_set_max_seg_size(dma_dev, (unsigned int)DMA_BIT_MASK(32)); 233 if (ret) { 234 dev_err(dma_dev, "Failed to set DMA segment size\n"); 235 goto err_unset_dma_parms; 236 } 237 238 /* 239 * We don't use the drm_irq_install() helpers provided by the DRM 240 * core, so we need to set this manually in order to allow the 241 * DRM_IOCTL_WAIT_VBLANK to operate correctly. 242 */ 243 drm->irq_enabled = true; 244 ret = drm_vblank_init(drm, MAX_CRTC); 245 if (ret < 0) 246 goto err_unset_dma_parms; 247 248 drm_kms_helper_poll_init(drm); 249 drm_mode_config_reset(drm); 250 251 return 0; 252 253 err_unset_dma_parms: 254 if (private->dma_parms_allocated) 255 dma_dev->dma_parms = NULL; 256 err_component_unbind: 257 component_unbind_all(drm->dev, drm); 258 err_config_cleanup: 259 drm_mode_config_cleanup(drm); 260 261 return ret; 262 } 263 264 static void mtk_drm_kms_deinit(struct drm_device *drm) 265 { 266 struct mtk_drm_private *private = drm->dev_private; 267 268 drm_kms_helper_poll_fini(drm); 269 drm_atomic_helper_shutdown(drm); 270 271 if (private->dma_parms_allocated) 272 private->dma_dev->dma_parms = NULL; 273 274 component_unbind_all(drm->dev, drm); 275 drm_mode_config_cleanup(drm); 276 } 277 278 static const struct file_operations mtk_drm_fops = { 279 .owner = THIS_MODULE, 280 .open = drm_open, 281 .release = drm_release, 282 .unlocked_ioctl = drm_ioctl, 283 .mmap = mtk_drm_gem_mmap, 284 .poll = drm_poll, 285 .read = drm_read, 286 .compat_ioctl = drm_compat_ioctl, 287 }; 288 289 /* 290 * We need to override this because the device used to import the memory is 291 * not dev->dev, as drm_gem_prime_import() expects. 292 */ 293 struct drm_gem_object *mtk_drm_gem_prime_import(struct drm_device *dev, 294 struct dma_buf *dma_buf) 295 { 296 struct mtk_drm_private *private = dev->dev_private; 297 298 return drm_gem_prime_import_dev(dev, dma_buf, private->dma_dev); 299 } 300 301 static struct drm_driver mtk_drm_driver = { 302 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC, 303 304 .gem_free_object_unlocked = mtk_drm_gem_free_object, 305 .gem_vm_ops = &drm_gem_cma_vm_ops, 306 .dumb_create = mtk_drm_gem_dumb_create, 307 308 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 309 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 310 .gem_prime_import = mtk_drm_gem_prime_import, 311 .gem_prime_get_sg_table = mtk_gem_prime_get_sg_table, 312 .gem_prime_import_sg_table = mtk_gem_prime_import_sg_table, 313 .gem_prime_mmap = mtk_drm_gem_mmap_buf, 314 .gem_prime_vmap = mtk_drm_gem_prime_vmap, 315 .gem_prime_vunmap = mtk_drm_gem_prime_vunmap, 316 .fops = &mtk_drm_fops, 317 318 .name = DRIVER_NAME, 319 .desc = DRIVER_DESC, 320 .date = DRIVER_DATE, 321 .major = DRIVER_MAJOR, 322 .minor = DRIVER_MINOR, 323 }; 324 325 static int compare_of(struct device *dev, void *data) 326 { 327 return dev->of_node == data; 328 } 329 330 static int mtk_drm_bind(struct device *dev) 331 { 332 struct mtk_drm_private *private = dev_get_drvdata(dev); 333 struct drm_device *drm; 334 int ret; 335 336 drm = drm_dev_alloc(&mtk_drm_driver, dev); 337 if (IS_ERR(drm)) 338 return PTR_ERR(drm); 339 340 drm->dev_private = private; 341 private->drm = drm; 342 343 ret = mtk_drm_kms_init(drm); 344 if (ret < 0) 345 goto err_free; 346 347 ret = drm_dev_register(drm, 0); 348 if (ret < 0) 349 goto err_deinit; 350 351 ret = drm_fbdev_generic_setup(drm, 32); 352 if (ret) 353 DRM_ERROR("Failed to initialize fbdev: %d\n", ret); 354 355 return 0; 356 357 err_deinit: 358 mtk_drm_kms_deinit(drm); 359 err_free: 360 drm_dev_put(drm); 361 return ret; 362 } 363 364 static void mtk_drm_unbind(struct device *dev) 365 { 366 struct mtk_drm_private *private = dev_get_drvdata(dev); 367 368 drm_dev_unregister(private->drm); 369 mtk_drm_kms_deinit(private->drm); 370 drm_dev_put(private->drm); 371 private->num_pipes = 0; 372 private->drm = NULL; 373 } 374 375 static const struct component_master_ops mtk_drm_ops = { 376 .bind = mtk_drm_bind, 377 .unbind = mtk_drm_unbind, 378 }; 379 380 static const struct of_device_id mtk_ddp_comp_dt_ids[] = { 381 { .compatible = "mediatek,mt2701-disp-ovl", 382 .data = (void *)MTK_DISP_OVL }, 383 { .compatible = "mediatek,mt8173-disp-ovl", 384 .data = (void *)MTK_DISP_OVL }, 385 { .compatible = "mediatek,mt2701-disp-rdma", 386 .data = (void *)MTK_DISP_RDMA }, 387 { .compatible = "mediatek,mt8173-disp-rdma", 388 .data = (void *)MTK_DISP_RDMA }, 389 { .compatible = "mediatek,mt8173-disp-wdma", 390 .data = (void *)MTK_DISP_WDMA }, 391 { .compatible = "mediatek,mt2701-disp-color", 392 .data = (void *)MTK_DISP_COLOR }, 393 { .compatible = "mediatek,mt8173-disp-color", 394 .data = (void *)MTK_DISP_COLOR }, 395 { .compatible = "mediatek,mt8173-disp-aal", 396 .data = (void *)MTK_DISP_AAL}, 397 { .compatible = "mediatek,mt8173-disp-gamma", 398 .data = (void *)MTK_DISP_GAMMA, }, 399 { .compatible = "mediatek,mt8173-disp-ufoe", 400 .data = (void *)MTK_DISP_UFOE }, 401 { .compatible = "mediatek,mt2701-dsi", 402 .data = (void *)MTK_DSI }, 403 { .compatible = "mediatek,mt8173-dsi", 404 .data = (void *)MTK_DSI }, 405 { .compatible = "mediatek,mt2701-dpi", 406 .data = (void *)MTK_DPI }, 407 { .compatible = "mediatek,mt8173-dpi", 408 .data = (void *)MTK_DPI }, 409 { .compatible = "mediatek,mt2701-disp-mutex", 410 .data = (void *)MTK_DISP_MUTEX }, 411 { .compatible = "mediatek,mt2712-disp-mutex", 412 .data = (void *)MTK_DISP_MUTEX }, 413 { .compatible = "mediatek,mt8173-disp-mutex", 414 .data = (void *)MTK_DISP_MUTEX }, 415 { .compatible = "mediatek,mt2701-disp-pwm", 416 .data = (void *)MTK_DISP_BLS }, 417 { .compatible = "mediatek,mt8173-disp-pwm", 418 .data = (void *)MTK_DISP_PWM }, 419 { .compatible = "mediatek,mt8173-disp-od", 420 .data = (void *)MTK_DISP_OD }, 421 { } 422 }; 423 424 static int mtk_drm_probe(struct platform_device *pdev) 425 { 426 struct device *dev = &pdev->dev; 427 struct mtk_drm_private *private; 428 struct resource *mem; 429 struct device_node *node; 430 struct component_match *match = NULL; 431 int ret; 432 int i; 433 434 private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL); 435 if (!private) 436 return -ENOMEM; 437 438 private->data = of_device_get_match_data(dev); 439 440 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 441 private->config_regs = devm_ioremap_resource(dev, mem); 442 if (IS_ERR(private->config_regs)) { 443 ret = PTR_ERR(private->config_regs); 444 dev_err(dev, "Failed to ioremap mmsys-config resource: %d\n", 445 ret); 446 return ret; 447 } 448 449 /* Iterate over sibling DISP function blocks */ 450 for_each_child_of_node(dev->of_node->parent, node) { 451 const struct of_device_id *of_id; 452 enum mtk_ddp_comp_type comp_type; 453 int comp_id; 454 455 of_id = of_match_node(mtk_ddp_comp_dt_ids, node); 456 if (!of_id) 457 continue; 458 459 if (!of_device_is_available(node)) { 460 dev_dbg(dev, "Skipping disabled component %pOF\n", 461 node); 462 continue; 463 } 464 465 comp_type = (enum mtk_ddp_comp_type)of_id->data; 466 467 if (comp_type == MTK_DISP_MUTEX) { 468 private->mutex_node = of_node_get(node); 469 continue; 470 } 471 472 comp_id = mtk_ddp_comp_get_id(node, comp_type); 473 if (comp_id < 0) { 474 dev_warn(dev, "Skipping unknown component %pOF\n", 475 node); 476 continue; 477 } 478 479 private->comp_node[comp_id] = of_node_get(node); 480 481 /* 482 * Currently only the COLOR, OVL, RDMA, DSI, and DPI blocks have 483 * separate component platform drivers and initialize their own 484 * DDP component structure. The others are initialized here. 485 */ 486 if (comp_type == MTK_DISP_COLOR || 487 comp_type == MTK_DISP_OVL || 488 comp_type == MTK_DISP_OVL_2L || 489 comp_type == MTK_DISP_RDMA || 490 comp_type == MTK_DSI || 491 comp_type == MTK_DPI) { 492 dev_info(dev, "Adding component match for %pOF\n", 493 node); 494 drm_of_component_match_add(dev, &match, compare_of, 495 node); 496 } else { 497 struct mtk_ddp_comp *comp; 498 499 comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL); 500 if (!comp) { 501 ret = -ENOMEM; 502 of_node_put(node); 503 goto err_node; 504 } 505 506 ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL); 507 if (ret) { 508 of_node_put(node); 509 goto err_node; 510 } 511 512 private->ddp_comp[comp_id] = comp; 513 } 514 } 515 516 if (!private->mutex_node) { 517 dev_err(dev, "Failed to find disp-mutex node\n"); 518 ret = -ENODEV; 519 goto err_node; 520 } 521 522 pm_runtime_enable(dev); 523 524 platform_set_drvdata(pdev, private); 525 526 ret = component_master_add_with_match(dev, &mtk_drm_ops, match); 527 if (ret) 528 goto err_pm; 529 530 return 0; 531 532 err_pm: 533 pm_runtime_disable(dev); 534 err_node: 535 of_node_put(private->mutex_node); 536 for (i = 0; i < DDP_COMPONENT_ID_MAX; i++) 537 of_node_put(private->comp_node[i]); 538 return ret; 539 } 540 541 static int mtk_drm_remove(struct platform_device *pdev) 542 { 543 struct mtk_drm_private *private = platform_get_drvdata(pdev); 544 int i; 545 546 component_master_del(&pdev->dev, &mtk_drm_ops); 547 pm_runtime_disable(&pdev->dev); 548 of_node_put(private->mutex_node); 549 for (i = 0; i < DDP_COMPONENT_ID_MAX; i++) 550 of_node_put(private->comp_node[i]); 551 552 return 0; 553 } 554 555 #ifdef CONFIG_PM_SLEEP 556 static int mtk_drm_sys_suspend(struct device *dev) 557 { 558 struct mtk_drm_private *private = dev_get_drvdata(dev); 559 struct drm_device *drm = private->drm; 560 int ret; 561 562 ret = drm_mode_config_helper_suspend(drm); 563 DRM_DEBUG_DRIVER("mtk_drm_sys_suspend\n"); 564 565 return ret; 566 } 567 568 static int mtk_drm_sys_resume(struct device *dev) 569 { 570 struct mtk_drm_private *private = dev_get_drvdata(dev); 571 struct drm_device *drm = private->drm; 572 int ret; 573 574 ret = drm_mode_config_helper_resume(drm); 575 DRM_DEBUG_DRIVER("mtk_drm_sys_resume\n"); 576 577 return ret; 578 } 579 #endif 580 581 static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend, 582 mtk_drm_sys_resume); 583 584 static const struct of_device_id mtk_drm_of_ids[] = { 585 { .compatible = "mediatek,mt2701-mmsys", 586 .data = &mt2701_mmsys_driver_data}, 587 { .compatible = "mediatek,mt2712-mmsys", 588 .data = &mt2712_mmsys_driver_data}, 589 { .compatible = "mediatek,mt8173-mmsys", 590 .data = &mt8173_mmsys_driver_data}, 591 { } 592 }; 593 594 static struct platform_driver mtk_drm_platform_driver = { 595 .probe = mtk_drm_probe, 596 .remove = mtk_drm_remove, 597 .driver = { 598 .name = "mediatek-drm", 599 .of_match_table = mtk_drm_of_ids, 600 .pm = &mtk_drm_pm_ops, 601 }, 602 }; 603 604 static struct platform_driver * const mtk_drm_drivers[] = { 605 &mtk_ddp_driver, 606 &mtk_disp_color_driver, 607 &mtk_disp_ovl_driver, 608 &mtk_disp_rdma_driver, 609 &mtk_dpi_driver, 610 &mtk_drm_platform_driver, 611 &mtk_mipi_tx_driver, 612 &mtk_dsi_driver, 613 }; 614 615 static int __init mtk_drm_init(void) 616 { 617 return platform_register_drivers(mtk_drm_drivers, 618 ARRAY_SIZE(mtk_drm_drivers)); 619 } 620 621 static void __exit mtk_drm_exit(void) 622 { 623 platform_unregister_drivers(mtk_drm_drivers, 624 ARRAY_SIZE(mtk_drm_drivers)); 625 } 626 627 module_init(mtk_drm_init); 628 module_exit(mtk_drm_exit); 629 630 MODULE_AUTHOR("YT SHEN <yt.shen@mediatek.com>"); 631 MODULE_DESCRIPTION("Mediatek SoC DRM driver"); 632 MODULE_LICENSE("GPL v2"); 633