1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2015 MediaTek Inc. 4 * Author: YT SHEN <yt.shen@mediatek.com> 5 */ 6 7 #include <drm/drmP.h> 8 #include <drm/drm_atomic.h> 9 #include <drm/drm_atomic_helper.h> 10 #include <drm/drm_fb_helper.h> 11 #include <drm/drm_gem.h> 12 #include <drm/drm_gem_cma_helper.h> 13 #include <drm/drm_of.h> 14 #include <drm/drm_probe_helper.h> 15 #include <linux/component.h> 16 #include <linux/iommu.h> 17 #include <linux/of_address.h> 18 #include <linux/of_platform.h> 19 #include <linux/pm_runtime.h> 20 21 #include "mtk_drm_crtc.h" 22 #include "mtk_drm_ddp.h" 23 #include "mtk_drm_ddp_comp.h" 24 #include "mtk_drm_drv.h" 25 #include "mtk_drm_fb.h" 26 #include "mtk_drm_gem.h" 27 28 #define DRIVER_NAME "mediatek" 29 #define DRIVER_DESC "Mediatek SoC DRM" 30 #define DRIVER_DATE "20150513" 31 #define DRIVER_MAJOR 1 32 #define DRIVER_MINOR 0 33 34 static void mtk_atomic_schedule(struct mtk_drm_private *private, 35 struct drm_atomic_state *state) 36 { 37 private->commit.state = state; 38 schedule_work(&private->commit.work); 39 } 40 41 static void mtk_atomic_wait_for_fences(struct drm_atomic_state *state) 42 { 43 struct drm_plane *plane; 44 struct drm_plane_state *new_plane_state; 45 int i; 46 47 for_each_new_plane_in_state(state, plane, new_plane_state, i) 48 mtk_fb_wait(new_plane_state->fb); 49 } 50 51 static void mtk_atomic_complete(struct mtk_drm_private *private, 52 struct drm_atomic_state *state) 53 { 54 struct drm_device *drm = private->drm; 55 56 mtk_atomic_wait_for_fences(state); 57 58 /* 59 * Mediatek drm supports runtime PM, so plane registers cannot be 60 * written when their crtc is disabled. 61 * 62 * The comment for drm_atomic_helper_commit states: 63 * For drivers supporting runtime PM the recommended sequence is 64 * 65 * drm_atomic_helper_commit_modeset_disables(dev, state); 66 * drm_atomic_helper_commit_modeset_enables(dev, state); 67 * drm_atomic_helper_commit_planes(dev, state, 68 * DRM_PLANE_COMMIT_ACTIVE_ONLY); 69 * 70 * See the kerneldoc entries for these three functions for more details. 71 */ 72 drm_atomic_helper_commit_modeset_disables(drm, state); 73 drm_atomic_helper_commit_modeset_enables(drm, state); 74 drm_atomic_helper_commit_planes(drm, state, 75 DRM_PLANE_COMMIT_ACTIVE_ONLY); 76 77 drm_atomic_helper_wait_for_vblanks(drm, state); 78 79 drm_atomic_helper_cleanup_planes(drm, state); 80 drm_atomic_state_put(state); 81 } 82 83 static void mtk_atomic_work(struct work_struct *work) 84 { 85 struct mtk_drm_private *private = container_of(work, 86 struct mtk_drm_private, commit.work); 87 88 mtk_atomic_complete(private, private->commit.state); 89 } 90 91 static int mtk_atomic_commit(struct drm_device *drm, 92 struct drm_atomic_state *state, 93 bool async) 94 { 95 struct mtk_drm_private *private = drm->dev_private; 96 int ret; 97 98 ret = drm_atomic_helper_prepare_planes(drm, state); 99 if (ret) 100 return ret; 101 102 mutex_lock(&private->commit.lock); 103 flush_work(&private->commit.work); 104 105 ret = drm_atomic_helper_swap_state(state, true); 106 if (ret) { 107 mutex_unlock(&private->commit.lock); 108 drm_atomic_helper_cleanup_planes(drm, state); 109 return ret; 110 } 111 112 drm_atomic_state_get(state); 113 if (async) 114 mtk_atomic_schedule(private, state); 115 else 116 mtk_atomic_complete(private, state); 117 118 mutex_unlock(&private->commit.lock); 119 120 return 0; 121 } 122 123 static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = { 124 .fb_create = mtk_drm_mode_fb_create, 125 .atomic_check = drm_atomic_helper_check, 126 .atomic_commit = mtk_atomic_commit, 127 }; 128 129 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = { 130 DDP_COMPONENT_OVL0, 131 DDP_COMPONENT_RDMA0, 132 DDP_COMPONENT_COLOR0, 133 DDP_COMPONENT_BLS, 134 DDP_COMPONENT_DSI0, 135 }; 136 137 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = { 138 DDP_COMPONENT_RDMA1, 139 DDP_COMPONENT_DPI0, 140 }; 141 142 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = { 143 DDP_COMPONENT_OVL0, 144 DDP_COMPONENT_COLOR0, 145 DDP_COMPONENT_AAL0, 146 DDP_COMPONENT_OD0, 147 DDP_COMPONENT_RDMA0, 148 DDP_COMPONENT_DPI0, 149 DDP_COMPONENT_PWM0, 150 }; 151 152 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = { 153 DDP_COMPONENT_OVL1, 154 DDP_COMPONENT_COLOR1, 155 DDP_COMPONENT_AAL1, 156 DDP_COMPONENT_OD1, 157 DDP_COMPONENT_RDMA1, 158 DDP_COMPONENT_DPI1, 159 DDP_COMPONENT_PWM1, 160 }; 161 162 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_third[] = { 163 DDP_COMPONENT_RDMA2, 164 DDP_COMPONENT_DSI3, 165 DDP_COMPONENT_PWM2, 166 }; 167 168 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = { 169 DDP_COMPONENT_OVL0, 170 DDP_COMPONENT_COLOR0, 171 DDP_COMPONENT_AAL0, 172 DDP_COMPONENT_OD0, 173 DDP_COMPONENT_RDMA0, 174 DDP_COMPONENT_UFOE, 175 DDP_COMPONENT_DSI0, 176 DDP_COMPONENT_PWM0, 177 }; 178 179 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = { 180 DDP_COMPONENT_OVL1, 181 DDP_COMPONENT_COLOR1, 182 DDP_COMPONENT_GAMMA, 183 DDP_COMPONENT_RDMA1, 184 DDP_COMPONENT_DPI0, 185 }; 186 187 static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { 188 .main_path = mt2701_mtk_ddp_main, 189 .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main), 190 .ext_path = mt2701_mtk_ddp_ext, 191 .ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext), 192 .shadow_register = true, 193 }; 194 195 static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = { 196 .main_path = mt2712_mtk_ddp_main, 197 .main_len = ARRAY_SIZE(mt2712_mtk_ddp_main), 198 .ext_path = mt2712_mtk_ddp_ext, 199 .ext_len = ARRAY_SIZE(mt2712_mtk_ddp_ext), 200 .third_path = mt2712_mtk_ddp_third, 201 .third_len = ARRAY_SIZE(mt2712_mtk_ddp_third), 202 }; 203 204 static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = { 205 .main_path = mt8173_mtk_ddp_main, 206 .main_len = ARRAY_SIZE(mt8173_mtk_ddp_main), 207 .ext_path = mt8173_mtk_ddp_ext, 208 .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext), 209 }; 210 211 static int mtk_drm_kms_init(struct drm_device *drm) 212 { 213 struct mtk_drm_private *private = drm->dev_private; 214 struct platform_device *pdev; 215 struct device_node *np; 216 int ret; 217 218 if (!iommu_present(&platform_bus_type)) 219 return -EPROBE_DEFER; 220 221 pdev = of_find_device_by_node(private->mutex_node); 222 if (!pdev) { 223 dev_err(drm->dev, "Waiting for disp-mutex device %pOF\n", 224 private->mutex_node); 225 of_node_put(private->mutex_node); 226 return -EPROBE_DEFER; 227 } 228 private->mutex_dev = &pdev->dev; 229 230 drm_mode_config_init(drm); 231 232 drm->mode_config.min_width = 64; 233 drm->mode_config.min_height = 64; 234 235 /* 236 * set max width and height as default value(4096x4096). 237 * this value would be used to check framebuffer size limitation 238 * at drm_mode_addfb(). 239 */ 240 drm->mode_config.max_width = 4096; 241 drm->mode_config.max_height = 4096; 242 drm->mode_config.funcs = &mtk_drm_mode_config_funcs; 243 244 ret = component_bind_all(drm->dev, drm); 245 if (ret) 246 goto err_config_cleanup; 247 248 /* 249 * We currently support two fixed data streams, each optional, 250 * and each statically assigned to a crtc: 251 * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ... 252 */ 253 ret = mtk_drm_crtc_create(drm, private->data->main_path, 254 private->data->main_len); 255 if (ret < 0) 256 goto err_component_unbind; 257 /* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */ 258 ret = mtk_drm_crtc_create(drm, private->data->ext_path, 259 private->data->ext_len); 260 if (ret < 0) 261 goto err_component_unbind; 262 263 ret = mtk_drm_crtc_create(drm, private->data->third_path, 264 private->data->third_len); 265 if (ret < 0) 266 goto err_component_unbind; 267 268 /* Use OVL device for all DMA memory allocations */ 269 np = private->comp_node[private->data->main_path[0]] ?: 270 private->comp_node[private->data->ext_path[0]]; 271 pdev = of_find_device_by_node(np); 272 if (!pdev) { 273 ret = -ENODEV; 274 dev_err(drm->dev, "Need at least one OVL device\n"); 275 goto err_component_unbind; 276 } 277 278 private->dma_dev = &pdev->dev; 279 280 /* 281 * We don't use the drm_irq_install() helpers provided by the DRM 282 * core, so we need to set this manually in order to allow the 283 * DRM_IOCTL_WAIT_VBLANK to operate correctly. 284 */ 285 drm->irq_enabled = true; 286 ret = drm_vblank_init(drm, MAX_CRTC); 287 if (ret < 0) 288 goto err_component_unbind; 289 290 drm_kms_helper_poll_init(drm); 291 drm_mode_config_reset(drm); 292 293 return 0; 294 295 err_component_unbind: 296 component_unbind_all(drm->dev, drm); 297 err_config_cleanup: 298 drm_mode_config_cleanup(drm); 299 300 return ret; 301 } 302 303 static void mtk_drm_kms_deinit(struct drm_device *drm) 304 { 305 drm_kms_helper_poll_fini(drm); 306 drm_atomic_helper_shutdown(drm); 307 308 component_unbind_all(drm->dev, drm); 309 drm_mode_config_cleanup(drm); 310 } 311 312 static const struct file_operations mtk_drm_fops = { 313 .owner = THIS_MODULE, 314 .open = drm_open, 315 .release = drm_release, 316 .unlocked_ioctl = drm_ioctl, 317 .mmap = mtk_drm_gem_mmap, 318 .poll = drm_poll, 319 .read = drm_read, 320 .compat_ioctl = drm_compat_ioctl, 321 }; 322 323 static struct drm_driver mtk_drm_driver = { 324 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME | 325 DRIVER_ATOMIC, 326 327 .gem_free_object_unlocked = mtk_drm_gem_free_object, 328 .gem_vm_ops = &drm_gem_cma_vm_ops, 329 .dumb_create = mtk_drm_gem_dumb_create, 330 331 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 332 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 333 .gem_prime_export = drm_gem_prime_export, 334 .gem_prime_import = drm_gem_prime_import, 335 .gem_prime_get_sg_table = mtk_gem_prime_get_sg_table, 336 .gem_prime_import_sg_table = mtk_gem_prime_import_sg_table, 337 .gem_prime_mmap = mtk_drm_gem_mmap_buf, 338 .gem_prime_vmap = mtk_drm_gem_prime_vmap, 339 .gem_prime_vunmap = mtk_drm_gem_prime_vunmap, 340 .fops = &mtk_drm_fops, 341 342 .name = DRIVER_NAME, 343 .desc = DRIVER_DESC, 344 .date = DRIVER_DATE, 345 .major = DRIVER_MAJOR, 346 .minor = DRIVER_MINOR, 347 }; 348 349 static int compare_of(struct device *dev, void *data) 350 { 351 return dev->of_node == data; 352 } 353 354 static int mtk_drm_bind(struct device *dev) 355 { 356 struct mtk_drm_private *private = dev_get_drvdata(dev); 357 struct drm_device *drm; 358 int ret; 359 360 drm = drm_dev_alloc(&mtk_drm_driver, dev); 361 if (IS_ERR(drm)) 362 return PTR_ERR(drm); 363 364 drm->dev_private = private; 365 private->drm = drm; 366 367 ret = mtk_drm_kms_init(drm); 368 if (ret < 0) 369 goto err_free; 370 371 ret = drm_dev_register(drm, 0); 372 if (ret < 0) 373 goto err_deinit; 374 375 ret = drm_fbdev_generic_setup(drm, 32); 376 if (ret) 377 DRM_ERROR("Failed to initialize fbdev: %d\n", ret); 378 379 return 0; 380 381 err_deinit: 382 mtk_drm_kms_deinit(drm); 383 err_free: 384 drm_dev_put(drm); 385 return ret; 386 } 387 388 static void mtk_drm_unbind(struct device *dev) 389 { 390 struct mtk_drm_private *private = dev_get_drvdata(dev); 391 392 drm_dev_unregister(private->drm); 393 mtk_drm_kms_deinit(private->drm); 394 drm_dev_put(private->drm); 395 private->num_pipes = 0; 396 private->drm = NULL; 397 } 398 399 static const struct component_master_ops mtk_drm_ops = { 400 .bind = mtk_drm_bind, 401 .unbind = mtk_drm_unbind, 402 }; 403 404 static const struct of_device_id mtk_ddp_comp_dt_ids[] = { 405 { .compatible = "mediatek,mt2701-disp-ovl", 406 .data = (void *)MTK_DISP_OVL }, 407 { .compatible = "mediatek,mt8173-disp-ovl", 408 .data = (void *)MTK_DISP_OVL }, 409 { .compatible = "mediatek,mt2701-disp-rdma", 410 .data = (void *)MTK_DISP_RDMA }, 411 { .compatible = "mediatek,mt8173-disp-rdma", 412 .data = (void *)MTK_DISP_RDMA }, 413 { .compatible = "mediatek,mt8173-disp-wdma", 414 .data = (void *)MTK_DISP_WDMA }, 415 { .compatible = "mediatek,mt2701-disp-color", 416 .data = (void *)MTK_DISP_COLOR }, 417 { .compatible = "mediatek,mt8173-disp-color", 418 .data = (void *)MTK_DISP_COLOR }, 419 { .compatible = "mediatek,mt8173-disp-aal", 420 .data = (void *)MTK_DISP_AAL}, 421 { .compatible = "mediatek,mt8173-disp-gamma", 422 .data = (void *)MTK_DISP_GAMMA, }, 423 { .compatible = "mediatek,mt8173-disp-ufoe", 424 .data = (void *)MTK_DISP_UFOE }, 425 { .compatible = "mediatek,mt2701-dsi", 426 .data = (void *)MTK_DSI }, 427 { .compatible = "mediatek,mt8173-dsi", 428 .data = (void *)MTK_DSI }, 429 { .compatible = "mediatek,mt2701-dpi", 430 .data = (void *)MTK_DPI }, 431 { .compatible = "mediatek,mt8173-dpi", 432 .data = (void *)MTK_DPI }, 433 { .compatible = "mediatek,mt2701-disp-mutex", 434 .data = (void *)MTK_DISP_MUTEX }, 435 { .compatible = "mediatek,mt2712-disp-mutex", 436 .data = (void *)MTK_DISP_MUTEX }, 437 { .compatible = "mediatek,mt8173-disp-mutex", 438 .data = (void *)MTK_DISP_MUTEX }, 439 { .compatible = "mediatek,mt2701-disp-pwm", 440 .data = (void *)MTK_DISP_BLS }, 441 { .compatible = "mediatek,mt8173-disp-pwm", 442 .data = (void *)MTK_DISP_PWM }, 443 { .compatible = "mediatek,mt8173-disp-od", 444 .data = (void *)MTK_DISP_OD }, 445 { } 446 }; 447 448 static int mtk_drm_probe(struct platform_device *pdev) 449 { 450 struct device *dev = &pdev->dev; 451 struct mtk_drm_private *private; 452 struct resource *mem; 453 struct device_node *node; 454 struct component_match *match = NULL; 455 int ret; 456 int i; 457 458 private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL); 459 if (!private) 460 return -ENOMEM; 461 462 mutex_init(&private->commit.lock); 463 INIT_WORK(&private->commit.work, mtk_atomic_work); 464 private->data = of_device_get_match_data(dev); 465 466 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 467 private->config_regs = devm_ioremap_resource(dev, mem); 468 if (IS_ERR(private->config_regs)) { 469 ret = PTR_ERR(private->config_regs); 470 dev_err(dev, "Failed to ioremap mmsys-config resource: %d\n", 471 ret); 472 return ret; 473 } 474 475 /* Iterate over sibling DISP function blocks */ 476 for_each_child_of_node(dev->of_node->parent, node) { 477 const struct of_device_id *of_id; 478 enum mtk_ddp_comp_type comp_type; 479 int comp_id; 480 481 of_id = of_match_node(mtk_ddp_comp_dt_ids, node); 482 if (!of_id) 483 continue; 484 485 if (!of_device_is_available(node)) { 486 dev_dbg(dev, "Skipping disabled component %pOF\n", 487 node); 488 continue; 489 } 490 491 comp_type = (enum mtk_ddp_comp_type)of_id->data; 492 493 if (comp_type == MTK_DISP_MUTEX) { 494 private->mutex_node = of_node_get(node); 495 continue; 496 } 497 498 comp_id = mtk_ddp_comp_get_id(node, comp_type); 499 if (comp_id < 0) { 500 dev_warn(dev, "Skipping unknown component %pOF\n", 501 node); 502 continue; 503 } 504 505 private->comp_node[comp_id] = of_node_get(node); 506 507 /* 508 * Currently only the COLOR, OVL, RDMA, DSI, and DPI blocks have 509 * separate component platform drivers and initialize their own 510 * DDP component structure. The others are initialized here. 511 */ 512 if (comp_type == MTK_DISP_COLOR || 513 comp_type == MTK_DISP_OVL || 514 comp_type == MTK_DISP_RDMA || 515 comp_type == MTK_DSI || 516 comp_type == MTK_DPI) { 517 dev_info(dev, "Adding component match for %pOF\n", 518 node); 519 drm_of_component_match_add(dev, &match, compare_of, 520 node); 521 } else { 522 struct mtk_ddp_comp *comp; 523 524 comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL); 525 if (!comp) { 526 ret = -ENOMEM; 527 goto err_node; 528 } 529 530 ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL); 531 if (ret) 532 goto err_node; 533 534 private->ddp_comp[comp_id] = comp; 535 } 536 } 537 538 if (!private->mutex_node) { 539 dev_err(dev, "Failed to find disp-mutex node\n"); 540 ret = -ENODEV; 541 goto err_node; 542 } 543 544 pm_runtime_enable(dev); 545 546 platform_set_drvdata(pdev, private); 547 548 ret = component_master_add_with_match(dev, &mtk_drm_ops, match); 549 if (ret) 550 goto err_pm; 551 552 return 0; 553 554 err_pm: 555 pm_runtime_disable(dev); 556 err_node: 557 of_node_put(private->mutex_node); 558 for (i = 0; i < DDP_COMPONENT_ID_MAX; i++) 559 of_node_put(private->comp_node[i]); 560 return ret; 561 } 562 563 static int mtk_drm_remove(struct platform_device *pdev) 564 { 565 struct mtk_drm_private *private = platform_get_drvdata(pdev); 566 int i; 567 568 component_master_del(&pdev->dev, &mtk_drm_ops); 569 pm_runtime_disable(&pdev->dev); 570 of_node_put(private->mutex_node); 571 for (i = 0; i < DDP_COMPONENT_ID_MAX; i++) 572 of_node_put(private->comp_node[i]); 573 574 return 0; 575 } 576 577 #ifdef CONFIG_PM_SLEEP 578 static int mtk_drm_sys_suspend(struct device *dev) 579 { 580 struct mtk_drm_private *private = dev_get_drvdata(dev); 581 struct drm_device *drm = private->drm; 582 int ret; 583 584 ret = drm_mode_config_helper_suspend(drm); 585 DRM_DEBUG_DRIVER("mtk_drm_sys_suspend\n"); 586 587 return ret; 588 } 589 590 static int mtk_drm_sys_resume(struct device *dev) 591 { 592 struct mtk_drm_private *private = dev_get_drvdata(dev); 593 struct drm_device *drm = private->drm; 594 int ret; 595 596 ret = drm_mode_config_helper_resume(drm); 597 DRM_DEBUG_DRIVER("mtk_drm_sys_resume\n"); 598 599 return ret; 600 } 601 #endif 602 603 static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend, 604 mtk_drm_sys_resume); 605 606 static const struct of_device_id mtk_drm_of_ids[] = { 607 { .compatible = "mediatek,mt2701-mmsys", 608 .data = &mt2701_mmsys_driver_data}, 609 { .compatible = "mediatek,mt2712-mmsys", 610 .data = &mt2712_mmsys_driver_data}, 611 { .compatible = "mediatek,mt8173-mmsys", 612 .data = &mt8173_mmsys_driver_data}, 613 { } 614 }; 615 616 static struct platform_driver mtk_drm_platform_driver = { 617 .probe = mtk_drm_probe, 618 .remove = mtk_drm_remove, 619 .driver = { 620 .name = "mediatek-drm", 621 .of_match_table = mtk_drm_of_ids, 622 .pm = &mtk_drm_pm_ops, 623 }, 624 }; 625 626 static struct platform_driver * const mtk_drm_drivers[] = { 627 &mtk_ddp_driver, 628 &mtk_disp_color_driver, 629 &mtk_disp_ovl_driver, 630 &mtk_disp_rdma_driver, 631 &mtk_dpi_driver, 632 &mtk_drm_platform_driver, 633 &mtk_dsi_driver, 634 &mtk_mipi_tx_driver, 635 }; 636 637 static int __init mtk_drm_init(void) 638 { 639 return platform_register_drivers(mtk_drm_drivers, 640 ARRAY_SIZE(mtk_drm_drivers)); 641 } 642 643 static void __exit mtk_drm_exit(void) 644 { 645 platform_unregister_drivers(mtk_drm_drivers, 646 ARRAY_SIZE(mtk_drm_drivers)); 647 } 648 649 module_init(mtk_drm_init); 650 module_exit(mtk_drm_exit); 651 652 MODULE_AUTHOR("YT SHEN <yt.shen@mediatek.com>"); 653 MODULE_DESCRIPTION("Mediatek SoC DRM driver"); 654 MODULE_LICENSE("GPL v2"); 655