1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2015 MediaTek Inc.
4  * Author: YT SHEN <yt.shen@mediatek.com>
5  */
6 
7 #include <linux/component.h>
8 #include <linux/iommu.h>
9 #include <linux/module.h>
10 #include <linux/of_address.h>
11 #include <linux/of_platform.h>
12 #include <linux/pm_runtime.h>
13 #include <linux/dma-mapping.h>
14 
15 #include <drm/drm_atomic.h>
16 #include <drm/drm_atomic_helper.h>
17 #include <drm/drm_drv.h>
18 #include <drm/drm_fb_helper.h>
19 #include <drm/drm_fourcc.h>
20 #include <drm/drm_gem.h>
21 #include <drm/drm_gem_cma_helper.h>
22 #include <drm/drm_gem_framebuffer_helper.h>
23 #include <drm/drm_of.h>
24 #include <drm/drm_probe_helper.h>
25 #include <drm/drm_vblank.h>
26 
27 #include "mtk_drm_crtc.h"
28 #include "mtk_drm_ddp.h"
29 #include "mtk_drm_ddp.h"
30 #include "mtk_drm_ddp_comp.h"
31 #include "mtk_drm_drv.h"
32 #include "mtk_drm_gem.h"
33 
34 #define DRIVER_NAME "mediatek"
35 #define DRIVER_DESC "Mediatek SoC DRM"
36 #define DRIVER_DATE "20150513"
37 #define DRIVER_MAJOR 1
38 #define DRIVER_MINOR 0
39 
40 static const struct drm_mode_config_helper_funcs mtk_drm_mode_config_helpers = {
41 	.atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
42 };
43 
44 static struct drm_framebuffer *
45 mtk_drm_mode_fb_create(struct drm_device *dev,
46 		       struct drm_file *file,
47 		       const struct drm_mode_fb_cmd2 *cmd)
48 {
49 	const struct drm_format_info *info = drm_get_format_info(dev, cmd);
50 
51 	if (info->num_planes != 1)
52 		return ERR_PTR(-EINVAL);
53 
54 	return drm_gem_fb_create(dev, file, cmd);
55 }
56 
57 static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = {
58 	.fb_create = mtk_drm_mode_fb_create,
59 	.atomic_check = drm_atomic_helper_check,
60 	.atomic_commit = drm_atomic_helper_commit,
61 };
62 
63 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = {
64 	DDP_COMPONENT_OVL0,
65 	DDP_COMPONENT_RDMA0,
66 	DDP_COMPONENT_COLOR0,
67 	DDP_COMPONENT_BLS,
68 	DDP_COMPONENT_DSI0,
69 };
70 
71 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = {
72 	DDP_COMPONENT_RDMA1,
73 	DDP_COMPONENT_DPI0,
74 };
75 
76 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {
77 	DDP_COMPONENT_OVL0,
78 	DDP_COMPONENT_COLOR0,
79 	DDP_COMPONENT_AAL0,
80 	DDP_COMPONENT_OD0,
81 	DDP_COMPONENT_RDMA0,
82 	DDP_COMPONENT_DPI0,
83 	DDP_COMPONENT_PWM0,
84 };
85 
86 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = {
87 	DDP_COMPONENT_OVL1,
88 	DDP_COMPONENT_COLOR1,
89 	DDP_COMPONENT_AAL1,
90 	DDP_COMPONENT_OD1,
91 	DDP_COMPONENT_RDMA1,
92 	DDP_COMPONENT_DPI1,
93 	DDP_COMPONENT_PWM1,
94 };
95 
96 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_third[] = {
97 	DDP_COMPONENT_RDMA2,
98 	DDP_COMPONENT_DSI3,
99 	DDP_COMPONENT_PWM2,
100 };
101 
102 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = {
103 	DDP_COMPONENT_OVL0,
104 	DDP_COMPONENT_COLOR0,
105 	DDP_COMPONENT_AAL0,
106 	DDP_COMPONENT_OD0,
107 	DDP_COMPONENT_RDMA0,
108 	DDP_COMPONENT_UFOE,
109 	DDP_COMPONENT_DSI0,
110 	DDP_COMPONENT_PWM0,
111 };
112 
113 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = {
114 	DDP_COMPONENT_OVL1,
115 	DDP_COMPONENT_COLOR1,
116 	DDP_COMPONENT_GAMMA,
117 	DDP_COMPONENT_RDMA1,
118 	DDP_COMPONENT_DPI0,
119 };
120 
121 static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
122 	.main_path = mt2701_mtk_ddp_main,
123 	.main_len = ARRAY_SIZE(mt2701_mtk_ddp_main),
124 	.ext_path = mt2701_mtk_ddp_ext,
125 	.ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext),
126 	.shadow_register = true,
127 };
128 
129 static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
130 	.main_path = mt2712_mtk_ddp_main,
131 	.main_len = ARRAY_SIZE(mt2712_mtk_ddp_main),
132 	.ext_path = mt2712_mtk_ddp_ext,
133 	.ext_len = ARRAY_SIZE(mt2712_mtk_ddp_ext),
134 	.third_path = mt2712_mtk_ddp_third,
135 	.third_len = ARRAY_SIZE(mt2712_mtk_ddp_third),
136 };
137 
138 static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
139 	.main_path = mt8173_mtk_ddp_main,
140 	.main_len = ARRAY_SIZE(mt8173_mtk_ddp_main),
141 	.ext_path = mt8173_mtk_ddp_ext,
142 	.ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext),
143 };
144 
145 static int mtk_drm_kms_init(struct drm_device *drm)
146 {
147 	struct mtk_drm_private *private = drm->dev_private;
148 	struct platform_device *pdev;
149 	struct device_node *np;
150 	struct device *dma_dev;
151 	int ret;
152 
153 	if (!iommu_present(&platform_bus_type))
154 		return -EPROBE_DEFER;
155 
156 	pdev = of_find_device_by_node(private->mutex_node);
157 	if (!pdev) {
158 		dev_err(drm->dev, "Waiting for disp-mutex device %pOF\n",
159 			private->mutex_node);
160 		of_node_put(private->mutex_node);
161 		return -EPROBE_DEFER;
162 	}
163 	private->mutex_dev = &pdev->dev;
164 
165 	ret = drmm_mode_config_init(drm);
166 	if (ret)
167 		return ret;
168 
169 	drm->mode_config.min_width = 64;
170 	drm->mode_config.min_height = 64;
171 
172 	/*
173 	 * set max width and height as default value(4096x4096).
174 	 * this value would be used to check framebuffer size limitation
175 	 * at drm_mode_addfb().
176 	 */
177 	drm->mode_config.max_width = 4096;
178 	drm->mode_config.max_height = 4096;
179 	drm->mode_config.funcs = &mtk_drm_mode_config_funcs;
180 	drm->mode_config.helper_private = &mtk_drm_mode_config_helpers;
181 
182 	ret = component_bind_all(drm->dev, drm);
183 	if (ret)
184 		return ret;
185 
186 	/*
187 	 * We currently support two fixed data streams, each optional,
188 	 * and each statically assigned to a crtc:
189 	 * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ...
190 	 */
191 	ret = mtk_drm_crtc_create(drm, private->data->main_path,
192 				  private->data->main_len);
193 	if (ret < 0)
194 		goto err_component_unbind;
195 	/* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */
196 	ret = mtk_drm_crtc_create(drm, private->data->ext_path,
197 				  private->data->ext_len);
198 	if (ret < 0)
199 		goto err_component_unbind;
200 
201 	ret = mtk_drm_crtc_create(drm, private->data->third_path,
202 				  private->data->third_len);
203 	if (ret < 0)
204 		goto err_component_unbind;
205 
206 	/* Use OVL device for all DMA memory allocations */
207 	np = private->comp_node[private->data->main_path[0]] ?:
208 	     private->comp_node[private->data->ext_path[0]];
209 	pdev = of_find_device_by_node(np);
210 	if (!pdev) {
211 		ret = -ENODEV;
212 		dev_err(drm->dev, "Need at least one OVL device\n");
213 		goto err_component_unbind;
214 	}
215 
216 	dma_dev = &pdev->dev;
217 	private->dma_dev = dma_dev;
218 
219 	/*
220 	 * Configure the DMA segment size to make sure we get contiguous IOVA
221 	 * when importing PRIME buffers.
222 	 */
223 	if (!dma_dev->dma_parms) {
224 		private->dma_parms_allocated = true;
225 		dma_dev->dma_parms =
226 			devm_kzalloc(drm->dev, sizeof(*dma_dev->dma_parms),
227 				     GFP_KERNEL);
228 	}
229 	if (!dma_dev->dma_parms) {
230 		ret = -ENOMEM;
231 		goto err_component_unbind;
232 	}
233 
234 	ret = dma_set_max_seg_size(dma_dev, (unsigned int)DMA_BIT_MASK(32));
235 	if (ret) {
236 		dev_err(dma_dev, "Failed to set DMA segment size\n");
237 		goto err_unset_dma_parms;
238 	}
239 
240 	/*
241 	 * We don't use the drm_irq_install() helpers provided by the DRM
242 	 * core, so we need to set this manually in order to allow the
243 	 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
244 	 */
245 	drm->irq_enabled = true;
246 	ret = drm_vblank_init(drm, MAX_CRTC);
247 	if (ret < 0)
248 		goto err_unset_dma_parms;
249 
250 	drm_kms_helper_poll_init(drm);
251 	drm_mode_config_reset(drm);
252 
253 	return 0;
254 
255 err_unset_dma_parms:
256 	if (private->dma_parms_allocated)
257 		dma_dev->dma_parms = NULL;
258 err_component_unbind:
259 	component_unbind_all(drm->dev, drm);
260 
261 	return ret;
262 }
263 
264 static void mtk_drm_kms_deinit(struct drm_device *drm)
265 {
266 	struct mtk_drm_private *private = drm->dev_private;
267 
268 	drm_kms_helper_poll_fini(drm);
269 	drm_atomic_helper_shutdown(drm);
270 
271 	if (private->dma_parms_allocated)
272 		private->dma_dev->dma_parms = NULL;
273 
274 	component_unbind_all(drm->dev, drm);
275 }
276 
277 static const struct file_operations mtk_drm_fops = {
278 	.owner = THIS_MODULE,
279 	.open = drm_open,
280 	.release = drm_release,
281 	.unlocked_ioctl = drm_ioctl,
282 	.mmap = mtk_drm_gem_mmap,
283 	.poll = drm_poll,
284 	.read = drm_read,
285 	.compat_ioctl = drm_compat_ioctl,
286 };
287 
288 /*
289  * We need to override this because the device used to import the memory is
290  * not dev->dev, as drm_gem_prime_import() expects.
291  */
292 struct drm_gem_object *mtk_drm_gem_prime_import(struct drm_device *dev,
293 						struct dma_buf *dma_buf)
294 {
295 	struct mtk_drm_private *private = dev->dev_private;
296 
297 	return drm_gem_prime_import_dev(dev, dma_buf, private->dma_dev);
298 }
299 
300 static struct drm_driver mtk_drm_driver = {
301 	.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
302 
303 	.gem_free_object_unlocked = mtk_drm_gem_free_object,
304 	.gem_vm_ops = &drm_gem_cma_vm_ops,
305 	.dumb_create = mtk_drm_gem_dumb_create,
306 
307 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
308 	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
309 	.gem_prime_import = mtk_drm_gem_prime_import,
310 	.gem_prime_get_sg_table = mtk_gem_prime_get_sg_table,
311 	.gem_prime_import_sg_table = mtk_gem_prime_import_sg_table,
312 	.gem_prime_mmap = mtk_drm_gem_mmap_buf,
313 	.gem_prime_vmap = mtk_drm_gem_prime_vmap,
314 	.gem_prime_vunmap = mtk_drm_gem_prime_vunmap,
315 	.fops = &mtk_drm_fops,
316 
317 	.name = DRIVER_NAME,
318 	.desc = DRIVER_DESC,
319 	.date = DRIVER_DATE,
320 	.major = DRIVER_MAJOR,
321 	.minor = DRIVER_MINOR,
322 };
323 
324 static int compare_of(struct device *dev, void *data)
325 {
326 	return dev->of_node == data;
327 }
328 
329 static int mtk_drm_bind(struct device *dev)
330 {
331 	struct mtk_drm_private *private = dev_get_drvdata(dev);
332 	struct drm_device *drm;
333 	int ret;
334 
335 	drm = drm_dev_alloc(&mtk_drm_driver, dev);
336 	if (IS_ERR(drm))
337 		return PTR_ERR(drm);
338 
339 	drm->dev_private = private;
340 	private->drm = drm;
341 
342 	ret = mtk_drm_kms_init(drm);
343 	if (ret < 0)
344 		goto err_free;
345 
346 	ret = drm_dev_register(drm, 0);
347 	if (ret < 0)
348 		goto err_deinit;
349 
350 	drm_fbdev_generic_setup(drm, 32);
351 
352 	return 0;
353 
354 err_deinit:
355 	mtk_drm_kms_deinit(drm);
356 err_free:
357 	drm_dev_put(drm);
358 	return ret;
359 }
360 
361 static void mtk_drm_unbind(struct device *dev)
362 {
363 	struct mtk_drm_private *private = dev_get_drvdata(dev);
364 
365 	drm_dev_unregister(private->drm);
366 	mtk_drm_kms_deinit(private->drm);
367 	drm_dev_put(private->drm);
368 	private->num_pipes = 0;
369 	private->drm = NULL;
370 }
371 
372 static const struct component_master_ops mtk_drm_ops = {
373 	.bind		= mtk_drm_bind,
374 	.unbind		= mtk_drm_unbind,
375 };
376 
377 static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
378 	{ .compatible = "mediatek,mt2701-disp-ovl",
379 	  .data = (void *)MTK_DISP_OVL },
380 	{ .compatible = "mediatek,mt8173-disp-ovl",
381 	  .data = (void *)MTK_DISP_OVL },
382 	{ .compatible = "mediatek,mt2701-disp-rdma",
383 	  .data = (void *)MTK_DISP_RDMA },
384 	{ .compatible = "mediatek,mt8173-disp-rdma",
385 	  .data = (void *)MTK_DISP_RDMA },
386 	{ .compatible = "mediatek,mt8173-disp-wdma",
387 	  .data = (void *)MTK_DISP_WDMA },
388 	{ .compatible = "mediatek,mt2701-disp-color",
389 	  .data = (void *)MTK_DISP_COLOR },
390 	{ .compatible = "mediatek,mt8173-disp-color",
391 	  .data = (void *)MTK_DISP_COLOR },
392 	{ .compatible = "mediatek,mt8173-disp-aal",
393 	  .data = (void *)MTK_DISP_AAL},
394 	{ .compatible = "mediatek,mt8173-disp-gamma",
395 	  .data = (void *)MTK_DISP_GAMMA, },
396 	{ .compatible = "mediatek,mt8173-disp-ufoe",
397 	  .data = (void *)MTK_DISP_UFOE },
398 	{ .compatible = "mediatek,mt2701-dsi",
399 	  .data = (void *)MTK_DSI },
400 	{ .compatible = "mediatek,mt8173-dsi",
401 	  .data = (void *)MTK_DSI },
402 	{ .compatible = "mediatek,mt2701-dpi",
403 	  .data = (void *)MTK_DPI },
404 	{ .compatible = "mediatek,mt8173-dpi",
405 	  .data = (void *)MTK_DPI },
406 	{ .compatible = "mediatek,mt2701-disp-mutex",
407 	  .data = (void *)MTK_DISP_MUTEX },
408 	{ .compatible = "mediatek,mt2712-disp-mutex",
409 	  .data = (void *)MTK_DISP_MUTEX },
410 	{ .compatible = "mediatek,mt8173-disp-mutex",
411 	  .data = (void *)MTK_DISP_MUTEX },
412 	{ .compatible = "mediatek,mt2701-disp-pwm",
413 	  .data = (void *)MTK_DISP_BLS },
414 	{ .compatible = "mediatek,mt8173-disp-pwm",
415 	  .data = (void *)MTK_DISP_PWM },
416 	{ .compatible = "mediatek,mt8173-disp-od",
417 	  .data = (void *)MTK_DISP_OD },
418 	{ }
419 };
420 
421 static int mtk_drm_probe(struct platform_device *pdev)
422 {
423 	struct device *dev = &pdev->dev;
424 	struct mtk_drm_private *private;
425 	struct resource *mem;
426 	struct device_node *node;
427 	struct component_match *match = NULL;
428 	int ret;
429 	int i;
430 
431 	private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL);
432 	if (!private)
433 		return -ENOMEM;
434 
435 	private->data = of_device_get_match_data(dev);
436 
437 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
438 	private->config_regs = devm_ioremap_resource(dev, mem);
439 	if (IS_ERR(private->config_regs)) {
440 		ret = PTR_ERR(private->config_regs);
441 		dev_err(dev, "Failed to ioremap mmsys-config resource: %d\n",
442 			ret);
443 		return ret;
444 	}
445 
446 	/* Iterate over sibling DISP function blocks */
447 	for_each_child_of_node(dev->of_node->parent, node) {
448 		const struct of_device_id *of_id;
449 		enum mtk_ddp_comp_type comp_type;
450 		int comp_id;
451 
452 		of_id = of_match_node(mtk_ddp_comp_dt_ids, node);
453 		if (!of_id)
454 			continue;
455 
456 		if (!of_device_is_available(node)) {
457 			dev_dbg(dev, "Skipping disabled component %pOF\n",
458 				node);
459 			continue;
460 		}
461 
462 		comp_type = (enum mtk_ddp_comp_type)of_id->data;
463 
464 		if (comp_type == MTK_DISP_MUTEX) {
465 			private->mutex_node = of_node_get(node);
466 			continue;
467 		}
468 
469 		comp_id = mtk_ddp_comp_get_id(node, comp_type);
470 		if (comp_id < 0) {
471 			dev_warn(dev, "Skipping unknown component %pOF\n",
472 				 node);
473 			continue;
474 		}
475 
476 		private->comp_node[comp_id] = of_node_get(node);
477 
478 		/*
479 		 * Currently only the COLOR, OVL, RDMA, DSI, and DPI blocks have
480 		 * separate component platform drivers and initialize their own
481 		 * DDP component structure. The others are initialized here.
482 		 */
483 		if (comp_type == MTK_DISP_COLOR ||
484 		    comp_type == MTK_DISP_OVL ||
485 		    comp_type == MTK_DISP_OVL_2L ||
486 		    comp_type == MTK_DISP_RDMA ||
487 		    comp_type == MTK_DSI ||
488 		    comp_type == MTK_DPI) {
489 			dev_info(dev, "Adding component match for %pOF\n",
490 				 node);
491 			drm_of_component_match_add(dev, &match, compare_of,
492 						   node);
493 		} else {
494 			struct mtk_ddp_comp *comp;
495 
496 			comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL);
497 			if (!comp) {
498 				ret = -ENOMEM;
499 				of_node_put(node);
500 				goto err_node;
501 			}
502 
503 			ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL);
504 			if (ret) {
505 				of_node_put(node);
506 				goto err_node;
507 			}
508 
509 			private->ddp_comp[comp_id] = comp;
510 		}
511 	}
512 
513 	if (!private->mutex_node) {
514 		dev_err(dev, "Failed to find disp-mutex node\n");
515 		ret = -ENODEV;
516 		goto err_node;
517 	}
518 
519 	pm_runtime_enable(dev);
520 
521 	platform_set_drvdata(pdev, private);
522 
523 	ret = component_master_add_with_match(dev, &mtk_drm_ops, match);
524 	if (ret)
525 		goto err_pm;
526 
527 	return 0;
528 
529 err_pm:
530 	pm_runtime_disable(dev);
531 err_node:
532 	of_node_put(private->mutex_node);
533 	for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
534 		of_node_put(private->comp_node[i]);
535 	return ret;
536 }
537 
538 static int mtk_drm_remove(struct platform_device *pdev)
539 {
540 	struct mtk_drm_private *private = platform_get_drvdata(pdev);
541 	int i;
542 
543 	component_master_del(&pdev->dev, &mtk_drm_ops);
544 	pm_runtime_disable(&pdev->dev);
545 	of_node_put(private->mutex_node);
546 	for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
547 		of_node_put(private->comp_node[i]);
548 
549 	return 0;
550 }
551 
552 #ifdef CONFIG_PM_SLEEP
553 static int mtk_drm_sys_suspend(struct device *dev)
554 {
555 	struct mtk_drm_private *private = dev_get_drvdata(dev);
556 	struct drm_device *drm = private->drm;
557 	int ret;
558 
559 	ret = drm_mode_config_helper_suspend(drm);
560 	DRM_DEBUG_DRIVER("mtk_drm_sys_suspend\n");
561 
562 	return ret;
563 }
564 
565 static int mtk_drm_sys_resume(struct device *dev)
566 {
567 	struct mtk_drm_private *private = dev_get_drvdata(dev);
568 	struct drm_device *drm = private->drm;
569 	int ret;
570 
571 	ret = drm_mode_config_helper_resume(drm);
572 	DRM_DEBUG_DRIVER("mtk_drm_sys_resume\n");
573 
574 	return ret;
575 }
576 #endif
577 
578 static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend,
579 			 mtk_drm_sys_resume);
580 
581 static const struct of_device_id mtk_drm_of_ids[] = {
582 	{ .compatible = "mediatek,mt2701-mmsys",
583 	  .data = &mt2701_mmsys_driver_data},
584 	{ .compatible = "mediatek,mt2712-mmsys",
585 	  .data = &mt2712_mmsys_driver_data},
586 	{ .compatible = "mediatek,mt8173-mmsys",
587 	  .data = &mt8173_mmsys_driver_data},
588 	{ }
589 };
590 
591 static struct platform_driver mtk_drm_platform_driver = {
592 	.probe	= mtk_drm_probe,
593 	.remove	= mtk_drm_remove,
594 	.driver	= {
595 		.name	= "mediatek-drm",
596 		.of_match_table = mtk_drm_of_ids,
597 		.pm     = &mtk_drm_pm_ops,
598 	},
599 };
600 
601 static struct platform_driver * const mtk_drm_drivers[] = {
602 	&mtk_ddp_driver,
603 	&mtk_disp_color_driver,
604 	&mtk_disp_ovl_driver,
605 	&mtk_disp_rdma_driver,
606 	&mtk_dpi_driver,
607 	&mtk_drm_platform_driver,
608 	&mtk_mipi_tx_driver,
609 	&mtk_dsi_driver,
610 };
611 
612 static int __init mtk_drm_init(void)
613 {
614 	return platform_register_drivers(mtk_drm_drivers,
615 					 ARRAY_SIZE(mtk_drm_drivers));
616 }
617 
618 static void __exit mtk_drm_exit(void)
619 {
620 	platform_unregister_drivers(mtk_drm_drivers,
621 				    ARRAY_SIZE(mtk_drm_drivers));
622 }
623 
624 module_init(mtk_drm_init);
625 module_exit(mtk_drm_exit);
626 
627 MODULE_AUTHOR("YT SHEN <yt.shen@mediatek.com>");
628 MODULE_DESCRIPTION("Mediatek SoC DRM driver");
629 MODULE_LICENSE("GPL v2");
630