1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2015 MediaTek Inc. 4 * Author: YT SHEN <yt.shen@mediatek.com> 5 */ 6 7 #include <linux/component.h> 8 #include <linux/iommu.h> 9 #include <linux/module.h> 10 #include <linux/of_address.h> 11 #include <linux/of_platform.h> 12 #include <linux/pm_runtime.h> 13 #include <linux/soc/mediatek/mtk-mmsys.h> 14 #include <linux/dma-mapping.h> 15 16 #include <drm/drm_atomic.h> 17 #include <drm/drm_atomic_helper.h> 18 #include <drm/drm_drv.h> 19 #include <drm/drm_fb_helper.h> 20 #include <drm/drm_fourcc.h> 21 #include <drm/drm_gem.h> 22 #include <drm/drm_gem_cma_helper.h> 23 #include <drm/drm_gem_framebuffer_helper.h> 24 #include <drm/drm_of.h> 25 #include <drm/drm_probe_helper.h> 26 #include <drm/drm_vblank.h> 27 28 #include "mtk_drm_crtc.h" 29 #include "mtk_drm_ddp.h" 30 #include "mtk_drm_ddp.h" 31 #include "mtk_drm_ddp_comp.h" 32 #include "mtk_drm_drv.h" 33 #include "mtk_drm_gem.h" 34 35 #define DRIVER_NAME "mediatek" 36 #define DRIVER_DESC "Mediatek SoC DRM" 37 #define DRIVER_DATE "20150513" 38 #define DRIVER_MAJOR 1 39 #define DRIVER_MINOR 0 40 41 static const struct drm_mode_config_helper_funcs mtk_drm_mode_config_helpers = { 42 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm, 43 }; 44 45 static struct drm_framebuffer * 46 mtk_drm_mode_fb_create(struct drm_device *dev, 47 struct drm_file *file, 48 const struct drm_mode_fb_cmd2 *cmd) 49 { 50 const struct drm_format_info *info = drm_get_format_info(dev, cmd); 51 52 if (info->num_planes != 1) 53 return ERR_PTR(-EINVAL); 54 55 return drm_gem_fb_create(dev, file, cmd); 56 } 57 58 static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = { 59 .fb_create = mtk_drm_mode_fb_create, 60 .atomic_check = drm_atomic_helper_check, 61 .atomic_commit = drm_atomic_helper_commit, 62 }; 63 64 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = { 65 DDP_COMPONENT_OVL0, 66 DDP_COMPONENT_RDMA0, 67 DDP_COMPONENT_COLOR0, 68 DDP_COMPONENT_BLS, 69 DDP_COMPONENT_DSI0, 70 }; 71 72 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = { 73 DDP_COMPONENT_RDMA1, 74 DDP_COMPONENT_DPI0, 75 }; 76 77 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = { 78 DDP_COMPONENT_OVL0, 79 DDP_COMPONENT_COLOR0, 80 DDP_COMPONENT_AAL0, 81 DDP_COMPONENT_OD0, 82 DDP_COMPONENT_RDMA0, 83 DDP_COMPONENT_DPI0, 84 DDP_COMPONENT_PWM0, 85 }; 86 87 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = { 88 DDP_COMPONENT_OVL1, 89 DDP_COMPONENT_COLOR1, 90 DDP_COMPONENT_AAL1, 91 DDP_COMPONENT_OD1, 92 DDP_COMPONENT_RDMA1, 93 DDP_COMPONENT_DPI1, 94 DDP_COMPONENT_PWM1, 95 }; 96 97 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_third[] = { 98 DDP_COMPONENT_RDMA2, 99 DDP_COMPONENT_DSI3, 100 DDP_COMPONENT_PWM2, 101 }; 102 103 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = { 104 DDP_COMPONENT_OVL0, 105 DDP_COMPONENT_COLOR0, 106 DDP_COMPONENT_AAL0, 107 DDP_COMPONENT_OD0, 108 DDP_COMPONENT_RDMA0, 109 DDP_COMPONENT_UFOE, 110 DDP_COMPONENT_DSI0, 111 DDP_COMPONENT_PWM0, 112 }; 113 114 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = { 115 DDP_COMPONENT_OVL1, 116 DDP_COMPONENT_COLOR1, 117 DDP_COMPONENT_GAMMA, 118 DDP_COMPONENT_RDMA1, 119 DDP_COMPONENT_DPI0, 120 }; 121 122 static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { 123 .main_path = mt2701_mtk_ddp_main, 124 .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main), 125 .ext_path = mt2701_mtk_ddp_ext, 126 .ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext), 127 .shadow_register = true, 128 }; 129 130 static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = { 131 .main_path = mt2712_mtk_ddp_main, 132 .main_len = ARRAY_SIZE(mt2712_mtk_ddp_main), 133 .ext_path = mt2712_mtk_ddp_ext, 134 .ext_len = ARRAY_SIZE(mt2712_mtk_ddp_ext), 135 .third_path = mt2712_mtk_ddp_third, 136 .third_len = ARRAY_SIZE(mt2712_mtk_ddp_third), 137 }; 138 139 static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = { 140 .main_path = mt8173_mtk_ddp_main, 141 .main_len = ARRAY_SIZE(mt8173_mtk_ddp_main), 142 .ext_path = mt8173_mtk_ddp_ext, 143 .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext), 144 }; 145 146 static int mtk_drm_kms_init(struct drm_device *drm) 147 { 148 struct mtk_drm_private *private = drm->dev_private; 149 struct platform_device *pdev; 150 struct device_node *np; 151 struct device *dma_dev; 152 int ret; 153 154 if (!iommu_present(&platform_bus_type)) 155 return -EPROBE_DEFER; 156 157 pdev = of_find_device_by_node(private->mutex_node); 158 if (!pdev) { 159 dev_err(drm->dev, "Waiting for disp-mutex device %pOF\n", 160 private->mutex_node); 161 of_node_put(private->mutex_node); 162 return -EPROBE_DEFER; 163 } 164 private->mutex_dev = &pdev->dev; 165 166 ret = drmm_mode_config_init(drm); 167 if (ret) 168 return ret; 169 170 drm->mode_config.min_width = 64; 171 drm->mode_config.min_height = 64; 172 173 /* 174 * set max width and height as default value(4096x4096). 175 * this value would be used to check framebuffer size limitation 176 * at drm_mode_addfb(). 177 */ 178 drm->mode_config.max_width = 4096; 179 drm->mode_config.max_height = 4096; 180 drm->mode_config.funcs = &mtk_drm_mode_config_funcs; 181 drm->mode_config.helper_private = &mtk_drm_mode_config_helpers; 182 183 ret = component_bind_all(drm->dev, drm); 184 if (ret) 185 return ret; 186 187 /* 188 * We currently support two fixed data streams, each optional, 189 * and each statically assigned to a crtc: 190 * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ... 191 */ 192 ret = mtk_drm_crtc_create(drm, private->data->main_path, 193 private->data->main_len); 194 if (ret < 0) 195 goto err_component_unbind; 196 /* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */ 197 ret = mtk_drm_crtc_create(drm, private->data->ext_path, 198 private->data->ext_len); 199 if (ret < 0) 200 goto err_component_unbind; 201 202 ret = mtk_drm_crtc_create(drm, private->data->third_path, 203 private->data->third_len); 204 if (ret < 0) 205 goto err_component_unbind; 206 207 /* Use OVL device for all DMA memory allocations */ 208 np = private->comp_node[private->data->main_path[0]] ?: 209 private->comp_node[private->data->ext_path[0]]; 210 pdev = of_find_device_by_node(np); 211 if (!pdev) { 212 ret = -ENODEV; 213 dev_err(drm->dev, "Need at least one OVL device\n"); 214 goto err_component_unbind; 215 } 216 217 dma_dev = &pdev->dev; 218 private->dma_dev = dma_dev; 219 220 /* 221 * Configure the DMA segment size to make sure we get contiguous IOVA 222 * when importing PRIME buffers. 223 */ 224 if (!dma_dev->dma_parms) { 225 private->dma_parms_allocated = true; 226 dma_dev->dma_parms = 227 devm_kzalloc(drm->dev, sizeof(*dma_dev->dma_parms), 228 GFP_KERNEL); 229 } 230 if (!dma_dev->dma_parms) { 231 ret = -ENOMEM; 232 goto err_component_unbind; 233 } 234 235 ret = dma_set_max_seg_size(dma_dev, (unsigned int)DMA_BIT_MASK(32)); 236 if (ret) { 237 dev_err(dma_dev, "Failed to set DMA segment size\n"); 238 goto err_unset_dma_parms; 239 } 240 241 /* 242 * We don't use the drm_irq_install() helpers provided by the DRM 243 * core, so we need to set this manually in order to allow the 244 * DRM_IOCTL_WAIT_VBLANK to operate correctly. 245 */ 246 drm->irq_enabled = true; 247 ret = drm_vblank_init(drm, MAX_CRTC); 248 if (ret < 0) 249 goto err_unset_dma_parms; 250 251 drm_kms_helper_poll_init(drm); 252 drm_mode_config_reset(drm); 253 254 return 0; 255 256 err_unset_dma_parms: 257 if (private->dma_parms_allocated) 258 dma_dev->dma_parms = NULL; 259 err_component_unbind: 260 component_unbind_all(drm->dev, drm); 261 262 return ret; 263 } 264 265 static void mtk_drm_kms_deinit(struct drm_device *drm) 266 { 267 struct mtk_drm_private *private = drm->dev_private; 268 269 drm_kms_helper_poll_fini(drm); 270 drm_atomic_helper_shutdown(drm); 271 272 if (private->dma_parms_allocated) 273 private->dma_dev->dma_parms = NULL; 274 275 component_unbind_all(drm->dev, drm); 276 } 277 278 static const struct file_operations mtk_drm_fops = { 279 .owner = THIS_MODULE, 280 .open = drm_open, 281 .release = drm_release, 282 .unlocked_ioctl = drm_ioctl, 283 .mmap = mtk_drm_gem_mmap, 284 .poll = drm_poll, 285 .read = drm_read, 286 .compat_ioctl = drm_compat_ioctl, 287 }; 288 289 /* 290 * We need to override this because the device used to import the memory is 291 * not dev->dev, as drm_gem_prime_import() expects. 292 */ 293 struct drm_gem_object *mtk_drm_gem_prime_import(struct drm_device *dev, 294 struct dma_buf *dma_buf) 295 { 296 struct mtk_drm_private *private = dev->dev_private; 297 298 return drm_gem_prime_import_dev(dev, dma_buf, private->dma_dev); 299 } 300 301 static struct drm_driver mtk_drm_driver = { 302 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC, 303 304 .dumb_create = mtk_drm_gem_dumb_create, 305 306 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 307 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 308 .gem_prime_import = mtk_drm_gem_prime_import, 309 .gem_prime_import_sg_table = mtk_gem_prime_import_sg_table, 310 .gem_prime_mmap = mtk_drm_gem_mmap_buf, 311 .fops = &mtk_drm_fops, 312 313 .name = DRIVER_NAME, 314 .desc = DRIVER_DESC, 315 .date = DRIVER_DATE, 316 .major = DRIVER_MAJOR, 317 .minor = DRIVER_MINOR, 318 }; 319 320 static int compare_of(struct device *dev, void *data) 321 { 322 return dev->of_node == data; 323 } 324 325 static int mtk_drm_bind(struct device *dev) 326 { 327 struct mtk_drm_private *private = dev_get_drvdata(dev); 328 struct drm_device *drm; 329 int ret; 330 331 drm = drm_dev_alloc(&mtk_drm_driver, dev); 332 if (IS_ERR(drm)) 333 return PTR_ERR(drm); 334 335 drm->dev_private = private; 336 private->drm = drm; 337 338 ret = mtk_drm_kms_init(drm); 339 if (ret < 0) 340 goto err_free; 341 342 ret = drm_dev_register(drm, 0); 343 if (ret < 0) 344 goto err_deinit; 345 346 drm_fbdev_generic_setup(drm, 32); 347 348 return 0; 349 350 err_deinit: 351 mtk_drm_kms_deinit(drm); 352 err_free: 353 drm_dev_put(drm); 354 return ret; 355 } 356 357 static void mtk_drm_unbind(struct device *dev) 358 { 359 struct mtk_drm_private *private = dev_get_drvdata(dev); 360 361 drm_dev_unregister(private->drm); 362 mtk_drm_kms_deinit(private->drm); 363 drm_dev_put(private->drm); 364 private->num_pipes = 0; 365 private->drm = NULL; 366 } 367 368 static const struct component_master_ops mtk_drm_ops = { 369 .bind = mtk_drm_bind, 370 .unbind = mtk_drm_unbind, 371 }; 372 373 static const struct of_device_id mtk_ddp_comp_dt_ids[] = { 374 { .compatible = "mediatek,mt2701-disp-ovl", 375 .data = (void *)MTK_DISP_OVL }, 376 { .compatible = "mediatek,mt8173-disp-ovl", 377 .data = (void *)MTK_DISP_OVL }, 378 { .compatible = "mediatek,mt2701-disp-rdma", 379 .data = (void *)MTK_DISP_RDMA }, 380 { .compatible = "mediatek,mt8173-disp-rdma", 381 .data = (void *)MTK_DISP_RDMA }, 382 { .compatible = "mediatek,mt8173-disp-wdma", 383 .data = (void *)MTK_DISP_WDMA }, 384 { .compatible = "mediatek,mt2701-disp-color", 385 .data = (void *)MTK_DISP_COLOR }, 386 { .compatible = "mediatek,mt8173-disp-color", 387 .data = (void *)MTK_DISP_COLOR }, 388 { .compatible = "mediatek,mt8173-disp-aal", 389 .data = (void *)MTK_DISP_AAL}, 390 { .compatible = "mediatek,mt8173-disp-gamma", 391 .data = (void *)MTK_DISP_GAMMA, }, 392 { .compatible = "mediatek,mt8173-disp-ufoe", 393 .data = (void *)MTK_DISP_UFOE }, 394 { .compatible = "mediatek,mt2701-dsi", 395 .data = (void *)MTK_DSI }, 396 { .compatible = "mediatek,mt8173-dsi", 397 .data = (void *)MTK_DSI }, 398 { .compatible = "mediatek,mt2701-dpi", 399 .data = (void *)MTK_DPI }, 400 { .compatible = "mediatek,mt8173-dpi", 401 .data = (void *)MTK_DPI }, 402 { .compatible = "mediatek,mt2701-disp-mutex", 403 .data = (void *)MTK_DISP_MUTEX }, 404 { .compatible = "mediatek,mt2712-disp-mutex", 405 .data = (void *)MTK_DISP_MUTEX }, 406 { .compatible = "mediatek,mt8173-disp-mutex", 407 .data = (void *)MTK_DISP_MUTEX }, 408 { .compatible = "mediatek,mt2701-disp-pwm", 409 .data = (void *)MTK_DISP_BLS }, 410 { .compatible = "mediatek,mt8173-disp-pwm", 411 .data = (void *)MTK_DISP_PWM }, 412 { .compatible = "mediatek,mt8173-disp-od", 413 .data = (void *)MTK_DISP_OD }, 414 { } 415 }; 416 417 static const struct of_device_id mtk_drm_of_ids[] = { 418 { .compatible = "mediatek,mt2701-mmsys", 419 .data = &mt2701_mmsys_driver_data}, 420 { .compatible = "mediatek,mt2712-mmsys", 421 .data = &mt2712_mmsys_driver_data}, 422 { .compatible = "mediatek,mt8173-mmsys", 423 .data = &mt8173_mmsys_driver_data}, 424 { } 425 }; 426 427 static int mtk_drm_probe(struct platform_device *pdev) 428 { 429 struct device *dev = &pdev->dev; 430 struct device_node *phandle = dev->parent->of_node; 431 const struct of_device_id *of_id; 432 struct mtk_drm_private *private; 433 struct device_node *node; 434 struct component_match *match = NULL; 435 int ret; 436 int i; 437 438 private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL); 439 if (!private) 440 return -ENOMEM; 441 442 private->mmsys_dev = dev->parent; 443 if (!private->mmsys_dev) { 444 dev_err(dev, "Failed to get MMSYS device\n"); 445 return -ENODEV; 446 } 447 448 of_id = of_match_node(mtk_drm_of_ids, phandle); 449 if (!of_id) 450 return -ENODEV; 451 452 private->data = of_id->data; 453 454 /* Iterate over sibling DISP function blocks */ 455 for_each_child_of_node(phandle->parent, node) { 456 const struct of_device_id *of_id; 457 enum mtk_ddp_comp_type comp_type; 458 int comp_id; 459 460 of_id = of_match_node(mtk_ddp_comp_dt_ids, node); 461 if (!of_id) 462 continue; 463 464 if (!of_device_is_available(node)) { 465 dev_dbg(dev, "Skipping disabled component %pOF\n", 466 node); 467 continue; 468 } 469 470 comp_type = (enum mtk_ddp_comp_type)of_id->data; 471 472 if (comp_type == MTK_DISP_MUTEX) { 473 private->mutex_node = of_node_get(node); 474 continue; 475 } 476 477 comp_id = mtk_ddp_comp_get_id(node, comp_type); 478 if (comp_id < 0) { 479 dev_warn(dev, "Skipping unknown component %pOF\n", 480 node); 481 continue; 482 } 483 484 private->comp_node[comp_id] = of_node_get(node); 485 486 /* 487 * Currently only the COLOR, OVL, RDMA, DSI, and DPI blocks have 488 * separate component platform drivers and initialize their own 489 * DDP component structure. The others are initialized here. 490 */ 491 if (comp_type == MTK_DISP_COLOR || 492 comp_type == MTK_DISP_OVL || 493 comp_type == MTK_DISP_OVL_2L || 494 comp_type == MTK_DISP_RDMA || 495 comp_type == MTK_DSI || 496 comp_type == MTK_DPI) { 497 dev_info(dev, "Adding component match for %pOF\n", 498 node); 499 drm_of_component_match_add(dev, &match, compare_of, 500 node); 501 } else { 502 struct mtk_ddp_comp *comp; 503 504 comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL); 505 if (!comp) { 506 ret = -ENOMEM; 507 of_node_put(node); 508 goto err_node; 509 } 510 511 ret = mtk_ddp_comp_init(dev->parent, node, comp, 512 comp_id, NULL); 513 if (ret) { 514 of_node_put(node); 515 goto err_node; 516 } 517 518 private->ddp_comp[comp_id] = comp; 519 } 520 } 521 522 if (!private->mutex_node) { 523 dev_err(dev, "Failed to find disp-mutex node\n"); 524 ret = -ENODEV; 525 goto err_node; 526 } 527 528 pm_runtime_enable(dev); 529 530 platform_set_drvdata(pdev, private); 531 532 ret = component_master_add_with_match(dev, &mtk_drm_ops, match); 533 if (ret) 534 goto err_pm; 535 536 return 0; 537 538 err_pm: 539 pm_runtime_disable(dev); 540 err_node: 541 of_node_put(private->mutex_node); 542 for (i = 0; i < DDP_COMPONENT_ID_MAX; i++) 543 of_node_put(private->comp_node[i]); 544 return ret; 545 } 546 547 static int mtk_drm_remove(struct platform_device *pdev) 548 { 549 struct mtk_drm_private *private = platform_get_drvdata(pdev); 550 int i; 551 552 component_master_del(&pdev->dev, &mtk_drm_ops); 553 pm_runtime_disable(&pdev->dev); 554 of_node_put(private->mutex_node); 555 for (i = 0; i < DDP_COMPONENT_ID_MAX; i++) 556 of_node_put(private->comp_node[i]); 557 558 return 0; 559 } 560 561 #ifdef CONFIG_PM_SLEEP 562 static int mtk_drm_sys_suspend(struct device *dev) 563 { 564 struct mtk_drm_private *private = dev_get_drvdata(dev); 565 struct drm_device *drm = private->drm; 566 int ret; 567 568 ret = drm_mode_config_helper_suspend(drm); 569 570 return ret; 571 } 572 573 static int mtk_drm_sys_resume(struct device *dev) 574 { 575 struct mtk_drm_private *private = dev_get_drvdata(dev); 576 struct drm_device *drm = private->drm; 577 int ret; 578 579 ret = drm_mode_config_helper_resume(drm); 580 581 return ret; 582 } 583 #endif 584 585 static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend, 586 mtk_drm_sys_resume); 587 588 static struct platform_driver mtk_drm_platform_driver = { 589 .probe = mtk_drm_probe, 590 .remove = mtk_drm_remove, 591 .driver = { 592 .name = "mediatek-drm", 593 .pm = &mtk_drm_pm_ops, 594 }, 595 }; 596 597 static struct platform_driver * const mtk_drm_drivers[] = { 598 &mtk_ddp_driver, 599 &mtk_disp_color_driver, 600 &mtk_disp_ovl_driver, 601 &mtk_disp_rdma_driver, 602 &mtk_dpi_driver, 603 &mtk_drm_platform_driver, 604 &mtk_mipi_tx_driver, 605 &mtk_dsi_driver, 606 }; 607 608 static int __init mtk_drm_init(void) 609 { 610 return platform_register_drivers(mtk_drm_drivers, 611 ARRAY_SIZE(mtk_drm_drivers)); 612 } 613 614 static void __exit mtk_drm_exit(void) 615 { 616 platform_unregister_drivers(mtk_drm_drivers, 617 ARRAY_SIZE(mtk_drm_drivers)); 618 } 619 620 module_init(mtk_drm_init); 621 module_exit(mtk_drm_exit); 622 623 MODULE_AUTHOR("YT SHEN <yt.shen@mediatek.com>"); 624 MODULE_DESCRIPTION("Mediatek SoC DRM driver"); 625 MODULE_LICENSE("GPL v2"); 626