1 /* 2 * Copyright (c) 2015 MediaTek Inc. 3 * Author: YT SHEN <yt.shen@mediatek.com> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 */ 14 15 #include <drm/drmP.h> 16 #include <drm/drm_atomic.h> 17 #include <drm/drm_atomic_helper.h> 18 #include <drm/drm_crtc_helper.h> 19 #include <drm/drm_gem.h> 20 #include <drm/drm_gem_cma_helper.h> 21 #include <drm/drm_of.h> 22 #include <linux/component.h> 23 #include <linux/iommu.h> 24 #include <linux/of_address.h> 25 #include <linux/of_platform.h> 26 #include <linux/pm_runtime.h> 27 28 #include "mtk_drm_crtc.h" 29 #include "mtk_drm_ddp.h" 30 #include "mtk_drm_ddp_comp.h" 31 #include "mtk_drm_drv.h" 32 #include "mtk_drm_fb.h" 33 #include "mtk_drm_gem.h" 34 35 #define DRIVER_NAME "mediatek" 36 #define DRIVER_DESC "Mediatek SoC DRM" 37 #define DRIVER_DATE "20150513" 38 #define DRIVER_MAJOR 1 39 #define DRIVER_MINOR 0 40 41 static void mtk_atomic_schedule(struct mtk_drm_private *private, 42 struct drm_atomic_state *state) 43 { 44 private->commit.state = state; 45 schedule_work(&private->commit.work); 46 } 47 48 static void mtk_atomic_wait_for_fences(struct drm_atomic_state *state) 49 { 50 struct drm_plane *plane; 51 struct drm_plane_state *new_plane_state; 52 int i; 53 54 for_each_new_plane_in_state(state, plane, new_plane_state, i) 55 mtk_fb_wait(new_plane_state->fb); 56 } 57 58 static void mtk_atomic_complete(struct mtk_drm_private *private, 59 struct drm_atomic_state *state) 60 { 61 struct drm_device *drm = private->drm; 62 63 mtk_atomic_wait_for_fences(state); 64 65 /* 66 * Mediatek drm supports runtime PM, so plane registers cannot be 67 * written when their crtc is disabled. 68 * 69 * The comment for drm_atomic_helper_commit states: 70 * For drivers supporting runtime PM the recommended sequence is 71 * 72 * drm_atomic_helper_commit_modeset_disables(dev, state); 73 * drm_atomic_helper_commit_modeset_enables(dev, state); 74 * drm_atomic_helper_commit_planes(dev, state, 75 * DRM_PLANE_COMMIT_ACTIVE_ONLY); 76 * 77 * See the kerneldoc entries for these three functions for more details. 78 */ 79 drm_atomic_helper_commit_modeset_disables(drm, state); 80 drm_atomic_helper_commit_modeset_enables(drm, state); 81 drm_atomic_helper_commit_planes(drm, state, 82 DRM_PLANE_COMMIT_ACTIVE_ONLY); 83 84 drm_atomic_helper_wait_for_vblanks(drm, state); 85 86 drm_atomic_helper_cleanup_planes(drm, state); 87 drm_atomic_state_put(state); 88 } 89 90 static void mtk_atomic_work(struct work_struct *work) 91 { 92 struct mtk_drm_private *private = container_of(work, 93 struct mtk_drm_private, commit.work); 94 95 mtk_atomic_complete(private, private->commit.state); 96 } 97 98 static int mtk_atomic_commit(struct drm_device *drm, 99 struct drm_atomic_state *state, 100 bool async) 101 { 102 struct mtk_drm_private *private = drm->dev_private; 103 int ret; 104 105 ret = drm_atomic_helper_prepare_planes(drm, state); 106 if (ret) 107 return ret; 108 109 mutex_lock(&private->commit.lock); 110 flush_work(&private->commit.work); 111 112 ret = drm_atomic_helper_swap_state(state, true); 113 if (ret) { 114 mutex_unlock(&private->commit.lock); 115 drm_atomic_helper_cleanup_planes(drm, state); 116 return ret; 117 } 118 119 drm_atomic_state_get(state); 120 if (async) 121 mtk_atomic_schedule(private, state); 122 else 123 mtk_atomic_complete(private, state); 124 125 mutex_unlock(&private->commit.lock); 126 127 return 0; 128 } 129 130 static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = { 131 .fb_create = mtk_drm_mode_fb_create, 132 .atomic_check = drm_atomic_helper_check, 133 .atomic_commit = mtk_atomic_commit, 134 }; 135 136 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = { 137 DDP_COMPONENT_OVL0, 138 DDP_COMPONENT_RDMA0, 139 DDP_COMPONENT_COLOR0, 140 DDP_COMPONENT_BLS, 141 DDP_COMPONENT_DSI0, 142 }; 143 144 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = { 145 DDP_COMPONENT_RDMA1, 146 DDP_COMPONENT_DPI0, 147 }; 148 149 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = { 150 DDP_COMPONENT_OVL0, 151 DDP_COMPONENT_COLOR0, 152 DDP_COMPONENT_AAL, 153 DDP_COMPONENT_OD, 154 DDP_COMPONENT_RDMA0, 155 DDP_COMPONENT_UFOE, 156 DDP_COMPONENT_DSI0, 157 DDP_COMPONENT_PWM0, 158 }; 159 160 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = { 161 DDP_COMPONENT_OVL1, 162 DDP_COMPONENT_COLOR1, 163 DDP_COMPONENT_GAMMA, 164 DDP_COMPONENT_RDMA1, 165 DDP_COMPONENT_DPI0, 166 }; 167 168 static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { 169 .main_path = mt2701_mtk_ddp_main, 170 .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main), 171 .ext_path = mt2701_mtk_ddp_ext, 172 .ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext), 173 .shadow_register = true, 174 }; 175 176 static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = { 177 .main_path = mt8173_mtk_ddp_main, 178 .main_len = ARRAY_SIZE(mt8173_mtk_ddp_main), 179 .ext_path = mt8173_mtk_ddp_ext, 180 .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext), 181 }; 182 183 static int mtk_drm_kms_init(struct drm_device *drm) 184 { 185 struct mtk_drm_private *private = drm->dev_private; 186 struct platform_device *pdev; 187 struct device_node *np; 188 int ret; 189 190 if (!iommu_present(&platform_bus_type)) 191 return -EPROBE_DEFER; 192 193 pdev = of_find_device_by_node(private->mutex_node); 194 if (!pdev) { 195 dev_err(drm->dev, "Waiting for disp-mutex device %pOF\n", 196 private->mutex_node); 197 of_node_put(private->mutex_node); 198 return -EPROBE_DEFER; 199 } 200 private->mutex_dev = &pdev->dev; 201 202 drm_mode_config_init(drm); 203 204 drm->mode_config.min_width = 64; 205 drm->mode_config.min_height = 64; 206 207 /* 208 * set max width and height as default value(4096x4096). 209 * this value would be used to check framebuffer size limitation 210 * at drm_mode_addfb(). 211 */ 212 drm->mode_config.max_width = 4096; 213 drm->mode_config.max_height = 4096; 214 drm->mode_config.funcs = &mtk_drm_mode_config_funcs; 215 216 ret = component_bind_all(drm->dev, drm); 217 if (ret) 218 goto err_config_cleanup; 219 220 /* 221 * We currently support two fixed data streams, each optional, 222 * and each statically assigned to a crtc: 223 * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ... 224 */ 225 ret = mtk_drm_crtc_create(drm, private->data->main_path, 226 private->data->main_len); 227 if (ret < 0) 228 goto err_component_unbind; 229 /* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */ 230 ret = mtk_drm_crtc_create(drm, private->data->ext_path, 231 private->data->ext_len); 232 if (ret < 0) 233 goto err_component_unbind; 234 235 /* Use OVL device for all DMA memory allocations */ 236 np = private->comp_node[private->data->main_path[0]] ?: 237 private->comp_node[private->data->ext_path[0]]; 238 pdev = of_find_device_by_node(np); 239 if (!pdev) { 240 ret = -ENODEV; 241 dev_err(drm->dev, "Need at least one OVL device\n"); 242 goto err_component_unbind; 243 } 244 245 private->dma_dev = &pdev->dev; 246 247 /* 248 * We don't use the drm_irq_install() helpers provided by the DRM 249 * core, so we need to set this manually in order to allow the 250 * DRM_IOCTL_WAIT_VBLANK to operate correctly. 251 */ 252 drm->irq_enabled = true; 253 ret = drm_vblank_init(drm, MAX_CRTC); 254 if (ret < 0) 255 goto err_component_unbind; 256 257 drm_kms_helper_poll_init(drm); 258 drm_mode_config_reset(drm); 259 260 return 0; 261 262 err_component_unbind: 263 component_unbind_all(drm->dev, drm); 264 err_config_cleanup: 265 drm_mode_config_cleanup(drm); 266 267 return ret; 268 } 269 270 static void mtk_drm_kms_deinit(struct drm_device *drm) 271 { 272 drm_kms_helper_poll_fini(drm); 273 274 component_unbind_all(drm->dev, drm); 275 drm_mode_config_cleanup(drm); 276 } 277 278 static const struct file_operations mtk_drm_fops = { 279 .owner = THIS_MODULE, 280 .open = drm_open, 281 .release = drm_release, 282 .unlocked_ioctl = drm_ioctl, 283 .mmap = mtk_drm_gem_mmap, 284 .poll = drm_poll, 285 .read = drm_read, 286 .compat_ioctl = drm_compat_ioctl, 287 }; 288 289 static struct drm_driver mtk_drm_driver = { 290 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME | 291 DRIVER_ATOMIC, 292 293 .gem_free_object_unlocked = mtk_drm_gem_free_object, 294 .gem_vm_ops = &drm_gem_cma_vm_ops, 295 .dumb_create = mtk_drm_gem_dumb_create, 296 297 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 298 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 299 .gem_prime_export = drm_gem_prime_export, 300 .gem_prime_import = drm_gem_prime_import, 301 .gem_prime_get_sg_table = mtk_gem_prime_get_sg_table, 302 .gem_prime_import_sg_table = mtk_gem_prime_import_sg_table, 303 .gem_prime_mmap = mtk_drm_gem_mmap_buf, 304 .fops = &mtk_drm_fops, 305 306 .name = DRIVER_NAME, 307 .desc = DRIVER_DESC, 308 .date = DRIVER_DATE, 309 .major = DRIVER_MAJOR, 310 .minor = DRIVER_MINOR, 311 }; 312 313 static int compare_of(struct device *dev, void *data) 314 { 315 return dev->of_node == data; 316 } 317 318 static int mtk_drm_bind(struct device *dev) 319 { 320 struct mtk_drm_private *private = dev_get_drvdata(dev); 321 struct drm_device *drm; 322 int ret; 323 324 drm = drm_dev_alloc(&mtk_drm_driver, dev); 325 if (IS_ERR(drm)) 326 return PTR_ERR(drm); 327 328 drm->dev_private = private; 329 private->drm = drm; 330 331 ret = mtk_drm_kms_init(drm); 332 if (ret < 0) 333 goto err_free; 334 335 ret = drm_dev_register(drm, 0); 336 if (ret < 0) 337 goto err_deinit; 338 339 return 0; 340 341 err_deinit: 342 mtk_drm_kms_deinit(drm); 343 err_free: 344 drm_dev_unref(drm); 345 return ret; 346 } 347 348 static void mtk_drm_unbind(struct device *dev) 349 { 350 struct mtk_drm_private *private = dev_get_drvdata(dev); 351 352 drm_dev_unregister(private->drm); 353 drm_dev_unref(private->drm); 354 private->drm = NULL; 355 } 356 357 static const struct component_master_ops mtk_drm_ops = { 358 .bind = mtk_drm_bind, 359 .unbind = mtk_drm_unbind, 360 }; 361 362 static const struct of_device_id mtk_ddp_comp_dt_ids[] = { 363 { .compatible = "mediatek,mt2701-disp-ovl", .data = (void *)MTK_DISP_OVL }, 364 { .compatible = "mediatek,mt8173-disp-ovl", .data = (void *)MTK_DISP_OVL }, 365 { .compatible = "mediatek,mt2701-disp-rdma", .data = (void *)MTK_DISP_RDMA }, 366 { .compatible = "mediatek,mt8173-disp-rdma", .data = (void *)MTK_DISP_RDMA }, 367 { .compatible = "mediatek,mt8173-disp-wdma", .data = (void *)MTK_DISP_WDMA }, 368 { .compatible = "mediatek,mt2701-disp-color", .data = (void *)MTK_DISP_COLOR }, 369 { .compatible = "mediatek,mt8173-disp-color", .data = (void *)MTK_DISP_COLOR }, 370 { .compatible = "mediatek,mt8173-disp-aal", .data = (void *)MTK_DISP_AAL}, 371 { .compatible = "mediatek,mt8173-disp-gamma", .data = (void *)MTK_DISP_GAMMA, }, 372 { .compatible = "mediatek,mt8173-disp-ufoe", .data = (void *)MTK_DISP_UFOE }, 373 { .compatible = "mediatek,mt2701-dsi", .data = (void *)MTK_DSI }, 374 { .compatible = "mediatek,mt8173-dsi", .data = (void *)MTK_DSI }, 375 { .compatible = "mediatek,mt8173-dpi", .data = (void *)MTK_DPI }, 376 { .compatible = "mediatek,mt2701-disp-mutex", .data = (void *)MTK_DISP_MUTEX }, 377 { .compatible = "mediatek,mt8173-disp-mutex", .data = (void *)MTK_DISP_MUTEX }, 378 { .compatible = "mediatek,mt2701-disp-pwm", .data = (void *)MTK_DISP_BLS }, 379 { .compatible = "mediatek,mt8173-disp-pwm", .data = (void *)MTK_DISP_PWM }, 380 { .compatible = "mediatek,mt8173-disp-od", .data = (void *)MTK_DISP_OD }, 381 { } 382 }; 383 384 static int mtk_drm_probe(struct platform_device *pdev) 385 { 386 struct device *dev = &pdev->dev; 387 struct mtk_drm_private *private; 388 struct resource *mem; 389 struct device_node *node; 390 struct component_match *match = NULL; 391 int ret; 392 int i; 393 394 private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL); 395 if (!private) 396 return -ENOMEM; 397 398 mutex_init(&private->commit.lock); 399 INIT_WORK(&private->commit.work, mtk_atomic_work); 400 private->data = of_device_get_match_data(dev); 401 402 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 403 private->config_regs = devm_ioremap_resource(dev, mem); 404 if (IS_ERR(private->config_regs)) { 405 ret = PTR_ERR(private->config_regs); 406 dev_err(dev, "Failed to ioremap mmsys-config resource: %d\n", 407 ret); 408 return ret; 409 } 410 411 /* Iterate over sibling DISP function blocks */ 412 for_each_child_of_node(dev->of_node->parent, node) { 413 const struct of_device_id *of_id; 414 enum mtk_ddp_comp_type comp_type; 415 int comp_id; 416 417 of_id = of_match_node(mtk_ddp_comp_dt_ids, node); 418 if (!of_id) 419 continue; 420 421 if (!of_device_is_available(node)) { 422 dev_dbg(dev, "Skipping disabled component %pOF\n", 423 node); 424 continue; 425 } 426 427 comp_type = (enum mtk_ddp_comp_type)of_id->data; 428 429 if (comp_type == MTK_DISP_MUTEX) { 430 private->mutex_node = of_node_get(node); 431 continue; 432 } 433 434 comp_id = mtk_ddp_comp_get_id(node, comp_type); 435 if (comp_id < 0) { 436 dev_warn(dev, "Skipping unknown component %pOF\n", 437 node); 438 continue; 439 } 440 441 private->comp_node[comp_id] = of_node_get(node); 442 443 /* 444 * Currently only the COLOR, OVL, RDMA, DSI, and DPI blocks have 445 * separate component platform drivers and initialize their own 446 * DDP component structure. The others are initialized here. 447 */ 448 if (comp_type == MTK_DISP_COLOR || 449 comp_type == MTK_DISP_OVL || 450 comp_type == MTK_DISP_RDMA || 451 comp_type == MTK_DSI || 452 comp_type == MTK_DPI) { 453 dev_info(dev, "Adding component match for %pOF\n", 454 node); 455 drm_of_component_match_add(dev, &match, compare_of, 456 node); 457 } else { 458 struct mtk_ddp_comp *comp; 459 460 comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL); 461 if (!comp) { 462 ret = -ENOMEM; 463 goto err_node; 464 } 465 466 ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL); 467 if (ret) 468 goto err_node; 469 470 private->ddp_comp[comp_id] = comp; 471 } 472 } 473 474 if (!private->mutex_node) { 475 dev_err(dev, "Failed to find disp-mutex node\n"); 476 ret = -ENODEV; 477 goto err_node; 478 } 479 480 pm_runtime_enable(dev); 481 482 platform_set_drvdata(pdev, private); 483 484 ret = component_master_add_with_match(dev, &mtk_drm_ops, match); 485 if (ret) 486 goto err_pm; 487 488 return 0; 489 490 err_pm: 491 pm_runtime_disable(dev); 492 err_node: 493 of_node_put(private->mutex_node); 494 for (i = 0; i < DDP_COMPONENT_ID_MAX; i++) 495 of_node_put(private->comp_node[i]); 496 return ret; 497 } 498 499 static int mtk_drm_remove(struct platform_device *pdev) 500 { 501 struct mtk_drm_private *private = platform_get_drvdata(pdev); 502 struct drm_device *drm = private->drm; 503 int i; 504 505 drm_dev_unregister(drm); 506 mtk_drm_kms_deinit(drm); 507 drm_dev_unref(drm); 508 509 component_master_del(&pdev->dev, &mtk_drm_ops); 510 pm_runtime_disable(&pdev->dev); 511 of_node_put(private->mutex_node); 512 for (i = 0; i < DDP_COMPONENT_ID_MAX; i++) 513 of_node_put(private->comp_node[i]); 514 515 return 0; 516 } 517 518 #ifdef CONFIG_PM_SLEEP 519 static int mtk_drm_sys_suspend(struct device *dev) 520 { 521 struct mtk_drm_private *private = dev_get_drvdata(dev); 522 struct drm_device *drm = private->drm; 523 524 drm_kms_helper_poll_disable(drm); 525 526 private->suspend_state = drm_atomic_helper_suspend(drm); 527 if (IS_ERR(private->suspend_state)) { 528 drm_kms_helper_poll_enable(drm); 529 return PTR_ERR(private->suspend_state); 530 } 531 532 DRM_DEBUG_DRIVER("mtk_drm_sys_suspend\n"); 533 return 0; 534 } 535 536 static int mtk_drm_sys_resume(struct device *dev) 537 { 538 struct mtk_drm_private *private = dev_get_drvdata(dev); 539 struct drm_device *drm = private->drm; 540 541 drm_atomic_helper_resume(drm, private->suspend_state); 542 drm_kms_helper_poll_enable(drm); 543 544 DRM_DEBUG_DRIVER("mtk_drm_sys_resume\n"); 545 return 0; 546 } 547 #endif 548 549 static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend, 550 mtk_drm_sys_resume); 551 552 static const struct of_device_id mtk_drm_of_ids[] = { 553 { .compatible = "mediatek,mt2701-mmsys", 554 .data = &mt2701_mmsys_driver_data}, 555 { .compatible = "mediatek,mt8173-mmsys", 556 .data = &mt8173_mmsys_driver_data}, 557 { } 558 }; 559 560 static struct platform_driver mtk_drm_platform_driver = { 561 .probe = mtk_drm_probe, 562 .remove = mtk_drm_remove, 563 .driver = { 564 .name = "mediatek-drm", 565 .of_match_table = mtk_drm_of_ids, 566 .pm = &mtk_drm_pm_ops, 567 }, 568 }; 569 570 static struct platform_driver * const mtk_drm_drivers[] = { 571 &mtk_ddp_driver, 572 &mtk_disp_color_driver, 573 &mtk_disp_ovl_driver, 574 &mtk_disp_rdma_driver, 575 &mtk_dpi_driver, 576 &mtk_drm_platform_driver, 577 &mtk_dsi_driver, 578 &mtk_mipi_tx_driver, 579 }; 580 581 static int __init mtk_drm_init(void) 582 { 583 return platform_register_drivers(mtk_drm_drivers, 584 ARRAY_SIZE(mtk_drm_drivers)); 585 } 586 587 static void __exit mtk_drm_exit(void) 588 { 589 platform_unregister_drivers(mtk_drm_drivers, 590 ARRAY_SIZE(mtk_drm_drivers)); 591 } 592 593 module_init(mtk_drm_init); 594 module_exit(mtk_drm_exit); 595 596 MODULE_AUTHOR("YT SHEN <yt.shen@mediatek.com>"); 597 MODULE_DESCRIPTION("Mediatek SoC DRM driver"); 598 MODULE_LICENSE("GPL v2"); 599