1 /* 2 * Copyright (c) 2015 MediaTek Inc. 3 * Author: YT SHEN <yt.shen@mediatek.com> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 */ 14 15 #include <drm/drmP.h> 16 #include <drm/drm_atomic.h> 17 #include <drm/drm_atomic_helper.h> 18 #include <drm/drm_crtc_helper.h> 19 #include <drm/drm_gem.h> 20 #include <drm/drm_gem_cma_helper.h> 21 #include <drm/drm_of.h> 22 #include <linux/component.h> 23 #include <linux/iommu.h> 24 #include <linux/of_address.h> 25 #include <linux/of_platform.h> 26 #include <linux/pm_runtime.h> 27 28 #include "mtk_drm_crtc.h" 29 #include "mtk_drm_ddp.h" 30 #include "mtk_drm_ddp_comp.h" 31 #include "mtk_drm_drv.h" 32 #include "mtk_drm_fb.h" 33 #include "mtk_drm_gem.h" 34 35 #define DRIVER_NAME "mediatek" 36 #define DRIVER_DESC "Mediatek SoC DRM" 37 #define DRIVER_DATE "20150513" 38 #define DRIVER_MAJOR 1 39 #define DRIVER_MINOR 0 40 41 static void mtk_atomic_schedule(struct mtk_drm_private *private, 42 struct drm_atomic_state *state) 43 { 44 private->commit.state = state; 45 schedule_work(&private->commit.work); 46 } 47 48 static void mtk_atomic_wait_for_fences(struct drm_atomic_state *state) 49 { 50 struct drm_plane *plane; 51 struct drm_plane_state *new_plane_state; 52 int i; 53 54 for_each_new_plane_in_state(state, plane, new_plane_state, i) 55 mtk_fb_wait(new_plane_state->fb); 56 } 57 58 static void mtk_atomic_complete(struct mtk_drm_private *private, 59 struct drm_atomic_state *state) 60 { 61 struct drm_device *drm = private->drm; 62 63 mtk_atomic_wait_for_fences(state); 64 65 /* 66 * Mediatek drm supports runtime PM, so plane registers cannot be 67 * written when their crtc is disabled. 68 * 69 * The comment for drm_atomic_helper_commit states: 70 * For drivers supporting runtime PM the recommended sequence is 71 * 72 * drm_atomic_helper_commit_modeset_disables(dev, state); 73 * drm_atomic_helper_commit_modeset_enables(dev, state); 74 * drm_atomic_helper_commit_planes(dev, state, 75 * DRM_PLANE_COMMIT_ACTIVE_ONLY); 76 * 77 * See the kerneldoc entries for these three functions for more details. 78 */ 79 drm_atomic_helper_commit_modeset_disables(drm, state); 80 drm_atomic_helper_commit_modeset_enables(drm, state); 81 drm_atomic_helper_commit_planes(drm, state, 82 DRM_PLANE_COMMIT_ACTIVE_ONLY); 83 84 drm_atomic_helper_wait_for_vblanks(drm, state); 85 86 drm_atomic_helper_cleanup_planes(drm, state); 87 drm_atomic_state_put(state); 88 } 89 90 static void mtk_atomic_work(struct work_struct *work) 91 { 92 struct mtk_drm_private *private = container_of(work, 93 struct mtk_drm_private, commit.work); 94 95 mtk_atomic_complete(private, private->commit.state); 96 } 97 98 static int mtk_atomic_commit(struct drm_device *drm, 99 struct drm_atomic_state *state, 100 bool async) 101 { 102 struct mtk_drm_private *private = drm->dev_private; 103 int ret; 104 105 ret = drm_atomic_helper_prepare_planes(drm, state); 106 if (ret) 107 return ret; 108 109 mutex_lock(&private->commit.lock); 110 flush_work(&private->commit.work); 111 112 ret = drm_atomic_helper_swap_state(state, true); 113 if (ret) { 114 mutex_unlock(&private->commit.lock); 115 drm_atomic_helper_cleanup_planes(drm, state); 116 return ret; 117 } 118 119 drm_atomic_state_get(state); 120 if (async) 121 mtk_atomic_schedule(private, state); 122 else 123 mtk_atomic_complete(private, state); 124 125 mutex_unlock(&private->commit.lock); 126 127 return 0; 128 } 129 130 static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = { 131 .fb_create = mtk_drm_mode_fb_create, 132 .atomic_check = drm_atomic_helper_check, 133 .atomic_commit = mtk_atomic_commit, 134 }; 135 136 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = { 137 DDP_COMPONENT_OVL0, 138 DDP_COMPONENT_RDMA0, 139 DDP_COMPONENT_COLOR0, 140 DDP_COMPONENT_BLS, 141 DDP_COMPONENT_DSI0, 142 }; 143 144 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = { 145 DDP_COMPONENT_RDMA1, 146 DDP_COMPONENT_DPI0, 147 }; 148 149 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = { 150 DDP_COMPONENT_OVL0, 151 DDP_COMPONENT_COLOR0, 152 DDP_COMPONENT_AAL0, 153 DDP_COMPONENT_OD0, 154 DDP_COMPONENT_RDMA0, 155 DDP_COMPONENT_DPI0, 156 DDP_COMPONENT_PWM0, 157 }; 158 159 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = { 160 DDP_COMPONENT_OVL1, 161 DDP_COMPONENT_COLOR1, 162 DDP_COMPONENT_AAL1, 163 DDP_COMPONENT_OD1, 164 DDP_COMPONENT_RDMA1, 165 DDP_COMPONENT_DPI1, 166 DDP_COMPONENT_PWM1, 167 }; 168 169 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_third[] = { 170 DDP_COMPONENT_RDMA2, 171 DDP_COMPONENT_DSI3, 172 DDP_COMPONENT_PWM2, 173 }; 174 175 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = { 176 DDP_COMPONENT_OVL0, 177 DDP_COMPONENT_COLOR0, 178 DDP_COMPONENT_AAL0, 179 DDP_COMPONENT_OD0, 180 DDP_COMPONENT_RDMA0, 181 DDP_COMPONENT_UFOE, 182 DDP_COMPONENT_DSI0, 183 DDP_COMPONENT_PWM0, 184 }; 185 186 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = { 187 DDP_COMPONENT_OVL1, 188 DDP_COMPONENT_COLOR1, 189 DDP_COMPONENT_GAMMA, 190 DDP_COMPONENT_RDMA1, 191 DDP_COMPONENT_DPI0, 192 }; 193 194 static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { 195 .main_path = mt2701_mtk_ddp_main, 196 .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main), 197 .ext_path = mt2701_mtk_ddp_ext, 198 .ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext), 199 .shadow_register = true, 200 }; 201 202 static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = { 203 .main_path = mt2712_mtk_ddp_main, 204 .main_len = ARRAY_SIZE(mt2712_mtk_ddp_main), 205 .ext_path = mt2712_mtk_ddp_ext, 206 .ext_len = ARRAY_SIZE(mt2712_mtk_ddp_ext), 207 .third_path = mt2712_mtk_ddp_third, 208 .third_len = ARRAY_SIZE(mt2712_mtk_ddp_third), 209 }; 210 211 static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = { 212 .main_path = mt8173_mtk_ddp_main, 213 .main_len = ARRAY_SIZE(mt8173_mtk_ddp_main), 214 .ext_path = mt8173_mtk_ddp_ext, 215 .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext), 216 }; 217 218 static int mtk_drm_kms_init(struct drm_device *drm) 219 { 220 struct mtk_drm_private *private = drm->dev_private; 221 struct platform_device *pdev; 222 struct device_node *np; 223 int ret; 224 225 if (!iommu_present(&platform_bus_type)) 226 return -EPROBE_DEFER; 227 228 pdev = of_find_device_by_node(private->mutex_node); 229 if (!pdev) { 230 dev_err(drm->dev, "Waiting for disp-mutex device %pOF\n", 231 private->mutex_node); 232 of_node_put(private->mutex_node); 233 return -EPROBE_DEFER; 234 } 235 private->mutex_dev = &pdev->dev; 236 237 drm_mode_config_init(drm); 238 239 drm->mode_config.min_width = 64; 240 drm->mode_config.min_height = 64; 241 242 /* 243 * set max width and height as default value(4096x4096). 244 * this value would be used to check framebuffer size limitation 245 * at drm_mode_addfb(). 246 */ 247 drm->mode_config.max_width = 4096; 248 drm->mode_config.max_height = 4096; 249 drm->mode_config.funcs = &mtk_drm_mode_config_funcs; 250 251 ret = component_bind_all(drm->dev, drm); 252 if (ret) 253 goto err_config_cleanup; 254 255 /* 256 * We currently support two fixed data streams, each optional, 257 * and each statically assigned to a crtc: 258 * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ... 259 */ 260 ret = mtk_drm_crtc_create(drm, private->data->main_path, 261 private->data->main_len); 262 if (ret < 0) 263 goto err_component_unbind; 264 /* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */ 265 ret = mtk_drm_crtc_create(drm, private->data->ext_path, 266 private->data->ext_len); 267 if (ret < 0) 268 goto err_component_unbind; 269 270 ret = mtk_drm_crtc_create(drm, private->data->third_path, 271 private->data->third_len); 272 if (ret < 0) 273 goto err_component_unbind; 274 275 /* Use OVL device for all DMA memory allocations */ 276 np = private->comp_node[private->data->main_path[0]] ?: 277 private->comp_node[private->data->ext_path[0]]; 278 pdev = of_find_device_by_node(np); 279 if (!pdev) { 280 ret = -ENODEV; 281 dev_err(drm->dev, "Need at least one OVL device\n"); 282 goto err_component_unbind; 283 } 284 285 private->dma_dev = &pdev->dev; 286 287 /* 288 * We don't use the drm_irq_install() helpers provided by the DRM 289 * core, so we need to set this manually in order to allow the 290 * DRM_IOCTL_WAIT_VBLANK to operate correctly. 291 */ 292 drm->irq_enabled = true; 293 ret = drm_vblank_init(drm, MAX_CRTC); 294 if (ret < 0) 295 goto err_component_unbind; 296 297 drm_kms_helper_poll_init(drm); 298 drm_mode_config_reset(drm); 299 300 return 0; 301 302 err_component_unbind: 303 component_unbind_all(drm->dev, drm); 304 err_config_cleanup: 305 drm_mode_config_cleanup(drm); 306 307 return ret; 308 } 309 310 static void mtk_drm_kms_deinit(struct drm_device *drm) 311 { 312 drm_kms_helper_poll_fini(drm); 313 314 component_unbind_all(drm->dev, drm); 315 drm_mode_config_cleanup(drm); 316 } 317 318 static const struct file_operations mtk_drm_fops = { 319 .owner = THIS_MODULE, 320 .open = drm_open, 321 .release = drm_release, 322 .unlocked_ioctl = drm_ioctl, 323 .mmap = mtk_drm_gem_mmap, 324 .poll = drm_poll, 325 .read = drm_read, 326 .compat_ioctl = drm_compat_ioctl, 327 }; 328 329 static struct drm_driver mtk_drm_driver = { 330 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME | 331 DRIVER_ATOMIC, 332 333 .gem_free_object_unlocked = mtk_drm_gem_free_object, 334 .gem_vm_ops = &drm_gem_cma_vm_ops, 335 .dumb_create = mtk_drm_gem_dumb_create, 336 337 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 338 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 339 .gem_prime_export = drm_gem_prime_export, 340 .gem_prime_import = drm_gem_prime_import, 341 .gem_prime_get_sg_table = mtk_gem_prime_get_sg_table, 342 .gem_prime_import_sg_table = mtk_gem_prime_import_sg_table, 343 .gem_prime_mmap = mtk_drm_gem_mmap_buf, 344 .fops = &mtk_drm_fops, 345 346 .name = DRIVER_NAME, 347 .desc = DRIVER_DESC, 348 .date = DRIVER_DATE, 349 .major = DRIVER_MAJOR, 350 .minor = DRIVER_MINOR, 351 }; 352 353 static int compare_of(struct device *dev, void *data) 354 { 355 return dev->of_node == data; 356 } 357 358 static int mtk_drm_bind(struct device *dev) 359 { 360 struct mtk_drm_private *private = dev_get_drvdata(dev); 361 struct drm_device *drm; 362 int ret; 363 364 drm = drm_dev_alloc(&mtk_drm_driver, dev); 365 if (IS_ERR(drm)) 366 return PTR_ERR(drm); 367 368 drm->dev_private = private; 369 private->drm = drm; 370 371 ret = mtk_drm_kms_init(drm); 372 if (ret < 0) 373 goto err_free; 374 375 ret = drm_dev_register(drm, 0); 376 if (ret < 0) 377 goto err_deinit; 378 379 return 0; 380 381 err_deinit: 382 mtk_drm_kms_deinit(drm); 383 err_free: 384 drm_dev_put(drm); 385 return ret; 386 } 387 388 static void mtk_drm_unbind(struct device *dev) 389 { 390 struct mtk_drm_private *private = dev_get_drvdata(dev); 391 392 drm_dev_unregister(private->drm); 393 drm_dev_put(private->drm); 394 private->drm = NULL; 395 } 396 397 static const struct component_master_ops mtk_drm_ops = { 398 .bind = mtk_drm_bind, 399 .unbind = mtk_drm_unbind, 400 }; 401 402 static const struct of_device_id mtk_ddp_comp_dt_ids[] = { 403 { .compatible = "mediatek,mt2701-disp-ovl", 404 .data = (void *)MTK_DISP_OVL }, 405 { .compatible = "mediatek,mt8173-disp-ovl", 406 .data = (void *)MTK_DISP_OVL }, 407 { .compatible = "mediatek,mt2701-disp-rdma", 408 .data = (void *)MTK_DISP_RDMA }, 409 { .compatible = "mediatek,mt8173-disp-rdma", 410 .data = (void *)MTK_DISP_RDMA }, 411 { .compatible = "mediatek,mt8173-disp-wdma", 412 .data = (void *)MTK_DISP_WDMA }, 413 { .compatible = "mediatek,mt2701-disp-color", 414 .data = (void *)MTK_DISP_COLOR }, 415 { .compatible = "mediatek,mt8173-disp-color", 416 .data = (void *)MTK_DISP_COLOR }, 417 { .compatible = "mediatek,mt8173-disp-aal", 418 .data = (void *)MTK_DISP_AAL}, 419 { .compatible = "mediatek,mt8173-disp-gamma", 420 .data = (void *)MTK_DISP_GAMMA, }, 421 { .compatible = "mediatek,mt8173-disp-ufoe", 422 .data = (void *)MTK_DISP_UFOE }, 423 { .compatible = "mediatek,mt2701-dsi", 424 .data = (void *)MTK_DSI }, 425 { .compatible = "mediatek,mt8173-dsi", 426 .data = (void *)MTK_DSI }, 427 { .compatible = "mediatek,mt8173-dpi", 428 .data = (void *)MTK_DPI }, 429 { .compatible = "mediatek,mt2701-disp-mutex", 430 .data = (void *)MTK_DISP_MUTEX }, 431 { .compatible = "mediatek,mt2712-disp-mutex", 432 .data = (void *)MTK_DISP_MUTEX }, 433 { .compatible = "mediatek,mt8173-disp-mutex", 434 .data = (void *)MTK_DISP_MUTEX }, 435 { .compatible = "mediatek,mt2701-disp-pwm", 436 .data = (void *)MTK_DISP_BLS }, 437 { .compatible = "mediatek,mt8173-disp-pwm", 438 .data = (void *)MTK_DISP_PWM }, 439 { .compatible = "mediatek,mt8173-disp-od", 440 .data = (void *)MTK_DISP_OD }, 441 { } 442 }; 443 444 static int mtk_drm_probe(struct platform_device *pdev) 445 { 446 struct device *dev = &pdev->dev; 447 struct mtk_drm_private *private; 448 struct resource *mem; 449 struct device_node *node; 450 struct component_match *match = NULL; 451 int ret; 452 int i; 453 454 private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL); 455 if (!private) 456 return -ENOMEM; 457 458 mutex_init(&private->commit.lock); 459 INIT_WORK(&private->commit.work, mtk_atomic_work); 460 private->data = of_device_get_match_data(dev); 461 462 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 463 private->config_regs = devm_ioremap_resource(dev, mem); 464 if (IS_ERR(private->config_regs)) { 465 ret = PTR_ERR(private->config_regs); 466 dev_err(dev, "Failed to ioremap mmsys-config resource: %d\n", 467 ret); 468 return ret; 469 } 470 471 /* Iterate over sibling DISP function blocks */ 472 for_each_child_of_node(dev->of_node->parent, node) { 473 const struct of_device_id *of_id; 474 enum mtk_ddp_comp_type comp_type; 475 int comp_id; 476 477 of_id = of_match_node(mtk_ddp_comp_dt_ids, node); 478 if (!of_id) 479 continue; 480 481 if (!of_device_is_available(node)) { 482 dev_dbg(dev, "Skipping disabled component %pOF\n", 483 node); 484 continue; 485 } 486 487 comp_type = (enum mtk_ddp_comp_type)of_id->data; 488 489 if (comp_type == MTK_DISP_MUTEX) { 490 private->mutex_node = of_node_get(node); 491 continue; 492 } 493 494 comp_id = mtk_ddp_comp_get_id(node, comp_type); 495 if (comp_id < 0) { 496 dev_warn(dev, "Skipping unknown component %pOF\n", 497 node); 498 continue; 499 } 500 501 private->comp_node[comp_id] = of_node_get(node); 502 503 /* 504 * Currently only the COLOR, OVL, RDMA, DSI, and DPI blocks have 505 * separate component platform drivers and initialize their own 506 * DDP component structure. The others are initialized here. 507 */ 508 if (comp_type == MTK_DISP_COLOR || 509 comp_type == MTK_DISP_OVL || 510 comp_type == MTK_DISP_RDMA || 511 comp_type == MTK_DSI || 512 comp_type == MTK_DPI) { 513 dev_info(dev, "Adding component match for %pOF\n", 514 node); 515 drm_of_component_match_add(dev, &match, compare_of, 516 node); 517 } else { 518 struct mtk_ddp_comp *comp; 519 520 comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL); 521 if (!comp) { 522 ret = -ENOMEM; 523 goto err_node; 524 } 525 526 ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL); 527 if (ret) 528 goto err_node; 529 530 private->ddp_comp[comp_id] = comp; 531 } 532 } 533 534 if (!private->mutex_node) { 535 dev_err(dev, "Failed to find disp-mutex node\n"); 536 ret = -ENODEV; 537 goto err_node; 538 } 539 540 pm_runtime_enable(dev); 541 542 platform_set_drvdata(pdev, private); 543 544 ret = component_master_add_with_match(dev, &mtk_drm_ops, match); 545 if (ret) 546 goto err_pm; 547 548 return 0; 549 550 err_pm: 551 pm_runtime_disable(dev); 552 err_node: 553 of_node_put(private->mutex_node); 554 for (i = 0; i < DDP_COMPONENT_ID_MAX; i++) 555 of_node_put(private->comp_node[i]); 556 return ret; 557 } 558 559 static int mtk_drm_remove(struct platform_device *pdev) 560 { 561 struct mtk_drm_private *private = platform_get_drvdata(pdev); 562 struct drm_device *drm = private->drm; 563 int i; 564 565 drm_dev_unregister(drm); 566 mtk_drm_kms_deinit(drm); 567 drm_dev_put(drm); 568 569 component_master_del(&pdev->dev, &mtk_drm_ops); 570 pm_runtime_disable(&pdev->dev); 571 of_node_put(private->mutex_node); 572 for (i = 0; i < DDP_COMPONENT_ID_MAX; i++) 573 of_node_put(private->comp_node[i]); 574 575 return 0; 576 } 577 578 #ifdef CONFIG_PM_SLEEP 579 static int mtk_drm_sys_suspend(struct device *dev) 580 { 581 struct mtk_drm_private *private = dev_get_drvdata(dev); 582 struct drm_device *drm = private->drm; 583 int ret; 584 585 ret = drm_mode_config_helper_suspend(drm); 586 DRM_DEBUG_DRIVER("mtk_drm_sys_suspend\n"); 587 588 return ret; 589 } 590 591 static int mtk_drm_sys_resume(struct device *dev) 592 { 593 struct mtk_drm_private *private = dev_get_drvdata(dev); 594 struct drm_device *drm = private->drm; 595 int ret; 596 597 ret = drm_mode_config_helper_resume(drm); 598 DRM_DEBUG_DRIVER("mtk_drm_sys_resume\n"); 599 600 return ret; 601 } 602 #endif 603 604 static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend, 605 mtk_drm_sys_resume); 606 607 static const struct of_device_id mtk_drm_of_ids[] = { 608 { .compatible = "mediatek,mt2701-mmsys", 609 .data = &mt2701_mmsys_driver_data}, 610 { .compatible = "mediatek,mt2712-mmsys", 611 .data = &mt2712_mmsys_driver_data}, 612 { .compatible = "mediatek,mt8173-mmsys", 613 .data = &mt8173_mmsys_driver_data}, 614 { } 615 }; 616 617 static struct platform_driver mtk_drm_platform_driver = { 618 .probe = mtk_drm_probe, 619 .remove = mtk_drm_remove, 620 .driver = { 621 .name = "mediatek-drm", 622 .of_match_table = mtk_drm_of_ids, 623 .pm = &mtk_drm_pm_ops, 624 }, 625 }; 626 627 static struct platform_driver * const mtk_drm_drivers[] = { 628 &mtk_ddp_driver, 629 &mtk_disp_color_driver, 630 &mtk_disp_ovl_driver, 631 &mtk_disp_rdma_driver, 632 &mtk_dpi_driver, 633 &mtk_drm_platform_driver, 634 &mtk_dsi_driver, 635 &mtk_mipi_tx_driver, 636 }; 637 638 static int __init mtk_drm_init(void) 639 { 640 return platform_register_drivers(mtk_drm_drivers, 641 ARRAY_SIZE(mtk_drm_drivers)); 642 } 643 644 static void __exit mtk_drm_exit(void) 645 { 646 platform_unregister_drivers(mtk_drm_drivers, 647 ARRAY_SIZE(mtk_drm_drivers)); 648 } 649 650 module_init(mtk_drm_init); 651 module_exit(mtk_drm_exit); 652 653 MODULE_AUTHOR("YT SHEN <yt.shen@mediatek.com>"); 654 MODULE_DESCRIPTION("Mediatek SoC DRM driver"); 655 MODULE_LICENSE("GPL v2"); 656