1 /* 2 * Copyright (c) 2015 MediaTek Inc. 3 * Author: YT SHEN <yt.shen@mediatek.com> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 */ 14 15 #include <drm/drmP.h> 16 #include <drm/drm_atomic.h> 17 #include <drm/drm_atomic_helper.h> 18 #include <drm/drm_crtc_helper.h> 19 #include <drm/drm_gem.h> 20 #include <drm/drm_gem_cma_helper.h> 21 #include <drm/drm_of.h> 22 #include <linux/component.h> 23 #include <linux/iommu.h> 24 #include <linux/of_address.h> 25 #include <linux/of_platform.h> 26 #include <linux/pm_runtime.h> 27 28 #include "mtk_drm_crtc.h" 29 #include "mtk_drm_ddp.h" 30 #include "mtk_drm_ddp_comp.h" 31 #include "mtk_drm_drv.h" 32 #include "mtk_drm_fb.h" 33 #include "mtk_drm_gem.h" 34 35 #define DRIVER_NAME "mediatek" 36 #define DRIVER_DESC "Mediatek SoC DRM" 37 #define DRIVER_DATE "20150513" 38 #define DRIVER_MAJOR 1 39 #define DRIVER_MINOR 0 40 41 static void mtk_atomic_schedule(struct mtk_drm_private *private, 42 struct drm_atomic_state *state) 43 { 44 private->commit.state = state; 45 schedule_work(&private->commit.work); 46 } 47 48 static void mtk_atomic_wait_for_fences(struct drm_atomic_state *state) 49 { 50 struct drm_plane *plane; 51 struct drm_plane_state *plane_state; 52 int i; 53 54 for_each_plane_in_state(state, plane, plane_state, i) 55 mtk_fb_wait(plane->state->fb); 56 } 57 58 static void mtk_atomic_complete(struct mtk_drm_private *private, 59 struct drm_atomic_state *state) 60 { 61 struct drm_device *drm = private->drm; 62 63 mtk_atomic_wait_for_fences(state); 64 65 /* 66 * Mediatek drm supports runtime PM, so plane registers cannot be 67 * written when their crtc is disabled. 68 * 69 * The comment for drm_atomic_helper_commit states: 70 * For drivers supporting runtime PM the recommended sequence is 71 * 72 * drm_atomic_helper_commit_modeset_disables(dev, state); 73 * drm_atomic_helper_commit_modeset_enables(dev, state); 74 * drm_atomic_helper_commit_planes(dev, state, 75 * DRM_PLANE_COMMIT_ACTIVE_ONLY); 76 * 77 * See the kerneldoc entries for these three functions for more details. 78 */ 79 drm_atomic_helper_commit_modeset_disables(drm, state); 80 drm_atomic_helper_commit_modeset_enables(drm, state); 81 drm_atomic_helper_commit_planes(drm, state, 82 DRM_PLANE_COMMIT_ACTIVE_ONLY); 83 84 drm_atomic_helper_wait_for_vblanks(drm, state); 85 86 drm_atomic_helper_cleanup_planes(drm, state); 87 drm_atomic_state_put(state); 88 } 89 90 static void mtk_atomic_work(struct work_struct *work) 91 { 92 struct mtk_drm_private *private = container_of(work, 93 struct mtk_drm_private, commit.work); 94 95 mtk_atomic_complete(private, private->commit.state); 96 } 97 98 static int mtk_atomic_commit(struct drm_device *drm, 99 struct drm_atomic_state *state, 100 bool async) 101 { 102 struct mtk_drm_private *private = drm->dev_private; 103 int ret; 104 105 ret = drm_atomic_helper_prepare_planes(drm, state); 106 if (ret) 107 return ret; 108 109 mutex_lock(&private->commit.lock); 110 flush_work(&private->commit.work); 111 112 drm_atomic_helper_swap_state(state, true); 113 114 drm_atomic_state_get(state); 115 if (async) 116 mtk_atomic_schedule(private, state); 117 else 118 mtk_atomic_complete(private, state); 119 120 mutex_unlock(&private->commit.lock); 121 122 return 0; 123 } 124 125 static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = { 126 .fb_create = mtk_drm_mode_fb_create, 127 .atomic_check = drm_atomic_helper_check, 128 .atomic_commit = mtk_atomic_commit, 129 }; 130 131 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = { 132 DDP_COMPONENT_OVL0, 133 DDP_COMPONENT_RDMA0, 134 DDP_COMPONENT_COLOR0, 135 DDP_COMPONENT_BLS, 136 DDP_COMPONENT_DSI0, 137 }; 138 139 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = { 140 DDP_COMPONENT_RDMA1, 141 DDP_COMPONENT_DPI0, 142 }; 143 144 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = { 145 DDP_COMPONENT_OVL0, 146 DDP_COMPONENT_COLOR0, 147 DDP_COMPONENT_AAL, 148 DDP_COMPONENT_OD, 149 DDP_COMPONENT_RDMA0, 150 DDP_COMPONENT_UFOE, 151 DDP_COMPONENT_DSI0, 152 DDP_COMPONENT_PWM0, 153 }; 154 155 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = { 156 DDP_COMPONENT_OVL1, 157 DDP_COMPONENT_COLOR1, 158 DDP_COMPONENT_GAMMA, 159 DDP_COMPONENT_RDMA1, 160 DDP_COMPONENT_DPI0, 161 }; 162 163 static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { 164 .main_path = mt2701_mtk_ddp_main, 165 .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main), 166 .ext_path = mt2701_mtk_ddp_ext, 167 .ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext), 168 .shadow_register = true, 169 }; 170 171 static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = { 172 .main_path = mt8173_mtk_ddp_main, 173 .main_len = ARRAY_SIZE(mt8173_mtk_ddp_main), 174 .ext_path = mt8173_mtk_ddp_ext, 175 .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext), 176 }; 177 178 static int mtk_drm_kms_init(struct drm_device *drm) 179 { 180 struct mtk_drm_private *private = drm->dev_private; 181 struct platform_device *pdev; 182 struct device_node *np; 183 int ret; 184 185 if (!iommu_present(&platform_bus_type)) 186 return -EPROBE_DEFER; 187 188 pdev = of_find_device_by_node(private->mutex_node); 189 if (!pdev) { 190 dev_err(drm->dev, "Waiting for disp-mutex device %s\n", 191 private->mutex_node->full_name); 192 of_node_put(private->mutex_node); 193 return -EPROBE_DEFER; 194 } 195 private->mutex_dev = &pdev->dev; 196 197 drm_mode_config_init(drm); 198 199 drm->mode_config.min_width = 64; 200 drm->mode_config.min_height = 64; 201 202 /* 203 * set max width and height as default value(4096x4096). 204 * this value would be used to check framebuffer size limitation 205 * at drm_mode_addfb(). 206 */ 207 drm->mode_config.max_width = 4096; 208 drm->mode_config.max_height = 4096; 209 drm->mode_config.funcs = &mtk_drm_mode_config_funcs; 210 211 ret = component_bind_all(drm->dev, drm); 212 if (ret) 213 goto err_config_cleanup; 214 215 /* 216 * We currently support two fixed data streams, each optional, 217 * and each statically assigned to a crtc: 218 * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ... 219 */ 220 ret = mtk_drm_crtc_create(drm, private->data->main_path, 221 private->data->main_len); 222 if (ret < 0) 223 goto err_component_unbind; 224 /* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */ 225 ret = mtk_drm_crtc_create(drm, private->data->ext_path, 226 private->data->ext_len); 227 if (ret < 0) 228 goto err_component_unbind; 229 230 /* Use OVL device for all DMA memory allocations */ 231 np = private->comp_node[private->data->main_path[0]] ?: 232 private->comp_node[private->data->ext_path[0]]; 233 pdev = of_find_device_by_node(np); 234 if (!pdev) { 235 ret = -ENODEV; 236 dev_err(drm->dev, "Need at least one OVL device\n"); 237 goto err_component_unbind; 238 } 239 240 private->dma_dev = &pdev->dev; 241 242 /* 243 * We don't use the drm_irq_install() helpers provided by the DRM 244 * core, so we need to set this manually in order to allow the 245 * DRM_IOCTL_WAIT_VBLANK to operate correctly. 246 */ 247 drm->irq_enabled = true; 248 ret = drm_vblank_init(drm, MAX_CRTC); 249 if (ret < 0) 250 goto err_component_unbind; 251 252 drm_kms_helper_poll_init(drm); 253 drm_mode_config_reset(drm); 254 255 return 0; 256 257 err_component_unbind: 258 component_unbind_all(drm->dev, drm); 259 err_config_cleanup: 260 drm_mode_config_cleanup(drm); 261 262 return ret; 263 } 264 265 static void mtk_drm_kms_deinit(struct drm_device *drm) 266 { 267 drm_kms_helper_poll_fini(drm); 268 269 drm_vblank_cleanup(drm); 270 component_unbind_all(drm->dev, drm); 271 drm_mode_config_cleanup(drm); 272 } 273 274 static const struct file_operations mtk_drm_fops = { 275 .owner = THIS_MODULE, 276 .open = drm_open, 277 .release = drm_release, 278 .unlocked_ioctl = drm_ioctl, 279 .mmap = mtk_drm_gem_mmap, 280 .poll = drm_poll, 281 .read = drm_read, 282 .compat_ioctl = drm_compat_ioctl, 283 }; 284 285 static struct drm_driver mtk_drm_driver = { 286 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME | 287 DRIVER_ATOMIC, 288 289 .gem_free_object_unlocked = mtk_drm_gem_free_object, 290 .gem_vm_ops = &drm_gem_cma_vm_ops, 291 .dumb_create = mtk_drm_gem_dumb_create, 292 .dumb_map_offset = mtk_drm_gem_dumb_map_offset, 293 .dumb_destroy = drm_gem_dumb_destroy, 294 295 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 296 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 297 .gem_prime_export = drm_gem_prime_export, 298 .gem_prime_import = drm_gem_prime_import, 299 .gem_prime_get_sg_table = mtk_gem_prime_get_sg_table, 300 .gem_prime_import_sg_table = mtk_gem_prime_import_sg_table, 301 .gem_prime_mmap = mtk_drm_gem_mmap_buf, 302 .fops = &mtk_drm_fops, 303 304 .name = DRIVER_NAME, 305 .desc = DRIVER_DESC, 306 .date = DRIVER_DATE, 307 .major = DRIVER_MAJOR, 308 .minor = DRIVER_MINOR, 309 }; 310 311 static int compare_of(struct device *dev, void *data) 312 { 313 return dev->of_node == data; 314 } 315 316 static int mtk_drm_bind(struct device *dev) 317 { 318 struct mtk_drm_private *private = dev_get_drvdata(dev); 319 struct drm_device *drm; 320 int ret; 321 322 drm = drm_dev_alloc(&mtk_drm_driver, dev); 323 if (IS_ERR(drm)) 324 return PTR_ERR(drm); 325 326 drm->dev_private = private; 327 private->drm = drm; 328 329 ret = mtk_drm_kms_init(drm); 330 if (ret < 0) 331 goto err_free; 332 333 ret = drm_dev_register(drm, 0); 334 if (ret < 0) 335 goto err_deinit; 336 337 return 0; 338 339 err_deinit: 340 mtk_drm_kms_deinit(drm); 341 err_free: 342 drm_dev_unref(drm); 343 return ret; 344 } 345 346 static void mtk_drm_unbind(struct device *dev) 347 { 348 struct mtk_drm_private *private = dev_get_drvdata(dev); 349 350 drm_dev_unregister(private->drm); 351 drm_dev_unref(private->drm); 352 private->drm = NULL; 353 } 354 355 static const struct component_master_ops mtk_drm_ops = { 356 .bind = mtk_drm_bind, 357 .unbind = mtk_drm_unbind, 358 }; 359 360 static const struct of_device_id mtk_ddp_comp_dt_ids[] = { 361 { .compatible = "mediatek,mt2701-disp-ovl", .data = (void *)MTK_DISP_OVL }, 362 { .compatible = "mediatek,mt8173-disp-ovl", .data = (void *)MTK_DISP_OVL }, 363 { .compatible = "mediatek,mt2701-disp-rdma", .data = (void *)MTK_DISP_RDMA }, 364 { .compatible = "mediatek,mt8173-disp-rdma", .data = (void *)MTK_DISP_RDMA }, 365 { .compatible = "mediatek,mt8173-disp-wdma", .data = (void *)MTK_DISP_WDMA }, 366 { .compatible = "mediatek,mt2701-disp-color", .data = (void *)MTK_DISP_COLOR }, 367 { .compatible = "mediatek,mt8173-disp-color", .data = (void *)MTK_DISP_COLOR }, 368 { .compatible = "mediatek,mt8173-disp-aal", .data = (void *)MTK_DISP_AAL}, 369 { .compatible = "mediatek,mt8173-disp-gamma", .data = (void *)MTK_DISP_GAMMA, }, 370 { .compatible = "mediatek,mt8173-disp-ufoe", .data = (void *)MTK_DISP_UFOE }, 371 { .compatible = "mediatek,mt2701-dsi", .data = (void *)MTK_DSI }, 372 { .compatible = "mediatek,mt8173-dsi", .data = (void *)MTK_DSI }, 373 { .compatible = "mediatek,mt8173-dpi", .data = (void *)MTK_DPI }, 374 { .compatible = "mediatek,mt2701-disp-mutex", .data = (void *)MTK_DISP_MUTEX }, 375 { .compatible = "mediatek,mt8173-disp-mutex", .data = (void *)MTK_DISP_MUTEX }, 376 { .compatible = "mediatek,mt2701-disp-pwm", .data = (void *)MTK_DISP_BLS }, 377 { .compatible = "mediatek,mt8173-disp-pwm", .data = (void *)MTK_DISP_PWM }, 378 { .compatible = "mediatek,mt8173-disp-od", .data = (void *)MTK_DISP_OD }, 379 { } 380 }; 381 382 static int mtk_drm_probe(struct platform_device *pdev) 383 { 384 struct device *dev = &pdev->dev; 385 struct mtk_drm_private *private; 386 struct resource *mem; 387 struct device_node *node; 388 struct component_match *match = NULL; 389 int ret; 390 int i; 391 392 private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL); 393 if (!private) 394 return -ENOMEM; 395 396 mutex_init(&private->commit.lock); 397 INIT_WORK(&private->commit.work, mtk_atomic_work); 398 private->data = of_device_get_match_data(dev); 399 400 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 401 private->config_regs = devm_ioremap_resource(dev, mem); 402 if (IS_ERR(private->config_regs)) { 403 ret = PTR_ERR(private->config_regs); 404 dev_err(dev, "Failed to ioremap mmsys-config resource: %d\n", 405 ret); 406 return ret; 407 } 408 409 /* Iterate over sibling DISP function blocks */ 410 for_each_child_of_node(dev->of_node->parent, node) { 411 const struct of_device_id *of_id; 412 enum mtk_ddp_comp_type comp_type; 413 int comp_id; 414 415 of_id = of_match_node(mtk_ddp_comp_dt_ids, node); 416 if (!of_id) 417 continue; 418 419 if (!of_device_is_available(node)) { 420 dev_dbg(dev, "Skipping disabled component %s\n", 421 node->full_name); 422 continue; 423 } 424 425 comp_type = (enum mtk_ddp_comp_type)of_id->data; 426 427 if (comp_type == MTK_DISP_MUTEX) { 428 private->mutex_node = of_node_get(node); 429 continue; 430 } 431 432 comp_id = mtk_ddp_comp_get_id(node, comp_type); 433 if (comp_id < 0) { 434 dev_warn(dev, "Skipping unknown component %s\n", 435 node->full_name); 436 continue; 437 } 438 439 private->comp_node[comp_id] = of_node_get(node); 440 441 /* 442 * Currently only the COLOR, OVL, RDMA, DSI, and DPI blocks have 443 * separate component platform drivers and initialize their own 444 * DDP component structure. The others are initialized here. 445 */ 446 if (comp_type == MTK_DISP_COLOR || 447 comp_type == MTK_DISP_OVL || 448 comp_type == MTK_DISP_RDMA || 449 comp_type == MTK_DSI || 450 comp_type == MTK_DPI) { 451 dev_info(dev, "Adding component match for %s\n", 452 node->full_name); 453 drm_of_component_match_add(dev, &match, compare_of, 454 node); 455 } else { 456 struct mtk_ddp_comp *comp; 457 458 comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL); 459 if (!comp) { 460 ret = -ENOMEM; 461 goto err_node; 462 } 463 464 ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL); 465 if (ret) 466 goto err_node; 467 468 private->ddp_comp[comp_id] = comp; 469 } 470 } 471 472 if (!private->mutex_node) { 473 dev_err(dev, "Failed to find disp-mutex node\n"); 474 ret = -ENODEV; 475 goto err_node; 476 } 477 478 pm_runtime_enable(dev); 479 480 platform_set_drvdata(pdev, private); 481 482 ret = component_master_add_with_match(dev, &mtk_drm_ops, match); 483 if (ret) 484 goto err_pm; 485 486 return 0; 487 488 err_pm: 489 pm_runtime_disable(dev); 490 err_node: 491 of_node_put(private->mutex_node); 492 for (i = 0; i < DDP_COMPONENT_ID_MAX; i++) 493 of_node_put(private->comp_node[i]); 494 return ret; 495 } 496 497 static int mtk_drm_remove(struct platform_device *pdev) 498 { 499 struct mtk_drm_private *private = platform_get_drvdata(pdev); 500 struct drm_device *drm = private->drm; 501 int i; 502 503 drm_dev_unregister(drm); 504 mtk_drm_kms_deinit(drm); 505 drm_dev_unref(drm); 506 507 component_master_del(&pdev->dev, &mtk_drm_ops); 508 pm_runtime_disable(&pdev->dev); 509 of_node_put(private->mutex_node); 510 for (i = 0; i < DDP_COMPONENT_ID_MAX; i++) 511 of_node_put(private->comp_node[i]); 512 513 return 0; 514 } 515 516 #ifdef CONFIG_PM_SLEEP 517 static int mtk_drm_sys_suspend(struct device *dev) 518 { 519 struct mtk_drm_private *private = dev_get_drvdata(dev); 520 struct drm_device *drm = private->drm; 521 522 drm_kms_helper_poll_disable(drm); 523 524 private->suspend_state = drm_atomic_helper_suspend(drm); 525 if (IS_ERR(private->suspend_state)) { 526 drm_kms_helper_poll_enable(drm); 527 return PTR_ERR(private->suspend_state); 528 } 529 530 DRM_DEBUG_DRIVER("mtk_drm_sys_suspend\n"); 531 return 0; 532 } 533 534 static int mtk_drm_sys_resume(struct device *dev) 535 { 536 struct mtk_drm_private *private = dev_get_drvdata(dev); 537 struct drm_device *drm = private->drm; 538 539 drm_atomic_helper_resume(drm, private->suspend_state); 540 drm_kms_helper_poll_enable(drm); 541 542 DRM_DEBUG_DRIVER("mtk_drm_sys_resume\n"); 543 return 0; 544 } 545 #endif 546 547 static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend, 548 mtk_drm_sys_resume); 549 550 static const struct of_device_id mtk_drm_of_ids[] = { 551 { .compatible = "mediatek,mt2701-mmsys", 552 .data = &mt2701_mmsys_driver_data}, 553 { .compatible = "mediatek,mt8173-mmsys", 554 .data = &mt8173_mmsys_driver_data}, 555 { } 556 }; 557 558 static struct platform_driver mtk_drm_platform_driver = { 559 .probe = mtk_drm_probe, 560 .remove = mtk_drm_remove, 561 .driver = { 562 .name = "mediatek-drm", 563 .of_match_table = mtk_drm_of_ids, 564 .pm = &mtk_drm_pm_ops, 565 }, 566 }; 567 568 static struct platform_driver * const mtk_drm_drivers[] = { 569 &mtk_ddp_driver, 570 &mtk_disp_color_driver, 571 &mtk_disp_ovl_driver, 572 &mtk_disp_rdma_driver, 573 &mtk_dpi_driver, 574 &mtk_drm_platform_driver, 575 &mtk_dsi_driver, 576 &mtk_mipi_tx_driver, 577 }; 578 579 static int __init mtk_drm_init(void) 580 { 581 return platform_register_drivers(mtk_drm_drivers, 582 ARRAY_SIZE(mtk_drm_drivers)); 583 } 584 585 static void __exit mtk_drm_exit(void) 586 { 587 platform_unregister_drivers(mtk_drm_drivers, 588 ARRAY_SIZE(mtk_drm_drivers)); 589 } 590 591 module_init(mtk_drm_init); 592 module_exit(mtk_drm_exit); 593 594 MODULE_AUTHOR("YT SHEN <yt.shen@mediatek.com>"); 595 MODULE_DESCRIPTION("Mediatek SoC DRM driver"); 596 MODULE_LICENSE("GPL v2"); 597