xref: /openbmc/linux/drivers/gpu/drm/mediatek/mtk_drm_drv.c (revision 4ed91d48259d9ddd378424d008f2e6559f7e78f8)
1 /*
2  * Copyright (c) 2015 MediaTek Inc.
3  * Author: YT SHEN <yt.shen@mediatek.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  */
14 
15 #include <drm/drmP.h>
16 #include <drm/drm_atomic.h>
17 #include <drm/drm_atomic_helper.h>
18 #include <drm/drm_crtc_helper.h>
19 #include <drm/drm_gem.h>
20 #include <drm/drm_gem_cma_helper.h>
21 #include <drm/drm_of.h>
22 #include <linux/component.h>
23 #include <linux/iommu.h>
24 #include <linux/of_address.h>
25 #include <linux/of_platform.h>
26 #include <linux/pm_runtime.h>
27 
28 #include "mtk_drm_crtc.h"
29 #include "mtk_drm_ddp.h"
30 #include "mtk_drm_ddp_comp.h"
31 #include "mtk_drm_drv.h"
32 #include "mtk_drm_fb.h"
33 #include "mtk_drm_gem.h"
34 
35 #define DRIVER_NAME "mediatek"
36 #define DRIVER_DESC "Mediatek SoC DRM"
37 #define DRIVER_DATE "20150513"
38 #define DRIVER_MAJOR 1
39 #define DRIVER_MINOR 0
40 
41 static void mtk_atomic_schedule(struct mtk_drm_private *private,
42 				struct drm_atomic_state *state)
43 {
44 	private->commit.state = state;
45 	schedule_work(&private->commit.work);
46 }
47 
48 static void mtk_atomic_wait_for_fences(struct drm_atomic_state *state)
49 {
50 	struct drm_plane *plane;
51 	struct drm_plane_state *plane_state;
52 	int i;
53 
54 	for_each_plane_in_state(state, plane, plane_state, i)
55 		mtk_fb_wait(plane->state->fb);
56 }
57 
58 static void mtk_atomic_complete(struct mtk_drm_private *private,
59 				struct drm_atomic_state *state)
60 {
61 	struct drm_device *drm = private->drm;
62 
63 	mtk_atomic_wait_for_fences(state);
64 
65 	/*
66 	 * Mediatek drm supports runtime PM, so plane registers cannot be
67 	 * written when their crtc is disabled.
68 	 *
69 	 * The comment for drm_atomic_helper_commit states:
70 	 *     For drivers supporting runtime PM the recommended sequence is
71 	 *
72 	 *     drm_atomic_helper_commit_modeset_disables(dev, state);
73 	 *     drm_atomic_helper_commit_modeset_enables(dev, state);
74 	 *     drm_atomic_helper_commit_planes(dev, state,
75 	 *                                     DRM_PLANE_COMMIT_ACTIVE_ONLY);
76 	 *
77 	 * See the kerneldoc entries for these three functions for more details.
78 	 */
79 	drm_atomic_helper_commit_modeset_disables(drm, state);
80 	drm_atomic_helper_commit_modeset_enables(drm, state);
81 	drm_atomic_helper_commit_planes(drm, state,
82 					DRM_PLANE_COMMIT_ACTIVE_ONLY);
83 
84 	drm_atomic_helper_wait_for_vblanks(drm, state);
85 
86 	drm_atomic_helper_cleanup_planes(drm, state);
87 	drm_atomic_state_put(state);
88 }
89 
90 static void mtk_atomic_work(struct work_struct *work)
91 {
92 	struct mtk_drm_private *private = container_of(work,
93 			struct mtk_drm_private, commit.work);
94 
95 	mtk_atomic_complete(private, private->commit.state);
96 }
97 
98 static int mtk_atomic_commit(struct drm_device *drm,
99 			     struct drm_atomic_state *state,
100 			     bool async)
101 {
102 	struct mtk_drm_private *private = drm->dev_private;
103 	int ret;
104 
105 	ret = drm_atomic_helper_prepare_planes(drm, state);
106 	if (ret)
107 		return ret;
108 
109 	mutex_lock(&private->commit.lock);
110 	flush_work(&private->commit.work);
111 
112 	drm_atomic_helper_swap_state(state, true);
113 
114 	drm_atomic_state_get(state);
115 	if (async)
116 		mtk_atomic_schedule(private, state);
117 	else
118 		mtk_atomic_complete(private, state);
119 
120 	mutex_unlock(&private->commit.lock);
121 
122 	return 0;
123 }
124 
125 static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = {
126 	.fb_create = mtk_drm_mode_fb_create,
127 	.atomic_check = drm_atomic_helper_check,
128 	.atomic_commit = mtk_atomic_commit,
129 };
130 
131 static const enum mtk_ddp_comp_id mtk_ddp_main[] = {
132 	DDP_COMPONENT_OVL0,
133 	DDP_COMPONENT_COLOR0,
134 	DDP_COMPONENT_AAL,
135 	DDP_COMPONENT_OD,
136 	DDP_COMPONENT_RDMA0,
137 	DDP_COMPONENT_UFOE,
138 	DDP_COMPONENT_DSI0,
139 	DDP_COMPONENT_PWM0,
140 };
141 
142 static const enum mtk_ddp_comp_id mtk_ddp_ext[] = {
143 	DDP_COMPONENT_OVL1,
144 	DDP_COMPONENT_COLOR1,
145 	DDP_COMPONENT_GAMMA,
146 	DDP_COMPONENT_RDMA1,
147 	DDP_COMPONENT_DPI0,
148 };
149 
150 static int mtk_drm_kms_init(struct drm_device *drm)
151 {
152 	struct mtk_drm_private *private = drm->dev_private;
153 	struct platform_device *pdev;
154 	struct device_node *np;
155 	int ret;
156 
157 	if (!iommu_present(&platform_bus_type))
158 		return -EPROBE_DEFER;
159 
160 	pdev = of_find_device_by_node(private->mutex_node);
161 	if (!pdev) {
162 		dev_err(drm->dev, "Waiting for disp-mutex device %s\n",
163 			private->mutex_node->full_name);
164 		of_node_put(private->mutex_node);
165 		return -EPROBE_DEFER;
166 	}
167 	private->mutex_dev = &pdev->dev;
168 
169 	drm_mode_config_init(drm);
170 
171 	drm->mode_config.min_width = 64;
172 	drm->mode_config.min_height = 64;
173 
174 	/*
175 	 * set max width and height as default value(4096x4096).
176 	 * this value would be used to check framebuffer size limitation
177 	 * at drm_mode_addfb().
178 	 */
179 	drm->mode_config.max_width = 4096;
180 	drm->mode_config.max_height = 4096;
181 	drm->mode_config.funcs = &mtk_drm_mode_config_funcs;
182 
183 	ret = component_bind_all(drm->dev, drm);
184 	if (ret)
185 		goto err_config_cleanup;
186 
187 	/*
188 	 * We currently support two fixed data streams, each optional,
189 	 * and each statically assigned to a crtc:
190 	 * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ...
191 	 */
192 	ret = mtk_drm_crtc_create(drm, mtk_ddp_main, ARRAY_SIZE(mtk_ddp_main));
193 	if (ret < 0)
194 		goto err_component_unbind;
195 	/* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */
196 	ret = mtk_drm_crtc_create(drm, mtk_ddp_ext, ARRAY_SIZE(mtk_ddp_ext));
197 	if (ret < 0)
198 		goto err_component_unbind;
199 
200 	/* Use OVL device for all DMA memory allocations */
201 	np = private->comp_node[mtk_ddp_main[0]] ?:
202 	     private->comp_node[mtk_ddp_ext[0]];
203 	pdev = of_find_device_by_node(np);
204 	if (!pdev) {
205 		ret = -ENODEV;
206 		dev_err(drm->dev, "Need at least one OVL device\n");
207 		goto err_component_unbind;
208 	}
209 
210 	private->dma_dev = &pdev->dev;
211 
212 	/*
213 	 * We don't use the drm_irq_install() helpers provided by the DRM
214 	 * core, so we need to set this manually in order to allow the
215 	 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
216 	 */
217 	drm->irq_enabled = true;
218 	ret = drm_vblank_init(drm, MAX_CRTC);
219 	if (ret < 0)
220 		goto err_component_unbind;
221 
222 	drm_kms_helper_poll_init(drm);
223 	drm_mode_config_reset(drm);
224 
225 	return 0;
226 
227 err_component_unbind:
228 	component_unbind_all(drm->dev, drm);
229 err_config_cleanup:
230 	drm_mode_config_cleanup(drm);
231 
232 	return ret;
233 }
234 
235 static void mtk_drm_kms_deinit(struct drm_device *drm)
236 {
237 	drm_kms_helper_poll_fini(drm);
238 
239 	drm_vblank_cleanup(drm);
240 	component_unbind_all(drm->dev, drm);
241 	drm_mode_config_cleanup(drm);
242 }
243 
244 static const struct file_operations mtk_drm_fops = {
245 	.owner = THIS_MODULE,
246 	.open = drm_open,
247 	.release = drm_release,
248 	.unlocked_ioctl = drm_ioctl,
249 	.mmap = mtk_drm_gem_mmap,
250 	.poll = drm_poll,
251 	.read = drm_read,
252 	.compat_ioctl = drm_compat_ioctl,
253 };
254 
255 static struct drm_driver mtk_drm_driver = {
256 	.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
257 			   DRIVER_ATOMIC,
258 
259 	.get_vblank_counter = drm_vblank_no_hw_counter,
260 	.enable_vblank = mtk_drm_crtc_enable_vblank,
261 	.disable_vblank = mtk_drm_crtc_disable_vblank,
262 
263 	.gem_free_object_unlocked = mtk_drm_gem_free_object,
264 	.gem_vm_ops = &drm_gem_cma_vm_ops,
265 	.dumb_create = mtk_drm_gem_dumb_create,
266 	.dumb_map_offset = mtk_drm_gem_dumb_map_offset,
267 	.dumb_destroy = drm_gem_dumb_destroy,
268 
269 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
270 	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
271 	.gem_prime_export = drm_gem_prime_export,
272 	.gem_prime_import = drm_gem_prime_import,
273 	.gem_prime_get_sg_table = mtk_gem_prime_get_sg_table,
274 	.gem_prime_import_sg_table = mtk_gem_prime_import_sg_table,
275 	.gem_prime_mmap = mtk_drm_gem_mmap_buf,
276 	.fops = &mtk_drm_fops,
277 
278 	.name = DRIVER_NAME,
279 	.desc = DRIVER_DESC,
280 	.date = DRIVER_DATE,
281 	.major = DRIVER_MAJOR,
282 	.minor = DRIVER_MINOR,
283 };
284 
285 static int compare_of(struct device *dev, void *data)
286 {
287 	return dev->of_node == data;
288 }
289 
290 static int mtk_drm_bind(struct device *dev)
291 {
292 	struct mtk_drm_private *private = dev_get_drvdata(dev);
293 	struct drm_device *drm;
294 	int ret;
295 
296 	drm = drm_dev_alloc(&mtk_drm_driver, dev);
297 	if (IS_ERR(drm))
298 		return PTR_ERR(drm);
299 
300 	drm->dev_private = private;
301 	private->drm = drm;
302 
303 	ret = mtk_drm_kms_init(drm);
304 	if (ret < 0)
305 		goto err_free;
306 
307 	ret = drm_dev_register(drm, 0);
308 	if (ret < 0)
309 		goto err_deinit;
310 
311 	return 0;
312 
313 err_deinit:
314 	mtk_drm_kms_deinit(drm);
315 err_free:
316 	drm_dev_unref(drm);
317 	return ret;
318 }
319 
320 static void mtk_drm_unbind(struct device *dev)
321 {
322 	struct mtk_drm_private *private = dev_get_drvdata(dev);
323 
324 	drm_dev_unregister(private->drm);
325 	drm_dev_unref(private->drm);
326 	private->drm = NULL;
327 }
328 
329 static const struct component_master_ops mtk_drm_ops = {
330 	.bind		= mtk_drm_bind,
331 	.unbind		= mtk_drm_unbind,
332 };
333 
334 static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
335 	{ .compatible = "mediatek,mt8173-disp-ovl",   .data = (void *)MTK_DISP_OVL },
336 	{ .compatible = "mediatek,mt8173-disp-rdma",  .data = (void *)MTK_DISP_RDMA },
337 	{ .compatible = "mediatek,mt8173-disp-wdma",  .data = (void *)MTK_DISP_WDMA },
338 	{ .compatible = "mediatek,mt8173-disp-color", .data = (void *)MTK_DISP_COLOR },
339 	{ .compatible = "mediatek,mt8173-disp-aal",   .data = (void *)MTK_DISP_AAL},
340 	{ .compatible = "mediatek,mt8173-disp-gamma", .data = (void *)MTK_DISP_GAMMA, },
341 	{ .compatible = "mediatek,mt8173-disp-ufoe",  .data = (void *)MTK_DISP_UFOE },
342 	{ .compatible = "mediatek,mt8173-dsi",        .data = (void *)MTK_DSI },
343 	{ .compatible = "mediatek,mt8173-dpi",        .data = (void *)MTK_DPI },
344 	{ .compatible = "mediatek,mt8173-disp-mutex", .data = (void *)MTK_DISP_MUTEX },
345 	{ .compatible = "mediatek,mt8173-disp-pwm",   .data = (void *)MTK_DISP_PWM },
346 	{ .compatible = "mediatek,mt8173-disp-od",    .data = (void *)MTK_DISP_OD },
347 	{ }
348 };
349 
350 static int mtk_drm_probe(struct platform_device *pdev)
351 {
352 	struct device *dev = &pdev->dev;
353 	struct mtk_drm_private *private;
354 	struct resource *mem;
355 	struct device_node *node;
356 	struct component_match *match = NULL;
357 	int ret;
358 	int i;
359 
360 	private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL);
361 	if (!private)
362 		return -ENOMEM;
363 
364 	mutex_init(&private->commit.lock);
365 	INIT_WORK(&private->commit.work, mtk_atomic_work);
366 
367 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
368 	private->config_regs = devm_ioremap_resource(dev, mem);
369 	if (IS_ERR(private->config_regs)) {
370 		ret = PTR_ERR(private->config_regs);
371 		dev_err(dev, "Failed to ioremap mmsys-config resource: %d\n",
372 			ret);
373 		return ret;
374 	}
375 
376 	/* Iterate over sibling DISP function blocks */
377 	for_each_child_of_node(dev->of_node->parent, node) {
378 		const struct of_device_id *of_id;
379 		enum mtk_ddp_comp_type comp_type;
380 		int comp_id;
381 
382 		of_id = of_match_node(mtk_ddp_comp_dt_ids, node);
383 		if (!of_id)
384 			continue;
385 
386 		if (!of_device_is_available(node)) {
387 			dev_dbg(dev, "Skipping disabled component %s\n",
388 				node->full_name);
389 			continue;
390 		}
391 
392 		comp_type = (enum mtk_ddp_comp_type)of_id->data;
393 
394 		if (comp_type == MTK_DISP_MUTEX) {
395 			private->mutex_node = of_node_get(node);
396 			continue;
397 		}
398 
399 		comp_id = mtk_ddp_comp_get_id(node, comp_type);
400 		if (comp_id < 0) {
401 			dev_warn(dev, "Skipping unknown component %s\n",
402 				 node->full_name);
403 			continue;
404 		}
405 
406 		private->comp_node[comp_id] = of_node_get(node);
407 
408 		/*
409 		 * Currently only the OVL, RDMA, DSI, and DPI blocks have
410 		 * separate component platform drivers and initialize their own
411 		 * DDP component structure. The others are initialized here.
412 		 */
413 		if (comp_type == MTK_DISP_OVL ||
414 		    comp_type == MTK_DISP_RDMA ||
415 		    comp_type == MTK_DSI ||
416 		    comp_type == MTK_DPI) {
417 			dev_info(dev, "Adding component match for %s\n",
418 				 node->full_name);
419 			drm_of_component_match_add(dev, &match, compare_of,
420 						   node);
421 		} else {
422 			struct mtk_ddp_comp *comp;
423 
424 			comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL);
425 			if (!comp) {
426 				ret = -ENOMEM;
427 				goto err_node;
428 			}
429 
430 			ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL);
431 			if (ret)
432 				goto err_node;
433 
434 			private->ddp_comp[comp_id] = comp;
435 		}
436 	}
437 
438 	if (!private->mutex_node) {
439 		dev_err(dev, "Failed to find disp-mutex node\n");
440 		ret = -ENODEV;
441 		goto err_node;
442 	}
443 
444 	pm_runtime_enable(dev);
445 
446 	platform_set_drvdata(pdev, private);
447 
448 	ret = component_master_add_with_match(dev, &mtk_drm_ops, match);
449 	if (ret)
450 		goto err_pm;
451 
452 	return 0;
453 
454 err_pm:
455 	pm_runtime_disable(dev);
456 err_node:
457 	of_node_put(private->mutex_node);
458 	for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
459 		of_node_put(private->comp_node[i]);
460 	return ret;
461 }
462 
463 static int mtk_drm_remove(struct platform_device *pdev)
464 {
465 	struct mtk_drm_private *private = platform_get_drvdata(pdev);
466 	struct drm_device *drm = private->drm;
467 	int i;
468 
469 	drm_dev_unregister(drm);
470 	mtk_drm_kms_deinit(drm);
471 	drm_dev_unref(drm);
472 
473 	component_master_del(&pdev->dev, &mtk_drm_ops);
474 	pm_runtime_disable(&pdev->dev);
475 	of_node_put(private->mutex_node);
476 	for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
477 		of_node_put(private->comp_node[i]);
478 
479 	return 0;
480 }
481 
482 #ifdef CONFIG_PM_SLEEP
483 static int mtk_drm_sys_suspend(struct device *dev)
484 {
485 	struct mtk_drm_private *private = dev_get_drvdata(dev);
486 	struct drm_device *drm = private->drm;
487 
488 	drm_kms_helper_poll_disable(drm);
489 
490 	private->suspend_state = drm_atomic_helper_suspend(drm);
491 	if (IS_ERR(private->suspend_state)) {
492 		drm_kms_helper_poll_enable(drm);
493 		return PTR_ERR(private->suspend_state);
494 	}
495 
496 	DRM_DEBUG_DRIVER("mtk_drm_sys_suspend\n");
497 	return 0;
498 }
499 
500 static int mtk_drm_sys_resume(struct device *dev)
501 {
502 	struct mtk_drm_private *private = dev_get_drvdata(dev);
503 	struct drm_device *drm = private->drm;
504 
505 	drm_atomic_helper_resume(drm, private->suspend_state);
506 	drm_kms_helper_poll_enable(drm);
507 
508 	DRM_DEBUG_DRIVER("mtk_drm_sys_resume\n");
509 	return 0;
510 }
511 #endif
512 
513 static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend,
514 			 mtk_drm_sys_resume);
515 
516 static const struct of_device_id mtk_drm_of_ids[] = {
517 	{ .compatible = "mediatek,mt8173-mmsys", },
518 	{ }
519 };
520 
521 static struct platform_driver mtk_drm_platform_driver = {
522 	.probe	= mtk_drm_probe,
523 	.remove	= mtk_drm_remove,
524 	.driver	= {
525 		.name	= "mediatek-drm",
526 		.of_match_table = mtk_drm_of_ids,
527 		.pm     = &mtk_drm_pm_ops,
528 	},
529 };
530 
531 static struct platform_driver * const mtk_drm_drivers[] = {
532 	&mtk_ddp_driver,
533 	&mtk_disp_ovl_driver,
534 	&mtk_disp_rdma_driver,
535 	&mtk_dpi_driver,
536 	&mtk_drm_platform_driver,
537 	&mtk_dsi_driver,
538 	&mtk_mipi_tx_driver,
539 };
540 
541 static int __init mtk_drm_init(void)
542 {
543 	int ret;
544 	int i;
545 
546 	for (i = 0; i < ARRAY_SIZE(mtk_drm_drivers); i++) {
547 		ret = platform_driver_register(mtk_drm_drivers[i]);
548 		if (ret < 0) {
549 			pr_err("Failed to register %s driver: %d\n",
550 			       mtk_drm_drivers[i]->driver.name, ret);
551 			goto err;
552 		}
553 	}
554 
555 	return 0;
556 
557 err:
558 	while (--i >= 0)
559 		platform_driver_unregister(mtk_drm_drivers[i]);
560 
561 	return ret;
562 }
563 
564 static void __exit mtk_drm_exit(void)
565 {
566 	int i;
567 
568 	for (i = ARRAY_SIZE(mtk_drm_drivers) - 1; i >= 0; i--)
569 		platform_driver_unregister(mtk_drm_drivers[i]);
570 }
571 
572 module_init(mtk_drm_init);
573 module_exit(mtk_drm_exit);
574 
575 MODULE_AUTHOR("YT SHEN <yt.shen@mediatek.com>");
576 MODULE_DESCRIPTION("Mediatek SoC DRM driver");
577 MODULE_LICENSE("GPL v2");
578