1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2015 MediaTek Inc. 4 */ 5 6 #ifndef MTK_DRM_DDP_COMP_H 7 #define MTK_DRM_DDP_COMP_H 8 9 #include <linux/io.h> 10 11 struct device; 12 struct device_node; 13 struct drm_crtc; 14 struct drm_device; 15 struct mtk_plane_state; 16 struct drm_crtc_state; 17 18 enum mtk_ddp_comp_type { 19 MTK_DISP_OVL, 20 MTK_DISP_OVL_2L, 21 MTK_DISP_RDMA, 22 MTK_DISP_WDMA, 23 MTK_DISP_COLOR, 24 MTK_DISP_CCORR, 25 MTK_DISP_DITHER, 26 MTK_DISP_AAL, 27 MTK_DISP_GAMMA, 28 MTK_DISP_UFOE, 29 MTK_DSI, 30 MTK_DPI, 31 MTK_DISP_PWM, 32 MTK_DISP_MUTEX, 33 MTK_DISP_OD, 34 MTK_DISP_BLS, 35 MTK_DDP_COMP_TYPE_MAX, 36 }; 37 38 enum mtk_ddp_comp_id { 39 DDP_COMPONENT_AAL0, 40 DDP_COMPONENT_AAL1, 41 DDP_COMPONENT_BLS, 42 DDP_COMPONENT_CCORR, 43 DDP_COMPONENT_COLOR0, 44 DDP_COMPONENT_COLOR1, 45 DDP_COMPONENT_DITHER, 46 DDP_COMPONENT_DPI0, 47 DDP_COMPONENT_DPI1, 48 DDP_COMPONENT_DSI0, 49 DDP_COMPONENT_DSI1, 50 DDP_COMPONENT_DSI2, 51 DDP_COMPONENT_DSI3, 52 DDP_COMPONENT_GAMMA, 53 DDP_COMPONENT_OD0, 54 DDP_COMPONENT_OD1, 55 DDP_COMPONENT_OVL0, 56 DDP_COMPONENT_OVL_2L0, 57 DDP_COMPONENT_OVL_2L1, 58 DDP_COMPONENT_OVL1, 59 DDP_COMPONENT_PWM0, 60 DDP_COMPONENT_PWM1, 61 DDP_COMPONENT_PWM2, 62 DDP_COMPONENT_RDMA0, 63 DDP_COMPONENT_RDMA1, 64 DDP_COMPONENT_RDMA2, 65 DDP_COMPONENT_UFOE, 66 DDP_COMPONENT_WDMA0, 67 DDP_COMPONENT_WDMA1, 68 DDP_COMPONENT_ID_MAX, 69 }; 70 71 struct mtk_ddp_comp; 72 struct cmdq_pkt; 73 struct mtk_ddp_comp_funcs { 74 void (*config)(struct mtk_ddp_comp *comp, unsigned int w, 75 unsigned int h, unsigned int vrefresh, 76 unsigned int bpc, struct cmdq_pkt *cmdq_pkt); 77 void (*start)(struct mtk_ddp_comp *comp); 78 void (*stop)(struct mtk_ddp_comp *comp); 79 void (*enable_vblank)(struct mtk_ddp_comp *comp, struct drm_crtc *crtc); 80 void (*disable_vblank)(struct mtk_ddp_comp *comp); 81 unsigned int (*supported_rotations)(struct mtk_ddp_comp *comp); 82 unsigned int (*layer_nr)(struct mtk_ddp_comp *comp); 83 int (*layer_check)(struct mtk_ddp_comp *comp, 84 unsigned int idx, 85 struct mtk_plane_state *state); 86 void (*layer_config)(struct mtk_ddp_comp *comp, unsigned int idx, 87 struct mtk_plane_state *state, 88 struct cmdq_pkt *cmdq_pkt); 89 void (*gamma_set)(struct mtk_ddp_comp *comp, 90 struct drm_crtc_state *state); 91 void (*bgclr_in_on)(struct mtk_ddp_comp *comp); 92 void (*bgclr_in_off)(struct mtk_ddp_comp *comp); 93 void (*ctm_set)(struct mtk_ddp_comp *comp, 94 struct drm_crtc_state *state); 95 }; 96 97 struct mtk_ddp_comp { 98 struct clk *clk; 99 void __iomem *regs; 100 int irq; 101 struct device *larb_dev; 102 enum mtk_ddp_comp_id id; 103 const struct mtk_ddp_comp_funcs *funcs; 104 resource_size_t regs_pa; 105 u8 subsys; 106 }; 107 108 static inline void mtk_ddp_comp_config(struct mtk_ddp_comp *comp, 109 unsigned int w, unsigned int h, 110 unsigned int vrefresh, unsigned int bpc, 111 struct cmdq_pkt *cmdq_pkt) 112 { 113 if (comp->funcs && comp->funcs->config) 114 comp->funcs->config(comp, w, h, vrefresh, bpc, cmdq_pkt); 115 } 116 117 static inline void mtk_ddp_comp_start(struct mtk_ddp_comp *comp) 118 { 119 if (comp->funcs && comp->funcs->start) 120 comp->funcs->start(comp); 121 } 122 123 static inline void mtk_ddp_comp_stop(struct mtk_ddp_comp *comp) 124 { 125 if (comp->funcs && comp->funcs->stop) 126 comp->funcs->stop(comp); 127 } 128 129 static inline void mtk_ddp_comp_enable_vblank(struct mtk_ddp_comp *comp, 130 struct drm_crtc *crtc) 131 { 132 if (comp->funcs && comp->funcs->enable_vblank) 133 comp->funcs->enable_vblank(comp, crtc); 134 } 135 136 static inline void mtk_ddp_comp_disable_vblank(struct mtk_ddp_comp *comp) 137 { 138 if (comp->funcs && comp->funcs->disable_vblank) 139 comp->funcs->disable_vblank(comp); 140 } 141 142 static inline 143 unsigned int mtk_ddp_comp_supported_rotations(struct mtk_ddp_comp *comp) 144 { 145 if (comp->funcs && comp->funcs->supported_rotations) 146 return comp->funcs->supported_rotations(comp); 147 148 return 0; 149 } 150 151 static inline unsigned int mtk_ddp_comp_layer_nr(struct mtk_ddp_comp *comp) 152 { 153 if (comp->funcs && comp->funcs->layer_nr) 154 return comp->funcs->layer_nr(comp); 155 156 return 0; 157 } 158 159 static inline int mtk_ddp_comp_layer_check(struct mtk_ddp_comp *comp, 160 unsigned int idx, 161 struct mtk_plane_state *state) 162 { 163 if (comp->funcs && comp->funcs->layer_check) 164 return comp->funcs->layer_check(comp, idx, state); 165 return 0; 166 } 167 168 static inline void mtk_ddp_comp_layer_config(struct mtk_ddp_comp *comp, 169 unsigned int idx, 170 struct mtk_plane_state *state, 171 struct cmdq_pkt *cmdq_pkt) 172 { 173 if (comp->funcs && comp->funcs->layer_config) 174 comp->funcs->layer_config(comp, idx, state, cmdq_pkt); 175 } 176 177 static inline void mtk_ddp_gamma_set(struct mtk_ddp_comp *comp, 178 struct drm_crtc_state *state) 179 { 180 if (comp->funcs && comp->funcs->gamma_set) 181 comp->funcs->gamma_set(comp, state); 182 } 183 184 static inline void mtk_ddp_comp_bgclr_in_on(struct mtk_ddp_comp *comp) 185 { 186 if (comp->funcs && comp->funcs->bgclr_in_on) 187 comp->funcs->bgclr_in_on(comp); 188 } 189 190 static inline void mtk_ddp_comp_bgclr_in_off(struct mtk_ddp_comp *comp) 191 { 192 if (comp->funcs && comp->funcs->bgclr_in_off) 193 comp->funcs->bgclr_in_off(comp); 194 } 195 196 static inline void mtk_ddp_ctm_set(struct mtk_ddp_comp *comp, 197 struct drm_crtc_state *state) 198 { 199 if (comp->funcs && comp->funcs->ctm_set) 200 comp->funcs->ctm_set(comp, state); 201 } 202 203 int mtk_ddp_comp_get_id(struct device_node *node, 204 enum mtk_ddp_comp_type comp_type); 205 int mtk_ddp_comp_init(struct device *dev, struct device_node *comp_node, 206 struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id, 207 const struct mtk_ddp_comp_funcs *funcs); 208 int mtk_ddp_comp_register(struct drm_device *drm, struct mtk_ddp_comp *comp); 209 void mtk_ddp_comp_unregister(struct drm_device *drm, struct mtk_ddp_comp *comp); 210 void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc, 211 unsigned int CFG, struct cmdq_pkt *cmdq_pkt); 212 enum mtk_ddp_comp_type mtk_ddp_comp_get_type(enum mtk_ddp_comp_id comp_id); 213 void mtk_ddp_write(struct cmdq_pkt *cmdq_pkt, unsigned int value, 214 struct mtk_ddp_comp *comp, unsigned int offset); 215 void mtk_ddp_write_relaxed(struct cmdq_pkt *cmdq_pkt, unsigned int value, 216 struct mtk_ddp_comp *comp, unsigned int offset); 217 void mtk_ddp_write_mask(struct cmdq_pkt *cmdq_pkt, unsigned int value, 218 struct mtk_ddp_comp *comp, unsigned int offset, 219 unsigned int mask); 220 #endif /* MTK_DRM_DDP_COMP_H */ 221