1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2021 MediaTek Inc. 4 */ 5 6 #include <linux/clk.h> 7 #include <linux/component.h> 8 #include <linux/module.h> 9 #include <linux/of_device.h> 10 #include <linux/of_irq.h> 11 #include <linux/platform_device.h> 12 #include <linux/soc/mediatek/mtk-cmdq.h> 13 14 #include "mtk_disp_drv.h" 15 #include "mtk_drm_crtc.h" 16 #include "mtk_drm_ddp_comp.h" 17 #include "mtk_drm_drv.h" 18 19 #define DISP_CCORR_EN 0x0000 20 #define CCORR_EN BIT(0) 21 #define DISP_CCORR_CFG 0x0020 22 #define CCORR_RELAY_MODE BIT(0) 23 #define CCORR_ENGINE_EN BIT(1) 24 #define CCORR_GAMMA_OFF BIT(2) 25 #define CCORR_WGAMUT_SRC_CLIP BIT(3) 26 #define DISP_CCORR_SIZE 0x0030 27 #define DISP_CCORR_COEF_0 0x0080 28 #define DISP_CCORR_COEF_1 0x0084 29 #define DISP_CCORR_COEF_2 0x0088 30 #define DISP_CCORR_COEF_3 0x008C 31 #define DISP_CCORR_COEF_4 0x0090 32 33 struct mtk_disp_ccorr_data { 34 u32 matrix_bits; 35 }; 36 37 /** 38 * struct mtk_disp_ccorr - DISP_CCORR driver structure 39 * @ddp_comp - structure containing type enum and hardware resources 40 * @crtc - associated crtc to report irq events to 41 */ 42 struct mtk_disp_ccorr { 43 struct clk *clk; 44 void __iomem *regs; 45 struct cmdq_client_reg cmdq_reg; 46 const struct mtk_disp_ccorr_data *data; 47 }; 48 49 int mtk_ccorr_clk_enable(struct device *dev) 50 { 51 struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev); 52 53 return clk_prepare_enable(ccorr->clk); 54 } 55 56 void mtk_ccorr_clk_disable(struct device *dev) 57 { 58 struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev); 59 60 clk_disable_unprepare(ccorr->clk); 61 } 62 63 void mtk_ccorr_config(struct device *dev, unsigned int w, 64 unsigned int h, unsigned int vrefresh, 65 unsigned int bpc, struct cmdq_pkt *cmdq_pkt) 66 { 67 struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev); 68 69 mtk_ddp_write(cmdq_pkt, w << 16 | h, &ccorr->cmdq_reg, ccorr->regs, 70 DISP_CCORR_SIZE); 71 mtk_ddp_write(cmdq_pkt, CCORR_ENGINE_EN, &ccorr->cmdq_reg, ccorr->regs, 72 DISP_CCORR_CFG); 73 } 74 75 void mtk_ccorr_start(struct device *dev) 76 { 77 struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev); 78 79 writel(CCORR_EN, ccorr->regs + DISP_CCORR_EN); 80 } 81 82 void mtk_ccorr_stop(struct device *dev) 83 { 84 struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev); 85 86 writel_relaxed(0x0, ccorr->regs + DISP_CCORR_EN); 87 } 88 89 /* Converts a DRM S31.32 value to the HW S1.n format. */ 90 static u16 mtk_ctm_s31_32_to_s1_n(u64 in, u32 n) 91 { 92 u16 r; 93 94 /* Sign bit. */ 95 r = in & BIT_ULL(63) ? BIT(n + 1) : 0; 96 97 if ((in & GENMASK_ULL(62, 33)) > 0) { 98 /* identity value 0x100000000 -> 0x400(mt8183), */ 99 /* identity value 0x100000000 -> 0x800(mt8192), */ 100 /* if bigger this, set it to max 0x7ff. */ 101 r |= GENMASK(n, 0); 102 } else { 103 /* take the n+1 most important bits. */ 104 r |= (in >> (32 - n)) & GENMASK(n, 0); 105 } 106 107 return r; 108 } 109 110 void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state) 111 { 112 struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev); 113 struct drm_property_blob *blob = state->ctm; 114 struct drm_color_ctm *ctm; 115 const u64 *input; 116 uint16_t coeffs[9] = { 0 }; 117 int i; 118 struct cmdq_pkt *cmdq_pkt = NULL; 119 u32 matrix_bits = ccorr->data->matrix_bits; 120 121 if (!blob) 122 return; 123 124 ctm = (struct drm_color_ctm *)blob->data; 125 input = ctm->matrix; 126 127 for (i = 0; i < ARRAY_SIZE(coeffs); i++) 128 coeffs[i] = mtk_ctm_s31_32_to_s1_n(input[i], matrix_bits); 129 130 mtk_ddp_write(cmdq_pkt, coeffs[0] << 16 | coeffs[1], 131 &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_0); 132 mtk_ddp_write(cmdq_pkt, coeffs[2] << 16 | coeffs[3], 133 &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_1); 134 mtk_ddp_write(cmdq_pkt, coeffs[4] << 16 | coeffs[5], 135 &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_2); 136 mtk_ddp_write(cmdq_pkt, coeffs[6] << 16 | coeffs[7], 137 &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_3); 138 mtk_ddp_write(cmdq_pkt, coeffs[8] << 16, 139 &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_4); 140 } 141 142 static int mtk_disp_ccorr_bind(struct device *dev, struct device *master, 143 void *data) 144 { 145 return 0; 146 } 147 148 static void mtk_disp_ccorr_unbind(struct device *dev, struct device *master, 149 void *data) 150 { 151 } 152 153 static const struct component_ops mtk_disp_ccorr_component_ops = { 154 .bind = mtk_disp_ccorr_bind, 155 .unbind = mtk_disp_ccorr_unbind, 156 }; 157 158 static int mtk_disp_ccorr_probe(struct platform_device *pdev) 159 { 160 struct device *dev = &pdev->dev; 161 struct mtk_disp_ccorr *priv; 162 struct resource *res; 163 int ret; 164 165 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 166 if (!priv) 167 return -ENOMEM; 168 169 priv->clk = devm_clk_get(dev, NULL); 170 if (IS_ERR(priv->clk)) { 171 dev_err(dev, "failed to get ccorr clk\n"); 172 return PTR_ERR(priv->clk); 173 } 174 175 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 176 priv->regs = devm_ioremap_resource(dev, res); 177 if (IS_ERR(priv->regs)) { 178 dev_err(dev, "failed to ioremap ccorr\n"); 179 return PTR_ERR(priv->regs); 180 } 181 182 #if IS_REACHABLE(CONFIG_MTK_CMDQ) 183 ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); 184 if (ret) 185 dev_dbg(dev, "get mediatek,gce-client-reg fail!\n"); 186 #endif 187 188 priv->data = of_device_get_match_data(dev); 189 platform_set_drvdata(pdev, priv); 190 191 ret = component_add(dev, &mtk_disp_ccorr_component_ops); 192 if (ret) 193 dev_err(dev, "Failed to add component: %d\n", ret); 194 195 return ret; 196 } 197 198 static int mtk_disp_ccorr_remove(struct platform_device *pdev) 199 { 200 component_del(&pdev->dev, &mtk_disp_ccorr_component_ops); 201 202 return 0; 203 } 204 205 static const struct mtk_disp_ccorr_data mt8183_ccorr_driver_data = { 206 .matrix_bits = 10, 207 }; 208 209 static const struct mtk_disp_ccorr_data mt8192_ccorr_driver_data = { 210 .matrix_bits = 11, 211 }; 212 213 static const struct of_device_id mtk_disp_ccorr_driver_dt_match[] = { 214 { .compatible = "mediatek,mt8183-disp-ccorr", 215 .data = &mt8183_ccorr_driver_data}, 216 { .compatible = "mediatek,mt8192-disp-ccorr", 217 .data = &mt8192_ccorr_driver_data}, 218 {}, 219 }; 220 MODULE_DEVICE_TABLE(of, mtk_disp_ccorr_driver_dt_match); 221 222 struct platform_driver mtk_disp_ccorr_driver = { 223 .probe = mtk_disp_ccorr_probe, 224 .remove = mtk_disp_ccorr_remove, 225 .driver = { 226 .name = "mediatek-disp-ccorr", 227 .owner = THIS_MODULE, 228 .of_match_table = mtk_disp_ccorr_driver_dt_match, 229 }, 230 }; 231