1 /* SPDX-License-Identifier: GPL-2.0-only 2 * 3 * Copyright © 2018-2020 Intel Corporation 4 */ 5 6 #ifndef __KMB_DRV_H__ 7 #define __KMB_DRV_H__ 8 9 #include <drm/drm_device.h> 10 11 #include "kmb_plane.h" 12 #include "kmb_regs.h" 13 14 #define KMB_MAX_WIDTH 1920 /*Max width in pixels */ 15 #define KMB_MAX_HEIGHT 1080 /*Max height in pixels */ 16 #define KMB_MIN_WIDTH 1920 /*Max width in pixels */ 17 #define KMB_MIN_HEIGHT 1080 /*Max height in pixels */ 18 19 #define DRIVER_DATE "20210223" 20 #define DRIVER_MAJOR 1 21 #define DRIVER_MINOR 1 22 23 #define KMB_FB_MAX_WIDTH 1920 24 #define KMB_FB_MAX_HEIGHT 1080 25 #define KMB_FB_MIN_WIDTH 1 26 #define KMB_FB_MIN_HEIGHT 1 27 28 #define KMB_LCD_DEFAULT_CLK 200000000 29 #define KMB_SYS_CLK_MHZ 500 30 31 #define ICAM_MMIO 0x3b100000 32 #define ICAM_LCD_OFFSET 0x1080 33 #define ICAM_MMIO_SIZE 0x2000 34 35 struct kmb_dsi; 36 37 struct kmb_clock { 38 struct clk *clk_lcd; 39 struct clk *clk_pll0; 40 }; 41 42 struct kmb_drm_private { 43 struct drm_device drm; 44 struct kmb_dsi *kmb_dsi; 45 void __iomem *lcd_mmio; 46 struct kmb_clock kmb_clk; 47 struct drm_crtc crtc; 48 struct kmb_plane *plane; 49 struct drm_atomic_state *state; 50 spinlock_t irq_lock; 51 int irq_lcd; 52 int sys_clk_mhz; 53 struct layer_status plane_status[KMB_MAX_PLANES]; 54 int kmb_under_flow; 55 int kmb_flush_done; 56 int layer_no; 57 }; 58 59 static inline struct kmb_drm_private *to_kmb(const struct drm_device *dev) 60 { 61 return container_of(dev, struct kmb_drm_private, drm); 62 } 63 64 static inline struct kmb_drm_private *crtc_to_kmb_priv(const struct drm_crtc *x) 65 { 66 return container_of(x, struct kmb_drm_private, crtc); 67 } 68 69 static inline void kmb_write_lcd(struct kmb_drm_private *dev_p, 70 unsigned int reg, u32 value) 71 { 72 writel(value, (dev_p->lcd_mmio + reg)); 73 } 74 75 static inline u32 kmb_read_lcd(struct kmb_drm_private *dev_p, unsigned int reg) 76 { 77 return readl(dev_p->lcd_mmio + reg); 78 } 79 80 static inline void kmb_set_bitmask_lcd(struct kmb_drm_private *dev_p, 81 unsigned int reg, u32 mask) 82 { 83 u32 reg_val = kmb_read_lcd(dev_p, reg); 84 85 kmb_write_lcd(dev_p, reg, (reg_val | mask)); 86 } 87 88 static inline void kmb_clr_bitmask_lcd(struct kmb_drm_private *dev_p, 89 unsigned int reg, u32 mask) 90 { 91 u32 reg_val = kmb_read_lcd(dev_p, reg); 92 93 kmb_write_lcd(dev_p, reg, (reg_val & (~mask))); 94 } 95 96 int kmb_setup_crtc(struct drm_device *dev); 97 void kmb_set_scanout(struct kmb_drm_private *lcd); 98 #endif /* __KMB_DRV_H__ */ 99